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* interp.c: (mn10300_option_handler): New function parses arguments
using sim-options. start-sanitize-am30 * (board): Add --board option for specifying am32. * (sim_open): Create new timer and serial devices and control configuration of other am32 devices via board option. end-sanitize-am30
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7f1e9a13b2
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6adf5185c1
@ -41,6 +41,54 @@
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host_callback *mn10300_callback;
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int mn10300_debug;
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/* simulation target board. NULL=default configuration */
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static char* board = NULL;
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static DECLARE_OPTION_HANDLER (mn10300_option_handler);
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enum {
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OPTION_BOARD = OPTION_START,
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};
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static SIM_RC
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mn10300_option_handler (sd, cpu, opt, arg, is_command)
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SIM_DESC sd;
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sim_cpu *cpu;
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int opt;
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char *arg;
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int is_command;
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{
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int cpu_nr;
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switch (opt)
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{
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case OPTION_BOARD:
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{
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if (arg)
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{
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board = zalloc(strlen(arg) + 1);
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strcpy(board, arg);
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}
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return SIM_RC_OK;
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}
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}
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return SIM_RC_OK;
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}
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static const OPTION mn10300_options[] =
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{
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/* start-sanitize-am30 */
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#define BOARD_AM32 "am32"
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{ {"board", required_argument, NULL, OPTION_BOARD},
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'\0', "none" /* rely on compile-time string concatenation for other options */
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"|" BOARD_AM32
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, "Customize simulation for a particular board.", mn10300_option_handler },
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/* end-sanitize-am30 */
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{ {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
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};
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#if WITH_COMMON
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#else
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static void dispatch PARAMS ((uint32, uint32, int));
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@ -263,7 +311,6 @@ compare_simops (arg1, arg2)
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return 0;
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}
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SIM_DESC
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sim_open (kind, cb, abfd, argv)
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SIM_OPEN_KIND kind;
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@ -894,10 +941,6 @@ sim_load (sd, prog, abfd, from_tty)
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/* For compatibility */
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SIM_DESC simulator;
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/* start-sanitize-am30 */
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/* Until the tree root gets moved somewhere else */
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struct hw *hw;
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/* end-sanitize-am30 */
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/* These default values correspond to expected usage for the chip. */
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@ -926,6 +969,7 @@ sim_open (kind, cb, abfd, argv)
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if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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return 0;
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sim_add_option_table (sd, NULL, mn10300_options);
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/* Allocate core managed memory */
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sim_do_command (sd, "memory region 0,0x100000");
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@ -943,115 +987,113 @@ sim_open (kind, cb, abfd, argv)
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}
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/* start-sanitize-am30 */
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hw = hw_tree_create (sd, "core");
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hw_tree_parse (hw, "/");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/trace? true");
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if ( NULL != board
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&& (strcmp(board, BOARD_AM32) == 0 ) )
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{
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/* device support for mn1030002 */
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/* interrupt controller */
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sim_hw_parse (sd, "/mn103int@0x34000100/reg 0x34000100 0x7C 0x34000200 0x8 0x3400280 0x8");
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/* DEBUG: NMI input's */
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sim_hw_parse (sd, "/glue@0x30000000/reg 0x30000000 12");
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sim_hw_parse (sd, "/glue@0x30000000 > int0 nmirq /mn103int");
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sim_hw_parse (sd, "/glue@0x30000000 > int1 watchdog /mn103int");
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sim_hw_parse (sd, "/glue@0x30000000 > int2 syserr /mn103int");
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/* DEBUG: ACK input */
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sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4");
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sim_hw_parse (sd, "/glue@0x30002000 > int ack /mn103int");
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/* DEBUG: LEVEL output */
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sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8");
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sim_hw_parse (sd, "/mn103int > nmi int0 /glue@0x30004000");
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sim_hw_parse (sd, "/mn103int > level int1 /glue@0x30004000");
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/* DEBUG: A bunch of interrupt inputs */
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sim_hw_parse (sd, "/glue@0x30006000/reg 0x30006000 32");
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sim_hw_parse (sd, "/glue@0x30006000 > int0 irq-0 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int1 irq-1 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int2 irq-2 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int3 irq-3 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int4 irq-4 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int5 irq-5 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int6 irq-6 /mn103int");
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sim_hw_parse (sd, "/glue@0x30006000 > int7 irq-7 /mn103int");
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/* processor interrupt device */
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/* the device */
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sim_hw_parse (sd, "/mn103cpu@0x20000000");
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sim_hw_parse (sd, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
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/* DEBUG: ACK output wired upto a glue device */
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sim_hw_parse (sd, "/glue@0x20002000");
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sim_hw_parse (sd, "/glue@0x20002000/reg 0x20002000 4");
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sim_hw_parse (sd, "/mn103cpu > ack int0 /glue@0x20002000");
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/* DEBUG: RESET/NMI/LEVEL wired up to a glue device */
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sim_hw_parse (sd, "/glue@0x20004000");
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sim_hw_parse (sd, "/glue@0x20004000/reg 0x20004000 12");
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sim_hw_parse (sd, "/glue@0x20004000 > int0 reset /mn103cpu");
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sim_hw_parse (sd, "/glue@0x20004000 > int1 nmi /mn103cpu");
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sim_hw_parse (sd, "/glue@0x20004000 > int2 level /mn103cpu");
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/* REAL: The processor wired up to the real interrupt controller */
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sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int");
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sim_hw_parse (sd, "/mn103int > level level /mn103cpu");
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sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu");
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/* interrupt controller */
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/* PAL */
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hw_tree_parse (hw, "/mn103int@0x34000100/reg 0x34000100 0x68 0x34000200 0x8 0x3400280 0x8");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/mn103int/trace? true");
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/* the device */
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sim_hw_parse (sd, "/pal@0x31000000");
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sim_hw_parse (sd, "/pal@0x31000000/reg 0x31000000 64");
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sim_hw_parse (sd, "/pal@0x31000000/poll? true");
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/* DEBUG: NMI input's */
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hw_tree_parse (hw, "/glue@0x30000000/reg 0x30000000 12");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/glue@0x30000000/trace? true");
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hw_tree_parse (hw, "/glue@0x30000000 > int0 nmirq /mn103int");
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hw_tree_parse (hw, "/glue@0x30000000 > int1 watchdog /mn103int");
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hw_tree_parse (hw, "/glue@0x30000000 > int2 syserr /mn103int");
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/* DEBUG: ACK input */
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hw_tree_parse (hw, "/glue@0x30002000/reg 0x30002000 4");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/glue@0x30002000/trace? true");
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hw_tree_parse (hw, "/glue@0x30002000 > int ack /mn103int");
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/* DEBUG: LEVEL output */
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hw_tree_parse (hw, "/glue@0x30004000/reg 0x30004000 8");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/glue@0x30004000/trace? true");
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hw_tree_parse (hw, "/mn103int > nmi int0 /glue@0x30004000");
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hw_tree_parse (hw, "/mn103int > level int1 /glue@0x30004000");
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/* DEBUG: A bunch of interrupt inputs */
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hw_tree_parse (hw, "/glue@0x30006000/reg 0x30006000 32");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/glue@0x30006000/trace? true");
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hw_tree_parse (hw, "/glue@0x30006000 > int0 irq-0 /mn103int");
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hw_tree_parse (hw, "/glue@0x30006000 > int1 irq-1 /mn103int");
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hw_tree_parse (hw, "/glue@0x30006000 > int2 irq-2 /mn103int");
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hw_tree_parse (hw, "/glue@0x30006000 > int3 irq-3 /mn103int");
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hw_tree_parse (hw, "/glue@0x30006000 > int4 irq-4 /mn103int");
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hw_tree_parse (hw, "/glue@0x30006000 > int5 irq-5 /mn103int");
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hw_tree_parse (hw, "/glue@0x30006000 > int6 irq-6 /mn103int");
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hw_tree_parse (hw, "/glue@0x30006000 > int7 irq-7 /mn103int");
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/* DEBUG: PAL wired up to a glue device */
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sim_hw_parse (sd, "/glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000/reg 0x31002000 16");
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sim_hw_parse (sd, "/pal@0x31000000 > countdown int0 /glue@0x31002000");
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sim_hw_parse (sd, "/pal@0x31000000 > timer int1 /glue@0x31002000");
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sim_hw_parse (sd, "/pal@0x31000000 > int int2 /glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000 > int0 int3 /glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000 > int1 int3 /glue@0x31002000");
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sim_hw_parse (sd, "/glue@0x31002000 > int2 int3 /glue@0x31002000");
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/* REAL: The PAL wired up to the real interrupt controller */
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sim_hw_parse (sd, "/pal@0x31000000 > countdown irq-0 /mn103int");
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sim_hw_parse (sd, "/pal@0x31000000 > timer irq-1 /mn103int");
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sim_hw_parse (sd, "/pal@0x31000000 > int irq-2 /mn103int");
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/* 8 and 16 bit timers */
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sim_hw_parse (sd, "/mn103tim@0x34001000/reg 0x34001000 36 0x34001080 100");
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/* Hook timer interrupts up to interrupt controller */
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sim_hw_parse (sd, "/mn103tim > timer-0-underflow timer-0-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-1-underflow timer-1-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-2-underflow timer-2-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-3-underflow timer-3-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-4-underflow timer-4-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-5-underflow timer-5-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-6-underflow timer-6-underflow /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-6-compare-a timer-6-compare-a /mn103int");
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sim_hw_parse (sd, "/mn103tim > timer-6-compare-b timer-6-compare-b /mn103int");
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/* processor interrupt device */
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/* the device */
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hw_tree_parse (hw, "/mn103cpu@0x20000000");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/mn103cpu@0x20000000/trace? true");
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hw_tree_parse (hw, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
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/* DEBUG: ACK output wired upto a glue device */
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hw_tree_parse (hw, "/glue@0x20002000");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/glue@0x20002000/trace? true");
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hw_tree_parse (hw, "/glue@0x20002000/reg 0x20002000 4");
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hw_tree_parse (hw, "/mn103cpu > ack int0 /glue@0x20002000");
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/* DEBUG: RESET/NMI/LEVEL wired up to a glue device */
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hw_tree_parse (hw, "/glue@0x20004000");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/glue@0x20004000/trace? true");
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hw_tree_parse (hw, "/glue@0x20004000/reg 0x20004000 12");
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hw_tree_parse (hw, "/glue@0x20004000 > int0 reset /mn103cpu");
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hw_tree_parse (hw, "/glue@0x20004000 > int1 nmi /mn103cpu");
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hw_tree_parse (hw, "/glue@0x20004000 > int2 level /mn103cpu");
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/* REAL: The processor wired up to the real interrupt controller */
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#if 1
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hw_tree_parse (hw, "/mn103cpu > ack ack /mn103int");
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hw_tree_parse (hw, "/mn103int > level level /mn103cpu");
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hw_tree_parse (hw, "/mn103int > nmi nmi /mn103cpu");
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#endif
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/* PAL */
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/* the device */
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hw_tree_parse (hw, "/pal@0x31000000");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/pal@0x31000000/trace? true");
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hw_tree_parse (hw, "/pal@0x31000000/reg 0x31000000 64");
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/* DEBUG: PAL wired up to a glue device */
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hw_tree_parse (hw, "/glue@0x31002000");
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if (STATE_VERBOSE_P (sd))
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hw_tree_parse (hw, "/glue@0x31002000/trace? true");
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hw_tree_parse (hw, "/glue@0x31002000/reg 0x31002000 16");
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hw_tree_parse (hw, "/pal@0x31000000 > countdown int0 /glue@0x31002000");
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hw_tree_parse (hw, "/pal@0x31000000 > timer int1 /glue@0x31002000");
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hw_tree_parse (hw, "/pal@0x31000000 > int int2 /glue@0x31002000");
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hw_tree_parse (hw, "/glue@0x31002000 > int0 int3 /glue@0x31002000");
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hw_tree_parse (hw, "/glue@0x31002000 > int1 int3 /glue@0x31002000");
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hw_tree_parse (hw, "/glue@0x31002000 > int2 int3 /glue@0x31002000");
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/* REAL: The PAL wired up to the real interrupt controller */
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hw_tree_parse (hw, "/pal@0x31000000 > countdown irq-0 /mn103int");
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hw_tree_parse (hw, "/pal@0x31000000 > timer irq-1 /mn103int");
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hw_tree_parse (hw, "/pal@0x31000000 > int irq-2 /mn103int");
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hw_tree_finish (hw);
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if (STATE_VERBOSE_P (sd))
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hw_tree_print (hw);
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/* Serial devices 0,1,2 */
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sim_hw_parse (sd, "/mn103ser@0x34000800/reg 0x34000800 48");
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/* Hook serial interrupts up to interrupt controller */
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sim_hw_parse (sd, "/mn103ser > serial-0-receive serial-0-receive /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-0-transmit serial-0-transmit /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-1-receive serial-0-receive /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-1-transmit serial-0-transmit /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-2-receive serial-0-receive /mn103int");
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sim_hw_parse (sd, "/mn103ser > serial-2-transmit serial-0-transmit /mn103int");
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}
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/* end-sanitize-am30 */
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/* check for/establish the a reference program image */
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