ld/testsuite/

* lib/ld-lib.exp (default_ld_compile): Add a -I option for the source
	directory.
	* ld-mips-elf/compressed-plt-1.ld, ld-mips-elf/compressed-plt-1.s,
	ld-mips-elf/compressed-plt-1-dyn.s, ld-mips-elf/compressed-plt-1a.s,
	ld-mips-elf/compressed-plt-1b.s, ld-mips-elf/compressed-plt-1c.s,
	ld-mips-elf/compressed-plt-1d.s, ld-mips-elf/compressed-plt-1e.s,
	ld-mips-elf/compressed-plt-1-o32-se.rd,
	ld-mips-elf/compressed-plt-1-o32-se.od,
	ld-mips-elf/compressed-plt-1-o32-mips16-only.rd,
	ld-mips-elf/compressed-plt-1-o32-mips16-only.od,
	ld-mips-elf/compressed-plt-1-o32-umips-only.rd,
	ld-mips-elf/compressed-plt-1-o32-umips-only.od,
	ld-mips-elf/compressed-plt-1-o32-mips16.rd,
	ld-mips-elf/compressed-plt-1-o32-mips16.od,
	ld-mips-elf/compressed-plt-1-o32-mips16-got.rd,
	ld-mips-elf/compressed-plt-1-o32-mips16-got.od,
	ld-mips-elf/compressed-plt-1-o32-mips16-word.rd,
	ld-mips-elf/compressed-plt-1-o32-mips16-word.od,
	ld-mips-elf/compressed-plt-1-o32-umips.rd,
	ld-mips-elf/compressed-plt-1-o32-umips.od,
	ld-mips-elf/compressed-plt-1-o32-umips-got.rd,
	ld-mips-elf/compressed-plt-1-o32-umips-got.od,
	ld-mips-elf/compressed-plt-1-o32-umips-word.rd,
	ld-mips-elf/compressed-plt-1-o32-umips-word.od,
	ld-mips-elf/compressed-plt-1-n32-mips16.rd,
	ld-mips-elf/compressed-plt-1-n32-mips16.od,
	ld-mips-elf/compressed-plt-1-n32-umips.rd,
	ld-mips-elf/compressed-plt-1-n32-umips.od: New tests.
	* ld-mips-elf/mips-elf.exp: Run them.
This commit is contained in:
Richard Sandiford 2013-10-13 10:17:20 +00:00
parent c5d6fa4495
commit 690f47bf98
33 changed files with 6287 additions and 1 deletions

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@ -1,3 +1,35 @@
2013-10-13 Richard Sandiford <rdsandiford@googlemail.com>
* lib/ld-lib.exp (default_ld_compile): Add a -I option for the source
directory.
* ld-mips-elf/compressed-plt-1.ld, ld-mips-elf/compressed-plt-1.s,
ld-mips-elf/compressed-plt-1-dyn.s, ld-mips-elf/compressed-plt-1a.s,
ld-mips-elf/compressed-plt-1b.s, ld-mips-elf/compressed-plt-1c.s,
ld-mips-elf/compressed-plt-1d.s, ld-mips-elf/compressed-plt-1e.s,
ld-mips-elf/compressed-plt-1-o32-se.rd,
ld-mips-elf/compressed-plt-1-o32-se.od,
ld-mips-elf/compressed-plt-1-o32-mips16-only.rd,
ld-mips-elf/compressed-plt-1-o32-mips16-only.od,
ld-mips-elf/compressed-plt-1-o32-umips-only.rd,
ld-mips-elf/compressed-plt-1-o32-umips-only.od,
ld-mips-elf/compressed-plt-1-o32-mips16.rd,
ld-mips-elf/compressed-plt-1-o32-mips16.od,
ld-mips-elf/compressed-plt-1-o32-mips16-got.rd,
ld-mips-elf/compressed-plt-1-o32-mips16-got.od,
ld-mips-elf/compressed-plt-1-o32-mips16-word.rd,
ld-mips-elf/compressed-plt-1-o32-mips16-word.od,
ld-mips-elf/compressed-plt-1-o32-umips.rd,
ld-mips-elf/compressed-plt-1-o32-umips.od,
ld-mips-elf/compressed-plt-1-o32-umips-got.rd,
ld-mips-elf/compressed-plt-1-o32-umips-got.od,
ld-mips-elf/compressed-plt-1-o32-umips-word.rd,
ld-mips-elf/compressed-plt-1-o32-umips-word.od,
ld-mips-elf/compressed-plt-1-n32-mips16.rd,
ld-mips-elf/compressed-plt-1-n32-mips16.od,
ld-mips-elf/compressed-plt-1-n32-umips.rd,
ld-mips-elf/compressed-plt-1-n32-umips.od: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
2013-10-13 Richard Sandiford <rdsandiford@googlemail.com>
* ld-mips-elf/pic-and-nonpic-6-n32.ad,

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@ -0,0 +1,18 @@
# Create dummy DSO functions for everything that these tests call.
.abicalls
.option pic2
.set filter, -1
.macro test_one, name, mask
.globl \name
.ent \name
\name:
jr $31
.end \name
.endm
.include "compressed-plt-1.s"
test_all

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.* file format .*
Disassembly of section \.plt:
# At present, all n32 PLT entries use the standard encoding.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c0e1020 lui \$14,0x1020
.*: 8dd90000 lw \$25,0\(\$14\)
.*: 25ce0000 addiu \$14,\$14,0
.*: 030ec023 subu \$24,\$24,\$14
.*: 03e07821 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90008 lw \$25,8\(\$15\)
.*: 03200008 jr \$25
.*: 25f80008 addiu \$24,\$15,8
10100030 <f_lo_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100040 <f_lo_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100050 <f_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100060 <f_lo_iu_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90018 lw \$25,24\(\$15\)
.*: 03200008 jr \$25
.*: 25f80018 addiu \$24,\$15,24
10100070 <f_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100080 <f_lo_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90020 lw \$25,32\(\$15\)
.*: 03200008 jr \$25
.*: 25f80020 addiu \$24,\$15,32
10100090 <f_iu_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90024 lw \$25,36\(\$15\)
.*: 03200008 jr \$25
.*: 25f80024 addiu \$24,\$15,36
101000a0 <f_lo_iu_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90028 lw \$25,40\(\$15\)
.*: 03200008 jr \$25
.*: 25f80028 addiu \$24,\$15,40
101000b0 <f_lo_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9002c lw \$25,44\(\$15\)
.*: 03200008 jr \$25
.*: 25f8002c addiu \$24,\$15,44
101000c0 <f_lo_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90030 lw \$25,48\(\$15\)
.*: 03200008 jr \$25
.*: 25f80030 addiu \$24,\$15,48
101000d0 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90034 lw \$25,52\(\$15\)
.*: 03200008 jr \$25
.*: 25f80034 addiu \$24,\$15,52
101000e0 <f_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90038 lw \$25,56\(\$15\)
.*: 03200008 jr \$25
.*: 25f80038 addiu \$24,\$15,56
101000f0 <f_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9003c lw \$25,60\(\$15\)
.*: 03200008 jr \$25
.*: 25f8003c addiu \$24,\$15,60
10100100 <f_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90040 lw \$25,64\(\$15\)
.*: 03200008 jr \$25
.*: 25f80040 addiu \$24,\$15,64
10100110 <f_lo_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90044 lw \$25,68\(\$15\)
.*: 03200008 jr \$25
.*: 25f80044 addiu \$24,\$15,68
10100120 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90048 lw \$25,72\(\$15\)
.*: 03200008 jr \$25
.*: 25f80048 addiu \$24,\$15,72
10100130 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9004c lw \$25,76\(\$15\)
.*: 03200008 jr \$25
.*: 25f8004c addiu \$24,\$15,76
10100140 <f_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90050 lw \$25,80\(\$15\)
.*: 03200008 jr \$25
.*: 25f80050 addiu \$24,\$15,80
10100150 <f_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90054 lw \$25,84\(\$15\)
.*: 03200008 jr \$25
.*: 25f80054 addiu \$24,\$15,84
10100160 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90058 lw \$25,88\(\$15\)
.*: 03200008 jr \$25
.*: 25f80058 addiu \$24,\$15,88
10100170 <f_iu_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9005c lw \$25,92\(\$15\)
.*: 03200008 jr \$25
.*: 25f8005c addiu \$24,\$15,92
10100180 <f_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90060 lw \$25,96\(\$15\)
.*: 03200008 jr \$25
.*: 25f80060 addiu \$24,\$15,96
10100190 <f_lo_iu_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90064 lw \$25,100\(\$15\)
.*: 03200008 jr \$25
.*: 25f80064 addiu \$24,\$15,100
101001a0 <f_lo_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90068 lw \$25,104\(\$15\)
.*: 03200008 jr \$25
.*: 25f80068 addiu \$24,\$15,104
101001b0 <f_lo_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9006c lw \$25,108\(\$15\)
.*: 03200008 jr \$25
.*: 25f8006c addiu \$24,\$15,108
101001c0 <f_lo_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90070 lw \$25,112\(\$15\)
.*: 03200008 jr \$25
.*: 25f80070 addiu \$24,\$15,112
101001d0 <f_lo@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90074 lw \$25,116\(\$15\)
.*: 03200008 jr \$25
.*: 25f80074 addiu \$24,\$15,116
Disassembly of section \.MIPS\.stubs:
10101000 <_MIPS_STUBS_>:
# Lazy-binding stub for f_iu.
.*: 8f998010 lw \$25,-32752\(\$28\)
.*: 03e07821 move \$15,\$31
.*: 0320f809 jalr \$25
.*: 24180021 li \$24,33
# Lazy-binding stub for f_ic.
.*: 8f998010 lw \$25,-32752\(\$28\)
.*: 03e07821 move \$15,\$31
.*: 0320f809 jalr \$25
.*: 24180020 li \$24,32
# Lazy-binding stub for f_iu_ic.
.*: 8f998010 lw \$25,-32752\(\$28\)
.*: 03e07821 move \$15,\$31
.*: 0320f809 jalr \$25
.*: 2418001f li \$24,31
\.\.\.
Disassembly of section \.text\.a:
10102000 <testc>:
.*: .... .... jalx [0-9a-f]+ <f_dc@plt>
.*: 6500 nop
.*: f070 9b50 lw \$2,-32656\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jalx [0-9a-f]+ <f_ic_dc@plt>
.*: 6500 nop
.*: f010 9b58 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_du_dc@plt>
.*: 6500 nop
.*: f010 9b5c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_du_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_du_ic_dc@plt>
.*: 6500 nop
.*: f030 9b40 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_iu_dc@plt>
.*: 6500 nop
.*: f070 9b4c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: .... .... jalx [0-9a-f]+ <f_iu_ic_dc@plt>
.*: 6500 nop
.*: f030 9b44 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_iu_du_dc@plt>
.*: 6500 nop
.*: f030 9b48 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 6500 nop
.*: f030 9b4c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_dc@plt>
.*: 6500 nop
.*: f030 9b50 lw \$2,-32720\(\$3\)
# ^ local GOT entry for f_lo_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_ic_dc@plt>
.*: 6500 nop
.*: f030 9b54 lw \$2,-32716\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_du_dc@plt>
.*: 6500 nop
.*: f030 9b58 lw \$2,-32712\(\$3\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 6500 nop
.*: f030 9b5c lw \$2,-32708\(\$3\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_iu_dc@plt>
.*: 6500 nop
.*: f050 9b40 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_iu_ic_dc@plt>
.*: 6500 nop
.*: f050 9b44 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 6500 nop
.*: f050 9b48 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 6500 nop
.*: f050 9b4c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: e820 jr \$31
Disassembly of section \.text\.b:
10103000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c628074 lw \$2,-32652\(\$3\)
# ^ global GOT entry for f_iu
.*: 8c628050 lw \$2,-32688\(\$3\)
# ^ local GOT entry for f_iu_dc@plt
.*: 8c62806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628054 lw \$2,-32684\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628058 lw \$2,-32680\(\$3\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62805c lw \$2,-32676\(\$3\)
# ^ local GOT entry for f_lo_iu@plt
.*: 8c628060 lw \$2,-32672\(\$3\)
# ^ local GOT entry for f_lo_iu_dc@plt
.*: 8c628040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: 8c628044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628064 lw \$2,-32668\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628068 lw \$2,-32664\(\$3\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10104000 <testlo>:
.*: 240201d0 li \$2,464
# ^ low 16 bits of f_lo@plt
.*: 24020110 li \$2,272
# ^ low 16 bits of f_lo_dc@plt
.*: 240200b0 li \$2,176
# ^ low 16 bits of f_lo_ic@plt
.*: 240201c0 li \$2,448
# ^ low 16 bits of f_lo_ic_dc@plt
.*: 24020160 li \$2,352
# ^ low 16 bits of f_lo_du@plt
.*: 240200c0 li \$2,192
# ^ low 16 bits of f_lo_du_dc@plt
.*: 24020080 li \$2,128
# ^ low 16 bits of f_lo_du_ic@plt
.*: 24020040 li \$2,64
# ^ low 16 bits of f_lo_du_ic_dc@plt
.*: 24020020 li \$2,32
# ^ low 16 bits of f_lo_iu@plt
.*: 24020060 li \$2,96
# ^ low 16 bits of f_lo_iu_dc@plt
.*: 240200a0 li \$2,160
# ^ low 16 bits of f_lo_iu_ic@plt
.*: 24020190 li \$2,400
# ^ low 16 bits of f_lo_iu_ic_dc@plt
.*: 24020130 li \$2,304
# ^ low 16 bits of f_lo_iu_du@plt
.*: 24020030 li \$2,48
# ^ low 16 bits of f_lo_iu_du_dc@plt
.*: 240201a0 li \$2,416
# ^ low 16 bits of f_lo_iu_du_ic@plt
.*: 240201b0 li \$2,432
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt

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Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10201000
#...
0x70000013 \(MIPS_GOTSYM\) 0x1f
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10004000
0x00000002 \(PLTRELSZ\) 224 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100020 f_lo_iu
1020000c [^ ]+ R_MIPS_JUMP_SLOT 10100030 f_lo_iu_du_dc
10200010 [^ ]+ R_MIPS_JUMP_SLOT 10100040 f_lo_du_ic_dc
10200014 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_dc
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100060 f_lo_iu_dc
1020001c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_ic
10200020 [^ ]+ R_MIPS_JUMP_SLOT 10100080 f_lo_du_ic
10200024 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_dc
10200028 [^ ]+ R_MIPS_JUMP_SLOT 101000a0 f_lo_iu_ic
1020002c [^ ]+ R_MIPS_JUMP_SLOT 101000b0 f_lo_ic
10200030 [^ ]+ R_MIPS_JUMP_SLOT 101000c0 f_lo_du_dc
10200034 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du
10200038 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_ic_dc
1020003c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_ic
10200040 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_dc
10200044 [^ ]+ R_MIPS_JUMP_SLOT 10100110 f_lo_dc
10200048 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du
1020004c [^ ]+ R_MIPS_JUMP_SLOT 10100130 f_lo_iu_du
10200050 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_dc
10200054 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_ic_dc
10200058 [^ ]+ R_MIPS_JUMP_SLOT 10100160 f_lo_du
1020005c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_ic_dc
10200060 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_ic_dc
10200064 [^ ]+ R_MIPS_JUMP_SLOT 10100190 f_lo_iu_ic_dc
10200068 [^ ]+ R_MIPS_JUMP_SLOT 101001a0 f_lo_iu_du_ic
1020006c [^ ]+ R_MIPS_JUMP_SLOT 101001b0 f_lo_iu_du_ic_dc
10200070 [^ ]+ R_MIPS_JUMP_SLOT 101001c0 f_lo_ic_dc
10200074 [^ ]+ R_MIPS_JUMP_SLOT 101001d0 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# _lo symbols have their address taken, so their PLT symbols need to have
# a nonzero value. They must also have STO_MIPS_PLT in order to distinguish
# them from old-style lazy-binding stubs. Non-_lo symbols are only called,
# so their PLT symbols should have a zero value and no STO_MIPS_PLT annotation.
.*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
.*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
#...
.*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_dc
.*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_ic
.*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_dc
.*: 101000a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
.*: 101000b0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
.*: 101000c0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_ic
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_dc
.*: 10100110 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du
.*: 10100130 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_ic_dc
.*: 10100160 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_ic_dc
#...
.*: 10100190 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic_dc
.*: 101001a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic
.*: 101001b0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic_dc
.*: 101001c0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic_dc
.*: 101001d0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. The symbol value
# is the address of the lazy-binding stub.
31: 10101020 0 FUNC GLOBAL DEFAULT UND f_iu_ic
32: 10101010 0 FUNC GLOBAL DEFAULT UND f_ic
33: 10101000 0 FUNC GLOBAL DEFAULT UND f_iu
Symbol table '\.symtab' .*
#...
Primary GOT:
Canonical gp value: 10208ff0
Reserved entries:
Address Access Initial Purpose
10201000 -32752\(gp\) 00000000 Lazy resolver
10201004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10201008 -32744\(gp\) 10100150
1020100c -32740\(gp\) 101000f0
10201010 -32736\(gp\) 101000e0
10201014 -32732\(gp\) 10100170
10201018 -32728\(gp\) 10100070
1020101c -32724\(gp\) 10100180
10201020 -32720\(gp\) 101000b0
10201024 -32716\(gp\) 101001c0
10201028 -32712\(gp\) 10100080
1020102c -32708\(gp\) 10100040
10201030 -32704\(gp\) 101000a0
10201034 -32700\(gp\) 10100190
10201038 -32696\(gp\) 101001a0
1020103c -32692\(gp\) 101001b0
10201040 -32688\(gp\) 10100090
10201044 -32684\(gp\) 10100120
10201048 -32680\(gp\) 10100100
1020104c -32676\(gp\) 10100020
10201050 -32672\(gp\) 10100060
10201054 -32668\(gp\) 10100130
10201058 -32664\(gp\) 10100030
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
1020105c -32660\(gp\) 10101020 10101020 FUNC UND f_iu_ic
10201060 -32656\(gp\) 10101010 10101010 FUNC UND f_ic
10201064 -32652\(gp\) 10101000 10101000 FUNC UND f_iu
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100000 10100020 FUNC UND f_lo_iu
1020000c 10100000 10100030 FUNC UND f_lo_iu_du_dc
10200010 10100000 10100040 FUNC UND f_lo_du_ic_dc
10200014 10100000 00000000 FUNC UND f_du_dc
10200018 10100000 10100060 FUNC UND f_lo_iu_dc
1020001c 10100000 00000000 FUNC UND f_iu_du_ic
10200020 10100000 10100080 FUNC UND f_lo_du_ic
10200024 10100000 00000000 FUNC UND f_iu_dc
10200028 10100000 101000a0 FUNC UND f_lo_iu_ic
1020002c 10100000 101000b0 FUNC UND f_lo_ic
10200030 10100000 101000c0 FUNC UND f_lo_du_dc
10200034 10100000 00000000 FUNC UND f_du
10200038 10100000 00000000 FUNC UND f_du_ic_dc
1020003c 10100000 00000000 FUNC UND f_du_ic
10200040 10100000 00000000 FUNC UND f_iu_du_dc
10200044 10100000 10100110 FUNC UND f_lo_dc
10200048 10100000 00000000 FUNC UND f_iu_du
1020004c 10100000 10100130 FUNC UND f_lo_iu_du
10200050 10100000 00000000 FUNC UND f_dc
10200054 10100000 00000000 FUNC UND f_ic_dc
10200058 10100000 10100160 FUNC UND f_lo_du
1020005c 10100000 00000000 FUNC UND f_iu_ic_dc
10200060 10100000 00000000 FUNC UND f_iu_du_ic_dc
10200064 10100000 10100190 FUNC UND f_lo_iu_ic_dc
10200068 10100000 101001a0 FUNC UND f_lo_iu_du_ic
1020006c 10100000 101001b0 FUNC UND f_lo_iu_du_ic_dc
10200070 10100000 101001c0 FUNC UND f_lo_ic_dc
10200074 10100000 101001d0 FUNC UND f_lo

View File

@ -0,0 +1,411 @@
.* file format .*
Disassembly of section \.plt:
# At present, all n32 PLT entries use the standard encoding.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c0e1020 lui \$14,0x1020
.*: 8dd90000 lw \$25,0\(\$14\)
.*: 25ce0000 addiu \$14,\$14,0
.*: 030ec023 subu \$24,\$24,\$14
.*: 03e07821 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90008 lw \$25,8\(\$15\)
.*: 03200008 jr \$25
.*: 25f80008 addiu \$24,\$15,8
10100030 <f_lo_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100040 <f_lo_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100050 <f_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100060 <f_lo_iu_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90018 lw \$25,24\(\$15\)
.*: 03200008 jr \$25
.*: 25f80018 addiu \$24,\$15,24
10100070 <f_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100080 <f_lo_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90020 lw \$25,32\(\$15\)
.*: 03200008 jr \$25
.*: 25f80020 addiu \$24,\$15,32
10100090 <f_iu_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90024 lw \$25,36\(\$15\)
.*: 03200008 jr \$25
.*: 25f80024 addiu \$24,\$15,36
101000a0 <f_lo_iu_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90028 lw \$25,40\(\$15\)
.*: 03200008 jr \$25
.*: 25f80028 addiu \$24,\$15,40
101000b0 <f_lo_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9002c lw \$25,44\(\$15\)
.*: 03200008 jr \$25
.*: 25f8002c addiu \$24,\$15,44
101000c0 <f_lo_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90030 lw \$25,48\(\$15\)
.*: 03200008 jr \$25
.*: 25f80030 addiu \$24,\$15,48
101000d0 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90034 lw \$25,52\(\$15\)
.*: 03200008 jr \$25
.*: 25f80034 addiu \$24,\$15,52
101000e0 <f_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90038 lw \$25,56\(\$15\)
.*: 03200008 jr \$25
.*: 25f80038 addiu \$24,\$15,56
101000f0 <f_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9003c lw \$25,60\(\$15\)
.*: 03200008 jr \$25
.*: 25f8003c addiu \$24,\$15,60
10100100 <f_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90040 lw \$25,64\(\$15\)
.*: 03200008 jr \$25
.*: 25f80040 addiu \$24,\$15,64
10100110 <f_lo_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90044 lw \$25,68\(\$15\)
.*: 03200008 jr \$25
.*: 25f80044 addiu \$24,\$15,68
10100120 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90048 lw \$25,72\(\$15\)
.*: 03200008 jr \$25
.*: 25f80048 addiu \$24,\$15,72
10100130 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9004c lw \$25,76\(\$15\)
.*: 03200008 jr \$25
.*: 25f8004c addiu \$24,\$15,76
10100140 <f_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90050 lw \$25,80\(\$15\)
.*: 03200008 jr \$25
.*: 25f80050 addiu \$24,\$15,80
10100150 <f_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90054 lw \$25,84\(\$15\)
.*: 03200008 jr \$25
.*: 25f80054 addiu \$24,\$15,84
10100160 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90058 lw \$25,88\(\$15\)
.*: 03200008 jr \$25
.*: 25f80058 addiu \$24,\$15,88
10100170 <f_iu_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9005c lw \$25,92\(\$15\)
.*: 03200008 jr \$25
.*: 25f8005c addiu \$24,\$15,92
10100180 <f_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90060 lw \$25,96\(\$15\)
.*: 03200008 jr \$25
.*: 25f80060 addiu \$24,\$15,96
10100190 <f_lo_iu_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90064 lw \$25,100\(\$15\)
.*: 03200008 jr \$25
.*: 25f80064 addiu \$24,\$15,100
101001a0 <f_lo_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90068 lw \$25,104\(\$15\)
.*: 03200008 jr \$25
.*: 25f80068 addiu \$24,\$15,104
101001b0 <f_lo_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9006c lw \$25,108\(\$15\)
.*: 03200008 jr \$25
.*: 25f8006c addiu \$24,\$15,108
101001c0 <f_lo_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90070 lw \$25,112\(\$15\)
.*: 03200008 jr \$25
.*: 25f80070 addiu \$24,\$15,112
101001d0 <f_lo@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90074 lw \$25,116\(\$15\)
.*: 03200008 jr \$25
.*: 25f80074 addiu \$24,\$15,116
Disassembly of section \.MIPS\.stubs:
10101000 <_MIPS_STUBS_>:
# Lazy-binding stub for f_iu.
.*: ff3c 8010 lw \$25,-32752\(\$28\)
.*: 0dff move \$15,\$31
.*: 45d9 jalr \$25
.*: 3300 0021 li \$24,33
# Lazy-binding stub for f_ic.
.*: ff3c 8010 lw \$25,-32752\(\$28\)
.*: 0dff move \$15,\$31
.*: 45d9 jalr \$25
.*: 3300 0020 li \$24,32
# Lazy-binding stub for f_iu_ic.
.*: ff3c 8010 lw \$25,-32752\(\$28\)
.*: 0dff move \$15,\$31
.*: 45d9 jalr \$25
.*: 3300 001f li \$24,31
\.\.\.
Disassembly of section \.text\.a:
10102000 <testc>:
.*: .... .... jalx [0-9a-f]+ <f_dc@plt>
.*: 0000 0000 nop
.*: fc43 8070 lw \$2,-32656\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jalx [0-9a-f]+ <f_ic_dc@plt>
.*: 0000 0000 nop
.*: fc43 8018 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_du_dc@plt>
.*: 0000 0000 nop
.*: fc43 801c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_du_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_du_ic_dc@plt>
.*: 0000 0000 nop
.*: fc43 8020 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_iu_dc@plt>
.*: 0000 0000 nop
.*: fc43 806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: .... .... jalx [0-9a-f]+ <f_iu_ic_dc@plt>
.*: 0000 0000 nop
.*: fc43 8024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_iu_du_dc@plt>
.*: 0000 0000 nop
.*: fc43 8028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 0000 0000 nop
.*: fc43 802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_dc@plt>
.*: 0000 0000 nop
.*: fc43 8030 lw \$2,-32720\(\$3\)
# ^ local GOT entry for f_lo_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_ic_dc@plt>
.*: 0000 0000 nop
.*: fc43 8034 lw \$2,-32716\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_du_dc@plt>
.*: 0000 0000 nop
.*: fc43 8038 lw \$2,-32712\(\$3\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 0000 0000 nop
.*: fc43 803c lw \$2,-32708\(\$3\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_iu_dc@plt>
.*: 0000 0000 nop
.*: fc43 8040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_iu_ic_dc@plt>
.*: 0000 0000 nop
.*: fc43 8044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 0000 0000 nop
.*: fc43 8048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: .... .... jalx [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 0000 0000 nop
.*: fc43 804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 459f jr \$31
Disassembly of section \.text\.b:
10103000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c628074 lw \$2,-32652\(\$3\)
# ^ global GOT entry for f_iu
.*: 8c628050 lw \$2,-32688\(\$3\)
# ^ local GOT entry for f_iu_dc@plt
.*: 8c62806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628054 lw \$2,-32684\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628058 lw \$2,-32680\(\$3\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62805c lw \$2,-32676\(\$3\)
# ^ local GOT entry for f_lo_iu@plt
.*: 8c628060 lw \$2,-32672\(\$3\)
# ^ local GOT entry for f_lo_iu_dc@plt
.*: 8c628040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: 8c628044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628064 lw \$2,-32668\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628068 lw \$2,-32664\(\$3\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10104000 <testlo>:
.*: 3040 01d0 li \$2,464
# ^ low 16 bits of f_lo@plt
.*: 3040 0110 li \$2,272
# ^ low 16 bits of f_lo_dc@plt
.*: 3040 00b0 li \$2,176
# ^ low 16 bits of f_lo_ic@plt
.*: 3040 01c0 li \$2,448
# ^ low 16 bits of f_lo_ic_dc@plt
.*: 3040 0160 li \$2,352
# ^ low 16 bits of f_lo_du@plt
.*: 3040 00c0 li \$2,192
# ^ low 16 bits of f_lo_du_dc@plt
.*: 3040 0080 li \$2,128
# ^ low 16 bits of f_lo_du_ic@plt
.*: 3040 0040 li \$2,64
# ^ low 16 bits of f_lo_du_ic_dc@plt
.*: 3040 0020 li \$2,32
# ^ low 16 bits of f_lo_iu@plt
.*: 3040 0060 li \$2,96
# ^ low 16 bits of f_lo_iu_dc@plt
.*: 3040 00a0 li \$2,160
# ^ low 16 bits of f_lo_iu_ic@plt
.*: 3040 0190 li \$2,400
# ^ low 16 bits of f_lo_iu_ic_dc@plt
.*: 3040 0130 li \$2,304
# ^ low 16 bits of f_lo_iu_du@plt
.*: 3040 0030 li \$2,48
# ^ low 16 bits of f_lo_iu_du_dc@plt
.*: 3040 01a0 li \$2,416
# ^ low 16 bits of f_lo_iu_du_ic@plt
.*: 3040 01b0 li \$2,432
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt

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Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10201000
#...
0x70000013 \(MIPS_GOTSYM\) 0x1f
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10004000
0x00000002 \(PLTRELSZ\) 224 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100020 f_lo_iu
1020000c [^ ]+ R_MIPS_JUMP_SLOT 10100030 f_lo_iu_du_dc
10200010 [^ ]+ R_MIPS_JUMP_SLOT 10100040 f_lo_du_ic_dc
10200014 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_dc
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100060 f_lo_iu_dc
1020001c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_ic
10200020 [^ ]+ R_MIPS_JUMP_SLOT 10100080 f_lo_du_ic
10200024 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_dc
10200028 [^ ]+ R_MIPS_JUMP_SLOT 101000a0 f_lo_iu_ic
1020002c [^ ]+ R_MIPS_JUMP_SLOT 101000b0 f_lo_ic
10200030 [^ ]+ R_MIPS_JUMP_SLOT 101000c0 f_lo_du_dc
10200034 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du
10200038 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_ic_dc
1020003c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_ic
10200040 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_dc
10200044 [^ ]+ R_MIPS_JUMP_SLOT 10100110 f_lo_dc
10200048 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du
1020004c [^ ]+ R_MIPS_JUMP_SLOT 10100130 f_lo_iu_du
10200050 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_dc
10200054 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_ic_dc
10200058 [^ ]+ R_MIPS_JUMP_SLOT 10100160 f_lo_du
1020005c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_ic_dc
10200060 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_ic_dc
10200064 [^ ]+ R_MIPS_JUMP_SLOT 10100190 f_lo_iu_ic_dc
10200068 [^ ]+ R_MIPS_JUMP_SLOT 101001a0 f_lo_iu_du_ic
1020006c [^ ]+ R_MIPS_JUMP_SLOT 101001b0 f_lo_iu_du_ic_dc
10200070 [^ ]+ R_MIPS_JUMP_SLOT 101001c0 f_lo_ic_dc
10200074 [^ ]+ R_MIPS_JUMP_SLOT 101001d0 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# _lo symbols have their address taken, so their PLT symbols need to have
# a nonzero value. They must also have STO_MIPS_PLT in order to distinguish
# them from old-style lazy-binding stubs. Non-_lo symbols are only called,
# so their PLT symbols should have a zero value and no STO_MIPS_PLT annotation.
.*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
.*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
#...
.*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_dc
.*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_ic
.*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_dc
.*: 101000a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
.*: 101000b0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
.*: 101000c0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_ic
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_dc
.*: 10100110 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du
.*: 10100130 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_ic_dc
.*: 10100160 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_ic_dc
#...
.*: 10100190 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic_dc
.*: 101001a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic
.*: 101001b0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic_dc
.*: 101001c0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic_dc
.*: 101001d0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. The symbol value
# is the address of the lazy-binding stub.
31: 10101019 0 FUNC GLOBAL DEFAULT UND f_iu_ic
32: 1010100d 0 FUNC GLOBAL DEFAULT UND f_ic
33: 10101001 0 FUNC GLOBAL DEFAULT UND f_iu
Symbol table '\.symtab' .*
#...
Primary GOT:
Canonical gp value: 10208ff0
Reserved entries:
Address Access Initial Purpose
10201000 -32752\(gp\) 00000000 Lazy resolver
10201004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10201008 -32744\(gp\) 10100150
1020100c -32740\(gp\) 101000f0
10201010 -32736\(gp\) 101000e0
10201014 -32732\(gp\) 10100170
10201018 -32728\(gp\) 10100070
1020101c -32724\(gp\) 10100180
10201020 -32720\(gp\) 101000b0
10201024 -32716\(gp\) 101001c0
10201028 -32712\(gp\) 10100080
1020102c -32708\(gp\) 10100040
10201030 -32704\(gp\) 101000a0
10201034 -32700\(gp\) 10100190
10201038 -32696\(gp\) 101001a0
1020103c -32692\(gp\) 101001b0
10201040 -32688\(gp\) 10100090
10201044 -32684\(gp\) 10100120
10201048 -32680\(gp\) 10100100
1020104c -32676\(gp\) 10100020
10201050 -32672\(gp\) 10100060
10201054 -32668\(gp\) 10100130
10201058 -32664\(gp\) 10100030
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
1020105c -32660\(gp\) 10101019 10101019 FUNC UND f_iu_ic
10201060 -32656\(gp\) 1010100d 1010100d FUNC UND f_ic
10201064 -32652\(gp\) 10101001 10101001 FUNC UND f_iu
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100000 10100020 FUNC UND f_lo_iu
1020000c 10100000 10100030 FUNC UND f_lo_iu_du_dc
10200010 10100000 10100040 FUNC UND f_lo_du_ic_dc
10200014 10100000 00000000 FUNC UND f_du_dc
10200018 10100000 10100060 FUNC UND f_lo_iu_dc
1020001c 10100000 00000000 FUNC UND f_iu_du_ic
10200020 10100000 10100080 FUNC UND f_lo_du_ic
10200024 10100000 00000000 FUNC UND f_iu_dc
10200028 10100000 101000a0 FUNC UND f_lo_iu_ic
1020002c 10100000 101000b0 FUNC UND f_lo_ic
10200030 10100000 101000c0 FUNC UND f_lo_du_dc
10200034 10100000 00000000 FUNC UND f_du
10200038 10100000 00000000 FUNC UND f_du_ic_dc
1020003c 10100000 00000000 FUNC UND f_du_ic
10200040 10100000 00000000 FUNC UND f_iu_du_dc
10200044 10100000 10100110 FUNC UND f_lo_dc
10200048 10100000 00000000 FUNC UND f_iu_du
1020004c 10100000 10100130 FUNC UND f_lo_iu_du
10200050 10100000 00000000 FUNC UND f_dc
10200054 10100000 00000000 FUNC UND f_ic_dc
10200058 10100000 10100160 FUNC UND f_lo_du
1020005c 10100000 00000000 FUNC UND f_iu_ic_dc
10200060 10100000 00000000 FUNC UND f_iu_du_ic_dc
10200064 10100000 10100190 FUNC UND f_lo_iu_ic_dc
10200068 10100000 101001a0 FUNC UND f_lo_iu_du_ic
1020006c 10100000 101001b0 FUNC UND f_lo_iu_du_ic_dc
10200070 10100000 101001c0 FUNC UND f_lo_ic_dc
10200074 10100000 101001d0 FUNC UND f_lo

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.* file format .*
Disassembly of section \.plt:
# Only _dc (direct call from compressed code) functions should have a
# MIPS16 PLT. Note that indirect calls do not influence the choice,
# so f_ic and f_lo_ic have MIPS rather than MIPS16 PLTs.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07821 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90008 lw \$25,8\(\$15\)
.*: 03200008 jr \$25
.*: 25f80008 addiu \$24,\$15,8
10100030 <f_lo_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100040 <f_lo_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100050 <f_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100060 <f_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100070 <f_lo_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90020 lw \$25,32\(\$15\)
.*: 03200008 jr \$25
.*: 25f80020 addiu \$24,\$15,32
10100080 <f_lo_iu_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90028 lw \$25,40\(\$15\)
.*: 03200008 jr \$25
.*: 25f80028 addiu \$24,\$15,40
10100090 <f_lo_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9002c lw \$25,44\(\$15\)
.*: 03200008 jr \$25
.*: 25f8002c addiu \$24,\$15,44
101000a0 <f_lo_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90030 lw \$25,48\(\$15\)
.*: 03200008 jr \$25
.*: 25f80030 addiu \$24,\$15,48
101000b0 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90034 lw \$25,52\(\$15\)
.*: 03200008 jr \$25
.*: 25f80034 addiu \$24,\$15,52
101000c0 <f_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90038 lw \$25,56\(\$15\)
.*: 03200008 jr \$25
.*: 25f80038 addiu \$24,\$15,56
101000d0 <f_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9003c lw \$25,60\(\$15\)
.*: 03200008 jr \$25
.*: 25f8003c addiu \$24,\$15,60
101000e0 <f_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90040 lw \$25,64\(\$15\)
.*: 03200008 jr \$25
.*: 25f80040 addiu \$24,\$15,64
101000f0 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90048 lw \$25,72\(\$15\)
.*: 03200008 jr \$25
.*: 25f80048 addiu \$24,\$15,72
10100100 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9004c lw \$25,76\(\$15\)
.*: 03200008 jr \$25
.*: 25f8004c addiu \$24,\$15,76
10100110 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90058 lw \$25,88\(\$15\)
.*: 03200008 jr \$25
.*: 25f80058 addiu \$24,\$15,88
10100120 <f_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90060 lw \$25,96\(\$15\)
.*: 03200008 jr \$25
.*: 25f80060 addiu \$24,\$15,96
10100130 <f_lo_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90068 lw \$25,104\(\$15\)
.*: 03200008 jr \$25
.*: 25f80068 addiu \$24,\$15,104
10100140 <f_lo_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9006c lw \$25,108\(\$15\)
.*: 03200008 jr \$25
.*: 25f8006c addiu \$24,\$15,108
10100150 <f_lo@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90074 lw \$25,116\(\$15\)
.*: 03200008 jr \$25
.*: 25f80074 addiu \$24,\$15,116
10100160 <f_lo_iu_du_dc@mips16plt>:
.*: b203 lw \$2,1010016c <f_lo_iu_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020000c
10100170 <f_lo_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010017c <f_lo_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200010
10100180 <f_du_dc@mips16plt>:
.*: b203 lw \$2,1010018c <f_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200014
10100190 <f_lo_iu_dc@mips16plt>:
.*: b203 lw \$2,1010019c <f_lo_iu_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200018
101001a0 <f_iu_dc@mips16plt>:
.*: b203 lw \$2,101001ac <f_iu_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200024
101001b0 <f_lo_du_dc@mips16plt>:
.*: b203 lw \$2,101001bc <f_lo_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200030
101001c0 <f_du_ic_dc@mips16plt>:
.*: b203 lw \$2,101001cc <f_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200038
101001d0 <f_iu_du_dc@mips16plt>:
.*: b203 lw \$2,101001dc <f_iu_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200040
101001e0 <f_lo_dc@mips16plt>:
.*: b203 lw \$2,101001ec <f_lo_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200044
101001f0 <f_dc@mips16plt>:
.*: b203 lw \$2,101001fc <f_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200050
10100200 <f_ic_dc@mips16plt>:
.*: b203 lw \$2,1010020c <f_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200054
10100210 <f_iu_ic_dc@mips16plt>:
.*: b203 lw \$2,1010021c <f_iu_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020005c
10100220 <f_iu_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010022c <f_iu_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200060
10100230 <f_lo_iu_ic_dc@mips16plt>:
.*: b203 lw \$2,1010023c <f_lo_iu_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200064
10100240 <f_lo_iu_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010024c <f_lo_iu_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020006c
10100250 <f_lo_ic_dc@mips16plt>:
.*: b203 lw \$2,1010025c <f_lo_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200070
Disassembly of section \.text\.a:
10101000 <testc>:
.*: .... .... jal [0-9a-f]+ <f_dc@mips16plt>
.*: 6500 nop
.*: f090 9b4c lw \$2,-32628\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jal [0-9a-f]+ <f_ic_dc@mips16plt>
.*: 6500 nop
.*: f010 9b58 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_du_dc@mips16plt>
.*: 6500 nop
.*: f010 9b5c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b40 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_iu_dc@mips16plt>
.*: 6500 nop
.*: f090 9b48 lw \$2,-32632\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: .... .... jal [0-9a-f]+ <f_iu_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b44 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_dc@mips16plt>
.*: 6500 nop
.*: f030 9b48 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b4c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_dc@mips16plt>
.*: 6500 nop
.*: f030 9b50 lw \$2,-32720\(\$3\)
# ^ local GOT entry for f_lo_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b54 lw \$2,-32716\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_dc@mips16plt>
.*: 6500 nop
.*: f030 9b58 lw \$2,-32712\(\$3\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b5c lw \$2,-32708\(\$3\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_dc@mips16plt>
.*: 6500 nop
.*: f050 9b40 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_ic_dc@mips16plt>
.*: 6500 nop
.*: f050 9b44 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_dc@mips16plt>
.*: 6500 nop
.*: f050 9b48 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f050 9b4c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: e820 jr \$31
Disassembly of section \.text\.b:
10102000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c628090 lw \$2,-32624\(\$3\)
# ^ global GOT entry for f_iu
.*: 8c628050 lw \$2,-32688\(\$3\)
# ^ local GOT entry for f_iu_dc@mips16plt
.*: 8c628088 lw \$2,-32632\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@mips16plt
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628054 lw \$2,-32684\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628058 lw \$2,-32680\(\$3\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62805c lw \$2,-32676\(\$3\)
# ^ local GOT entry for f_lo_iu@plt
.*: 8c628060 lw \$2,-32672\(\$3\)
# ^ local GOT entry for f_lo_iu_dc@mips16plt
.*: 8c628040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: 8c628044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@mips16plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628064 lw \$2,-32668\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628068 lw \$2,-32664\(\$3\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10103000 <testlo>:
.*: 24020150 li \$2,336
# ^ low 16 bits of f_lo@plt
.*: 240201e1 li \$2,481
# ^ low 16 bits of f_lo_dc@mips16plt
.*: 24020090 li \$2,144
# ^ low 16 bits of f_lo_ic@plt
.*: 24020251 li \$2,593
# ^ low 16 bits of f_lo_ic_dc@mips16plt
.*: 24020110 li \$2,272
# ^ low 16 bits of f_lo_du@plt
.*: 240200a0 li \$2,160
# ^ low 16 bits of f_lo_du_dc@plt
.*: 24020070 li \$2,112
# ^ low 16 bits of f_lo_du_ic@plt
.*: 24020040 li \$2,64
# ^ low 16 bits of f_lo_du_ic_dc@plt
.*: 24020020 li \$2,32
# ^ low 16 bits of f_lo_iu@plt
.*: 24020191 li \$2,401
# ^ low 16 bits of f_lo_iu_dc@mips16plt
.*: 24020080 li \$2,128
# ^ low 16 bits of f_lo_iu_ic@plt
.*: 24020231 li \$2,561
# ^ low 16 bits of f_lo_iu_ic_dc@mips16plt
.*: 24020100 li \$2,256
# ^ low 16 bits of f_lo_iu_du@plt
.*: 24020030 li \$2,48
# ^ low 16 bits of f_lo_iu_du_dc@plt
.*: 24020130 li \$2,304
# ^ low 16 bits of f_lo_iu_du_ic@plt
.*: 24020140 li \$2,320
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt
Disassembly of section \.text\.d:
10104000 <testgot>:
.*: 8f828094 lw \$2,-32620\(\$28\)
# ^ global GOT entry for f
.*: 8f82806c lw \$2,-32660\(\$28\)
# ^ local GOT entry for f_dc@mips16plt
.*: 8f82808c lw \$2,-32628\(\$28\)
# ^ global GOT entry for f_ic
.*: 8f828018 lw \$2,-32744\(\$28\)
# ^ local GOT entry for f_ic_dc@mips16plt
.*: 8f828070 lw \$2,-32656\(\$28\)
# ^ local GOT entry for f_du@plt
.*: 8f828074 lw \$2,-32652\(\$28\)
# ^ local GOT entry for f_du_dc@plt
.*: 8f82801c lw \$2,-32740\(\$28\)
# ^ local GOT entry for f_du_ic@plt
.*: 8f828020 lw \$2,-32736\(\$28\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: 8f828090 lw \$2,-32624\(\$28\)
# ^ global GOT entry for f_iu
.*: 8f828050 lw \$2,-32688\(\$28\)
# ^ local GOT entry for f_iu_dc@mips16plt
.*: 8f828088 lw \$2,-32632\(\$28\)
# ^ global GOT entry for f_iu_ic
.*: 8f828024 lw \$2,-32732\(\$28\)
# ^ local GOT entry for f_iu_ic_dc@mips16plt
.*: 8f828054 lw \$2,-32684\(\$28\)
# ^ local GOT entry for f_iu_du@plt
.*: 8f828058 lw \$2,-32680\(\$28\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: 8f828028 lw \$2,-32728\(\$28\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: 8f82802c lw \$2,-32724\(\$28\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: 8f828078 lw \$2,-32648\(\$28\)
# ^ local GOT entry for f_lo@plt
.*: 8f82807c lw \$2,-32644\(\$28\)
# ^ local GOT entry for f_lo_dc@mips16plt
.*: 8f828030 lw \$2,-32720\(\$28\)
# ^ local GOT entry for f_lo_ic@plt
.*: 8f828034 lw \$2,-32716\(\$28\)
# ^ local GOT entry for f_lo_ic_dc@mips16plt
.*: 8f828080 lw \$2,-32640\(\$28\)
# ^ local GOT entry for f_lo_du@plt
.*: 8f828084 lw \$2,-32636\(\$28\)
# ^ local GOT entry for f_lo_du_dc@plt
.*: 8f828038 lw \$2,-32712\(\$28\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: 8f82803c lw \$2,-32708\(\$28\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: 8f82805c lw \$2,-32676\(\$28\)
# ^ local GOT entry for f_lo_iu@plt
.*: 8f828060 lw \$2,-32672\(\$28\)
# ^ local GOT entry for f_lo_iu_dc@mips16plt
.*: 8f828040 lw \$2,-32704\(\$28\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: 8f828044 lw \$2,-32700\(\$28\)
# ^ local GOT entry for f_lo_iu_ic_dc@mips16plt
.*: 8f828064 lw \$2,-32668\(\$28\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: 8f828068 lw \$2,-32664\(\$28\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: 8f828048 lw \$2,-32696\(\$28\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: 8f82804c lw \$2,-32692\(\$28\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt

View File

@ -0,0 +1,179 @@
Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10201000
#...
0x70000013 \(MIPS_GOTSYM\) 0x1f
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10004000
0x00000002 \(PLTRELSZ\) 224 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100020 f_lo_iu
1020000c [^ ]+ R_MIPS_JUMP_SLOT 10100030 f_lo_iu_du_dc
10200010 [^ ]+ R_MIPS_JUMP_SLOT 10100040 f_lo_du_ic_dc
10200014 [^ ]+ R_MIPS_JUMP_SLOT 10100050 f_du_dc
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100191 f_lo_iu_dc
1020001c [^ ]+ R_MIPS_JUMP_SLOT 10100060 f_iu_du_ic
10200020 [^ ]+ R_MIPS_JUMP_SLOT 10100070 f_lo_du_ic
10200024 [^ ]+ R_MIPS_JUMP_SLOT 101001a1 f_iu_dc
10200028 [^ ]+ R_MIPS_JUMP_SLOT 10100080 f_lo_iu_ic
1020002c [^ ]+ R_MIPS_JUMP_SLOT 10100090 f_lo_ic
10200030 [^ ]+ R_MIPS_JUMP_SLOT 101000a0 f_lo_du_dc
10200034 [^ ]+ R_MIPS_JUMP_SLOT 101000b0 f_du
10200038 [^ ]+ R_MIPS_JUMP_SLOT 101000c0 f_du_ic_dc
1020003c [^ ]+ R_MIPS_JUMP_SLOT 101000d0 f_du_ic
10200040 [^ ]+ R_MIPS_JUMP_SLOT 101000e0 f_iu_du_dc
10200044 [^ ]+ R_MIPS_JUMP_SLOT 101001e1 f_lo_dc
10200048 [^ ]+ R_MIPS_JUMP_SLOT 101000f0 f_iu_du
1020004c [^ ]+ R_MIPS_JUMP_SLOT 10100100 f_lo_iu_du
10200050 [^ ]+ R_MIPS_JUMP_SLOT 101001f1 f_dc
10200054 [^ ]+ R_MIPS_JUMP_SLOT 10100201 f_ic_dc
10200058 [^ ]+ R_MIPS_JUMP_SLOT 10100110 f_lo_du
1020005c [^ ]+ R_MIPS_JUMP_SLOT 10100211 f_iu_ic_dc
10200060 [^ ]+ R_MIPS_JUMP_SLOT 10100120 f_iu_du_ic_dc
10200064 [^ ]+ R_MIPS_JUMP_SLOT 10100231 f_lo_iu_ic_dc
10200068 [^ ]+ R_MIPS_JUMP_SLOT 10100130 f_lo_iu_du_ic
1020006c [^ ]+ R_MIPS_JUMP_SLOT 10100140 f_lo_iu_du_ic_dc
10200070 [^ ]+ R_MIPS_JUMP_SLOT 10100251 f_lo_ic_dc
10200074 [^ ]+ R_MIPS_JUMP_SLOT 10100150 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# All symbols have their address taken, so PLT symbols need to have a nonzero
# value. They must also have STO_MIPS_PLT in order to distinguish them from
# old-style lazy-binding stubs).
#
# A MIPS16 PLT should only be used as the symbol value if the function has
# a direct MIPS16 caller (dc) and no direct MIPS caller (du).
.*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
.*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
#...
.*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
.*: 10100050 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_dc
.*: 10100191 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
.*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic
.*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
.*: 101001a1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_dc
.*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
.*: 10100090 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
.*: 101000a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
.*: 101000b0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du
.*: 101000c0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_ic_dc
.*: 101000d0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_ic
.*: 101000e0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_dc
.*: 101001e1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
.*: 101000f0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du
.*: 10100100 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
.*: 101001f1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_dc
.*: 10100201 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_ic_dc
.*: 10100110 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du
.*: 10100211 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_ic_dc
.*: 10100120 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic_dc
#...
.*: 10100231 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic_dc
.*: 10100130 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic
.*: 10100140 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic_dc
.*: 10100251 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic_dc
.*: 10100150 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. Since the functions
# have their addresses taken, they cannot use a lazy-binding stub.
# The symbol values are therefore all zero.
31: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_ic
32: 00000000 0 FUNC GLOBAL DEFAULT UND f_ic
33: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu
34: 00000000 0 FUNC GLOBAL DEFAULT UND f
Symbol table '\.symtab' .*
#...
Primary GOT:
Canonical gp value: 10208ff0
Reserved entries:
Address Access Initial Purpose
10201000 -32752\(gp\) 00000000 Lazy resolver
10201004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10201008 -32744\(gp\) 10100201
1020100c -32740\(gp\) 101000d0
10201010 -32736\(gp\) 101000c0
10201014 -32732\(gp\) 10100211
10201018 -32728\(gp\) 10100060
1020101c -32724\(gp\) 10100120
10201020 -32720\(gp\) 10100090
10201024 -32716\(gp\) 10100251
10201028 -32712\(gp\) 10100070
1020102c -32708\(gp\) 10100040
10201030 -32704\(gp\) 10100080
10201034 -32700\(gp\) 10100231
10201038 -32696\(gp\) 10100130
1020103c -32692\(gp\) 10100140
10201040 -32688\(gp\) 101001a1
10201044 -32684\(gp\) 101000f0
10201048 -32680\(gp\) 101000e0
1020104c -32676\(gp\) 10100020
10201050 -32672\(gp\) 10100191
10201054 -32668\(gp\) 10100100
10201058 -32664\(gp\) 10100030
1020105c -32660\(gp\) 101001f1
10201060 -32656\(gp\) 101000b0
10201064 -32652\(gp\) 10100050
10201068 -32648\(gp\) 10100150
1020106c -32644\(gp\) 101001e1
10201070 -32640\(gp\) 10100110
10201074 -32636\(gp\) 101000a0
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
10201078 -32632\(gp\) 00000000 00000000 FUNC UND f_iu_ic
1020107c -32628\(gp\) 00000000 00000000 FUNC UND f_ic
10201080 -32624\(gp\) 00000000 00000000 FUNC UND f_iu
10201084 -32620\(gp\) 00000000 00000000 FUNC UND f
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100000 10100020 FUNC UND f_lo_iu
1020000c 10100000 10100030 FUNC UND f_lo_iu_du_dc
10200010 10100000 10100040 FUNC UND f_lo_du_ic_dc
10200014 10100000 10100050 FUNC UND f_du_dc
10200018 10100000 10100191 FUNC UND f_lo_iu_dc
1020001c 10100000 10100060 FUNC UND f_iu_du_ic
10200020 10100000 10100070 FUNC UND f_lo_du_ic
10200024 10100000 101001a1 FUNC UND f_iu_dc
10200028 10100000 10100080 FUNC UND f_lo_iu_ic
1020002c 10100000 10100090 FUNC UND f_lo_ic
10200030 10100000 101000a0 FUNC UND f_lo_du_dc
10200034 10100000 101000b0 FUNC UND f_du
10200038 10100000 101000c0 FUNC UND f_du_ic_dc
1020003c 10100000 101000d0 FUNC UND f_du_ic
10200040 10100000 101000e0 FUNC UND f_iu_du_dc
10200044 10100000 101001e1 FUNC UND f_lo_dc
10200048 10100000 101000f0 FUNC UND f_iu_du
1020004c 10100000 10100100 FUNC UND f_lo_iu_du
10200050 10100000 101001f1 FUNC UND f_dc
10200054 10100000 10100201 FUNC UND f_ic_dc
10200058 10100000 10100110 FUNC UND f_lo_du
1020005c 10100000 10100211 FUNC UND f_iu_ic_dc
10200060 10100000 10100120 FUNC UND f_iu_du_ic_dc
10200064 10100000 10100231 FUNC UND f_lo_iu_ic_dc
10200068 10100000 10100130 FUNC UND f_lo_iu_du_ic
1020006c 10100000 10100140 FUNC UND f_lo_iu_du_ic_dc
10200070 10100000 10100251 FUNC UND f_lo_ic_dc
10200074 10100000 10100150 FUNC UND f_lo

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.* file format .*
Disassembly of section \.plt:
# Only _dc (direct call from compressed code) functions should have a
# MIPS16 PLT. Note that indirect calls do not influence the choice,
# so f_ic and f_lo_ic have MIPS rather than MIPS16 PLTs.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07821 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90008 lw \$25,8\(\$15\)
.*: 03200008 jr \$25
.*: 25f80008 addiu \$24,\$15,8
10100030 <f_lo@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100040 <f_lo_dc@mips16plt>:
.*: b203 lw \$2,1010004c <f_lo_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020000c
10100050 <f_dc@mips16plt>:
.*: b203 lw \$2,1010005c <f_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200010
10100060 <f_ic_dc@mips16plt>:
.*: b203 lw \$2,1010006c <f_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200014
10100070 <f_lo_ic_dc@mips16plt>:
.*: b203 lw \$2,1010007c <f_lo_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200018
Disassembly of section \.MIPS\.stubs:
10101000 <_MIPS_STUBS_>:
# Lazy-binding stub for f_ic.
.*: 8f998010 lw \$25,-32752\(\$28\)
.*: 03e07821 move \$15,\$31
.*: 0320f809 jalr \$25
.*: 24180009 li \$24,9
\.\.\.
Disassembly of section \.text\.a:
10102000 <testc>:
.*: .... .... jal [0-9a-f]+ <f_dc@mips16plt>
.*: 6500 nop
.*: f030 9b44 lw \$2,-32732\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jal [0-9a-f]+ <f_ic_dc@mips16plt>
.*: 6500 nop
.*: f010 9b58 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_lo_dc@mips16plt>
.*: 6500 nop
.*: f010 9b5c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_lo_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b40 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@mips16plt
.*: e820 jr \$31
Disassembly of section \.text\.c:
10103000 <testlo>:
.*: 24020030 li \$2,48
# ^ low 16 bits of f_lo@plt
.*: 24020041 li \$2,65
# ^ low 16 bits of f_lo_dc@mips16plt
.*: 24020020 li \$2,32
# ^ low 16 bits of f_lo_ic@plt
.*: 24020071 li \$2,113
# ^ low 16 bits of f_lo_ic_dc@mips16plt

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Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10201000
#...
0x70000013 \(MIPS_GOTSYM\) 0x9
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10004000
0x00000002 \(PLTRELSZ\) 48 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100020 f_lo_ic
1020000c [^ ]+ R_MIPS_JUMP_SLOT 10100041 f_lo_dc
10200010 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_dc
10200014 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_ic_dc
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100071 f_lo_ic_dc
1020001c [^ ]+ R_MIPS_JUMP_SLOT 10100030 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# _lo symbols have their address taken, so their PLT symbols need to have
# a nonzero value. They must also have STO_MIPS_PLT in order to distinguish
# them from old-style lazy-binding stubs. Non-_lo symbols are only called,
# so their PLT symbols should have a zero value and no STO_MIPS_PLT annotation.
#
# A MIPS16 PLT should only be used as the symbol value if the function has
# a direct MIPS16 caller (dc) and no direct MIPS caller (du).
#...
.*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
.*: 10100041 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_ic_dc
#...
.*: 10100071 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic_dc
.*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. The symbol value
# is the address of the lazy-binding stub.
9: 10101000 0 FUNC GLOBAL DEFAULT UND f_ic
Symbol table '\.symtab' .*
#...
Primary GOT:
Canonical gp value: 10208ff0
Reserved entries:
Address Access Initial Purpose
10201000 -32752\(gp\) 00000000 Lazy resolver
10201004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10201008 -32744\(gp\) 10100061
1020100c -32740\(gp\) 10100020
10201010 -32736\(gp\) 10100071
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
10201014 -32732\(gp\) 10101000 10101000 FUNC UND f_ic
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100000 10100020 FUNC UND f_lo_ic
1020000c 10100000 10100041 FUNC UND f_lo_dc
10200010 10100000 00000000 FUNC UND f_dc
10200014 10100000 00000000 FUNC UND f_ic_dc
10200018 10100000 10100071 FUNC UND f_lo_ic_dc
1020001c 10100000 10100030 FUNC UND f_lo

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.* file format .*
Disassembly of section \.plt:
# Only _dc (direct call from compressed code) functions should have a
# MIPS16 PLT. Note that indirect calls do not influence the choice,
# so f_ic and f_lo_ic have MIPS rather than MIPS16 PLTs.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07821 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90008 lw \$25,8\(\$15\)
.*: 03200008 jr \$25
.*: 25f80008 addiu \$24,\$15,8
10100030 <f_lo_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100040 <f_lo_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100050 <f_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100060 <f_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100070 <f_lo_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90020 lw \$25,32\(\$15\)
.*: 03200008 jr \$25
.*: 25f80020 addiu \$24,\$15,32
10100080 <f_lo_iu_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90028 lw \$25,40\(\$15\)
.*: 03200008 jr \$25
.*: 25f80028 addiu \$24,\$15,40
10100090 <f_lo_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9002c lw \$25,44\(\$15\)
.*: 03200008 jr \$25
.*: 25f8002c addiu \$24,\$15,44
101000a0 <f_lo_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90030 lw \$25,48\(\$15\)
.*: 03200008 jr \$25
.*: 25f80030 addiu \$24,\$15,48
101000b0 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90034 lw \$25,52\(\$15\)
.*: 03200008 jr \$25
.*: 25f80034 addiu \$24,\$15,52
101000c0 <f_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90038 lw \$25,56\(\$15\)
.*: 03200008 jr \$25
.*: 25f80038 addiu \$24,\$15,56
101000d0 <f_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9003c lw \$25,60\(\$15\)
.*: 03200008 jr \$25
.*: 25f8003c addiu \$24,\$15,60
101000e0 <f_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90040 lw \$25,64\(\$15\)
.*: 03200008 jr \$25
.*: 25f80040 addiu \$24,\$15,64
101000f0 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90048 lw \$25,72\(\$15\)
.*: 03200008 jr \$25
.*: 25f80048 addiu \$24,\$15,72
10100100 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9004c lw \$25,76\(\$15\)
.*: 03200008 jr \$25
.*: 25f8004c addiu \$24,\$15,76
10100110 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90058 lw \$25,88\(\$15\)
.*: 03200008 jr \$25
.*: 25f80058 addiu \$24,\$15,88
10100120 <f_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90060 lw \$25,96\(\$15\)
.*: 03200008 jr \$25
.*: 25f80060 addiu \$24,\$15,96
10100130 <f_lo_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90068 lw \$25,104\(\$15\)
.*: 03200008 jr \$25
.*: 25f80068 addiu \$24,\$15,104
10100140 <f_lo_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9006c lw \$25,108\(\$15\)
.*: 03200008 jr \$25
.*: 25f8006c addiu \$24,\$15,108
10100150 <f_lo@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90074 lw \$25,116\(\$15\)
.*: 03200008 jr \$25
.*: 25f80074 addiu \$24,\$15,116
10100160 <f_lo_iu_du_dc@mips16plt>:
.*: b203 lw \$2,1010016c <f_lo_iu_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020000c
10100170 <f_lo_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010017c <f_lo_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200010
10100180 <f_du_dc@mips16plt>:
.*: b203 lw \$2,1010018c <f_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200014
10100190 <f_lo_iu_dc@mips16plt>:
.*: b203 lw \$2,1010019c <f_lo_iu_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200018
101001a0 <f_iu_dc@mips16plt>:
.*: b203 lw \$2,101001ac <f_iu_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200024
101001b0 <f_lo_du_dc@mips16plt>:
.*: b203 lw \$2,101001bc <f_lo_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200030
101001c0 <f_du_ic_dc@mips16plt>:
.*: b203 lw \$2,101001cc <f_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200038
101001d0 <f_iu_du_dc@mips16plt>:
.*: b203 lw \$2,101001dc <f_iu_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200040
101001e0 <f_lo_dc@mips16plt>:
.*: b203 lw \$2,101001ec <f_lo_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200044
101001f0 <f_dc@mips16plt>:
.*: b203 lw \$2,101001fc <f_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200050
10100200 <f_ic_dc@mips16plt>:
.*: b203 lw \$2,1010020c <f_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200054
10100210 <f_iu_ic_dc@mips16plt>:
.*: b203 lw \$2,1010021c <f_iu_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020005c
10100220 <f_iu_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010022c <f_iu_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200060
10100230 <f_lo_iu_ic_dc@mips16plt>:
.*: b203 lw \$2,1010023c <f_lo_iu_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200064
10100240 <f_lo_iu_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010024c <f_lo_iu_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020006c
10100250 <f_lo_ic_dc@mips16plt>:
.*: b203 lw \$2,1010025c <f_lo_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200070
Disassembly of section \.text\.a:
10101000 <testc>:
.*: .... .... jal [0-9a-f]+ <f_dc@mips16plt>
.*: 6500 nop
.*: f070 9b50 lw \$2,-32656\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jal [0-9a-f]+ <f_ic_dc@mips16plt>
.*: 6500 nop
.*: f010 9b58 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_du_dc@mips16plt>
.*: 6500 nop
.*: f010 9b5c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b40 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_iu_dc@mips16plt>
.*: 6500 nop
.*: f070 9b4c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: .... .... jal [0-9a-f]+ <f_iu_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b44 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_dc@mips16plt>
.*: 6500 nop
.*: f030 9b48 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b4c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_dc@mips16plt>
.*: 6500 nop
.*: f030 9b50 lw \$2,-32720\(\$3\)
# ^ local GOT entry for f_lo_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b54 lw \$2,-32716\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_dc@mips16plt>
.*: 6500 nop
.*: f030 9b58 lw \$2,-32712\(\$3\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b5c lw \$2,-32708\(\$3\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_dc@mips16plt>
.*: 6500 nop
.*: f050 9b40 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_ic_dc@mips16plt>
.*: 6500 nop
.*: f050 9b44 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_dc@mips16plt>
.*: 6500 nop
.*: f050 9b48 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f050 9b4c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: e820 jr \$31
Disassembly of section \.text\.b:
10102000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c628074 lw \$2,-32652\(\$3\)
# ^ global GOT entry for f_iu
.*: 8c628050 lw \$2,-32688\(\$3\)
# ^ local GOT entry for f_iu_dc@mips16plt
.*: 8c62806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@mips16plt
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628054 lw \$2,-32684\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628058 lw \$2,-32680\(\$3\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62805c lw \$2,-32676\(\$3\)
# ^ local GOT entry for f_lo_iu@plt
.*: 8c628060 lw \$2,-32672\(\$3\)
# ^ local GOT entry for f_lo_iu_dc@mips16plt
.*: 8c628040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: 8c628044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@mips16plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628064 lw \$2,-32668\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628068 lw \$2,-32664\(\$3\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10103000 <testlo>:
.*: 24020150 li \$2,336
# ^ low 16 bits of f_lo@plt
.*: 240201e1 li \$2,481
# ^ low 16 bits of f_lo_dc@mips16plt
.*: 24020090 li \$2,144
# ^ low 16 bits of f_lo_ic@plt
.*: 24020251 li \$2,593
# ^ low 16 bits of f_lo_ic_dc@mips16plt
.*: 24020110 li \$2,272
# ^ low 16 bits of f_lo_du@plt
.*: 240200a0 li \$2,160
# ^ low 16 bits of f_lo_du_dc@plt
.*: 24020070 li \$2,112
# ^ low 16 bits of f_lo_du_ic@plt
.*: 24020040 li \$2,64
# ^ low 16 bits of f_lo_du_ic_dc@plt
.*: 24020020 li \$2,32
# ^ low 16 bits of f_lo_iu@plt
.*: 24020191 li \$2,401
# ^ low 16 bits of f_lo_iu_dc@mips16plt
.*: 24020080 li \$2,128
# ^ low 16 bits of f_lo_iu_ic@plt
.*: 24020231 li \$2,561
# ^ low 16 bits of f_lo_iu_ic_dc@mips16plt
.*: 24020100 li \$2,256
# ^ low 16 bits of f_lo_iu_du@plt
.*: 24020030 li \$2,48
# ^ low 16 bits of f_lo_iu_du_dc@plt
.*: 24020130 li \$2,304
# ^ low 16 bits of f_lo_iu_du_ic@plt
.*: 24020140 li \$2,320
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt

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Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10202000
#...
0x70000013 \(MIPS_GOTSYM\) 0x1f
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10005000
0x00000002 \(PLTRELSZ\) 224 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.dyn' .*
# All symbols are referenced by a .word in the .data section, so pointer
# equality matters. If a PLT is needed to satisfy a direct call or %lo
# relocation, the symbol should have a nonzero value and there should be
# no dynamic relocations against it. The only relocations here are for
# undefined 0-value symbols. Note that unlike x86, we do not create a PLT
# for the uncalled symbol 'f' in order to maintain backward compatibility
# with pre-PLT ld.sos.
Offset Info Type Sym\.Value Sym\. Name
00000000 00000000 R_MIPS_NONE
10201028 00001f03 R_MIPS_REL32 00000000 f_iu_ic
10201008 00002003 R_MIPS_REL32 00000000 f_ic
10201020 00002103 R_MIPS_REL32 00000000 f_iu
10201000 00002203 R_MIPS_REL32 00000000 f
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100020 f_lo_iu
1020000c [^ ]+ R_MIPS_JUMP_SLOT 10100030 f_lo_iu_du_dc
10200010 [^ ]+ R_MIPS_JUMP_SLOT 10100040 f_lo_du_ic_dc
10200014 [^ ]+ R_MIPS_JUMP_SLOT 10100050 f_du_dc
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100191 f_lo_iu_dc
1020001c [^ ]+ R_MIPS_JUMP_SLOT 10100060 f_iu_du_ic
10200020 [^ ]+ R_MIPS_JUMP_SLOT 10100070 f_lo_du_ic
10200024 [^ ]+ R_MIPS_JUMP_SLOT 101001a1 f_iu_dc
10200028 [^ ]+ R_MIPS_JUMP_SLOT 10100080 f_lo_iu_ic
1020002c [^ ]+ R_MIPS_JUMP_SLOT 10100090 f_lo_ic
10200030 [^ ]+ R_MIPS_JUMP_SLOT 101000a0 f_lo_du_dc
10200034 [^ ]+ R_MIPS_JUMP_SLOT 101000b0 f_du
10200038 [^ ]+ R_MIPS_JUMP_SLOT 101000c0 f_du_ic_dc
1020003c [^ ]+ R_MIPS_JUMP_SLOT 101000d0 f_du_ic
10200040 [^ ]+ R_MIPS_JUMP_SLOT 101000e0 f_iu_du_dc
10200044 [^ ]+ R_MIPS_JUMP_SLOT 101001e1 f_lo_dc
10200048 [^ ]+ R_MIPS_JUMP_SLOT 101000f0 f_iu_du
1020004c [^ ]+ R_MIPS_JUMP_SLOT 10100100 f_lo_iu_du
10200050 [^ ]+ R_MIPS_JUMP_SLOT 101001f1 f_dc
10200054 [^ ]+ R_MIPS_JUMP_SLOT 10100201 f_ic_dc
10200058 [^ ]+ R_MIPS_JUMP_SLOT 10100110 f_lo_du
1020005c [^ ]+ R_MIPS_JUMP_SLOT 10100211 f_iu_ic_dc
10200060 [^ ]+ R_MIPS_JUMP_SLOT 10100120 f_iu_du_ic_dc
10200064 [^ ]+ R_MIPS_JUMP_SLOT 10100231 f_lo_iu_ic_dc
10200068 [^ ]+ R_MIPS_JUMP_SLOT 10100130 f_lo_iu_du_ic
1020006c [^ ]+ R_MIPS_JUMP_SLOT 10100140 f_lo_iu_du_ic_dc
10200070 [^ ]+ R_MIPS_JUMP_SLOT 10100251 f_lo_ic_dc
10200074 [^ ]+ R_MIPS_JUMP_SLOT 10100150 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# All symbols have their address taken, so PLT symbols need to have a nonzero
# value. They must also have STO_MIPS_PLT in order to distinguish them from
# old-style lazy-binding stubs).
#
# A MIPS16 PLT should only be used as the symbol value if the function has
# a direct MIPS16 caller (dc) and no direct MIPS caller (du).
.*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
.*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
#...
.*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
.*: 10100050 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_dc
.*: 10100191 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
.*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic
.*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
.*: 101001a1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_dc
.*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
.*: 10100090 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
.*: 101000a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
.*: 101000b0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du
.*: 101000c0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_ic_dc
.*: 101000d0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_ic
.*: 101000e0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_dc
.*: 101001e1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
.*: 101000f0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du
.*: 10100100 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
.*: 101001f1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_dc
.*: 10100201 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_ic_dc
.*: 10100110 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du
.*: 10100211 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_ic_dc
.*: 10100120 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic_dc
#...
.*: 10100231 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic_dc
.*: 10100130 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic
.*: 10100140 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic_dc
.*: 10100251 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic_dc
.*: 10100150 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. Since the functions
# have their addresses taken, they cannot use a lazy-binding stub.
# The symbol values are therefore all zero.
31: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_ic
32: 00000000 0 FUNC GLOBAL DEFAULT UND f_ic
33: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu
34: 00000000 0 FUNC GLOBAL DEFAULT UND f
Symbol table '\.symtab' .*
#...
Hex dump of section '\.data':
0x10201000 (00000000|00000000) (101001f1|f1011010) (00000000|00000000) (10100201|01021010) .*
0x10201010 (101000b0|b0001010) (10100050|50001010) (101000d0|d0001010) (101000c0|c0001010) .*
0x10201020 (00000000|00000000) (101001a1|a1011010) (00000000|00000000) (10100211|11021010) .*
0x10201030 (101000f0|f0001010) (101000e0|e0001010) (10100060|60001010) (10100120|20011010) .*
0x10201040 (10100150|50011010) (101001e1|e1011010) (10100090|90001010) (10100251|51021010) .*
0x10201050 (10100110|10011010) (101000a0|a0001010) (10100070|70001010) (10100040|40001010) .*
0x10201060 (10100020|20001010) (10100191|91011010) (10100080|80001010) (10100231|31021010) .*
0x10201070 (10100100|00011010) (10100030|30001010) (10100130|30011010) (10100140|40011010) .*
Primary GOT:
Canonical gp value: 10209ff0
Reserved entries:
Address Access Initial Purpose
10202000 -32752\(gp\) 00000000 Lazy resolver
10202004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10202008 -32744\(gp\) 10100201
1020200c -32740\(gp\) 101000d0
10202010 -32736\(gp\) 101000c0
10202014 -32732\(gp\) 10100211
10202018 -32728\(gp\) 10100060
1020201c -32724\(gp\) 10100120
10202020 -32720\(gp\) 10100090
10202024 -32716\(gp\) 10100251
10202028 -32712\(gp\) 10100070
1020202c -32708\(gp\) 10100040
10202030 -32704\(gp\) 10100080
10202034 -32700\(gp\) 10100231
10202038 -32696\(gp\) 10100130
1020203c -32692\(gp\) 10100140
10202040 -32688\(gp\) 101001a1
10202044 -32684\(gp\) 101000f0
10202048 -32680\(gp\) 101000e0
1020204c -32676\(gp\) 10100020
10202050 -32672\(gp\) 10100191
10202054 -32668\(gp\) 10100100
10202058 -32664\(gp\) 10100030
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
1020205c -32660\(gp\) 00000000 00000000 FUNC UND f_iu_ic
10202060 -32656\(gp\) 00000000 00000000 FUNC UND f_ic
10202064 -32652\(gp\) 00000000 00000000 FUNC UND f_iu
10202068 -32648\(gp\) 00000000 00000000 FUNC UND f
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100000 10100020 FUNC UND f_lo_iu
1020000c 10100000 10100030 FUNC UND f_lo_iu_du_dc
10200010 10100000 10100040 FUNC UND f_lo_du_ic_dc
10200014 10100000 10100050 FUNC UND f_du_dc
10200018 10100000 10100191 FUNC UND f_lo_iu_dc
1020001c 10100000 10100060 FUNC UND f_iu_du_ic
10200020 10100000 10100070 FUNC UND f_lo_du_ic
10200024 10100000 101001a1 FUNC UND f_iu_dc
10200028 10100000 10100080 FUNC UND f_lo_iu_ic
1020002c 10100000 10100090 FUNC UND f_lo_ic
10200030 10100000 101000a0 FUNC UND f_lo_du_dc
10200034 10100000 101000b0 FUNC UND f_du
10200038 10100000 101000c0 FUNC UND f_du_ic_dc
1020003c 10100000 101000d0 FUNC UND f_du_ic
10200040 10100000 101000e0 FUNC UND f_iu_du_dc
10200044 10100000 101001e1 FUNC UND f_lo_dc
10200048 10100000 101000f0 FUNC UND f_iu_du
1020004c 10100000 10100100 FUNC UND f_lo_iu_du
10200050 10100000 101001f1 FUNC UND f_dc
10200054 10100000 10100201 FUNC UND f_ic_dc
10200058 10100000 10100110 FUNC UND f_lo_du
1020005c 10100000 10100211 FUNC UND f_iu_ic_dc
10200060 10100000 10100120 FUNC UND f_iu_du_ic_dc
10200064 10100000 10100231 FUNC UND f_lo_iu_ic_dc
10200068 10100000 10100130 FUNC UND f_lo_iu_du_ic
1020006c 10100000 10100140 FUNC UND f_lo_iu_du_ic_dc
10200070 10100000 10100251 FUNC UND f_lo_ic_dc
10200074 10100000 10100150 FUNC UND f_lo

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.* file format .*
Disassembly of section \.plt:
# Only _dc (direct call from compressed code) functions should have a
# MIPS16 PLT. Note that indirect calls do not influence the choice,
# so f_ic and f_lo_ic have MIPS rather than MIPS16 PLTs.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07821 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90008 lw \$25,8\(\$15\)
.*: 03200008 jr \$25
.*: 25f80008 addiu \$24,\$15,8
10100030 <f_lo_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100040 <f_lo_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100050 <f_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100060 <f_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100070 <f_lo_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90020 lw \$25,32\(\$15\)
.*: 03200008 jr \$25
.*: 25f80020 addiu \$24,\$15,32
10100080 <f_lo_iu_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90028 lw \$25,40\(\$15\)
.*: 03200008 jr \$25
.*: 25f80028 addiu \$24,\$15,40
10100090 <f_lo_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9002c lw \$25,44\(\$15\)
.*: 03200008 jr \$25
.*: 25f8002c addiu \$24,\$15,44
101000a0 <f_lo_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90030 lw \$25,48\(\$15\)
.*: 03200008 jr \$25
.*: 25f80030 addiu \$24,\$15,48
101000b0 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90034 lw \$25,52\(\$15\)
.*: 03200008 jr \$25
.*: 25f80034 addiu \$24,\$15,52
101000c0 <f_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90038 lw \$25,56\(\$15\)
.*: 03200008 jr \$25
.*: 25f80038 addiu \$24,\$15,56
101000d0 <f_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9003c lw \$25,60\(\$15\)
.*: 03200008 jr \$25
.*: 25f8003c addiu \$24,\$15,60
101000e0 <f_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90040 lw \$25,64\(\$15\)
.*: 03200008 jr \$25
.*: 25f80040 addiu \$24,\$15,64
101000f0 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90048 lw \$25,72\(\$15\)
.*: 03200008 jr \$25
.*: 25f80048 addiu \$24,\$15,72
10100100 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9004c lw \$25,76\(\$15\)
.*: 03200008 jr \$25
.*: 25f8004c addiu \$24,\$15,76
10100110 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90058 lw \$25,88\(\$15\)
.*: 03200008 jr \$25
.*: 25f80058 addiu \$24,\$15,88
10100120 <f_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90060 lw \$25,96\(\$15\)
.*: 03200008 jr \$25
.*: 25f80060 addiu \$24,\$15,96
10100130 <f_lo_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90068 lw \$25,104\(\$15\)
.*: 03200008 jr \$25
.*: 25f80068 addiu \$24,\$15,104
10100140 <f_lo_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9006c lw \$25,108\(\$15\)
.*: 03200008 jr \$25
.*: 25f8006c addiu \$24,\$15,108
10100150 <f_lo@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90074 lw \$25,116\(\$15\)
.*: 03200008 jr \$25
.*: 25f80074 addiu \$24,\$15,116
10100160 <f_lo_iu_du_dc@mips16plt>:
.*: b203 lw \$2,1010016c <f_lo_iu_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020000c
10100170 <f_lo_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010017c <f_lo_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200010
10100180 <f_du_dc@mips16plt>:
.*: b203 lw \$2,1010018c <f_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200014
10100190 <f_lo_iu_dc@mips16plt>:
.*: b203 lw \$2,1010019c <f_lo_iu_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200018
101001a0 <f_iu_dc@mips16plt>:
.*: b203 lw \$2,101001ac <f_iu_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200024
101001b0 <f_lo_du_dc@mips16plt>:
.*: b203 lw \$2,101001bc <f_lo_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200030
101001c0 <f_du_ic_dc@mips16plt>:
.*: b203 lw \$2,101001cc <f_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200038
101001d0 <f_iu_du_dc@mips16plt>:
.*: b203 lw \$2,101001dc <f_iu_du_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200040
101001e0 <f_lo_dc@mips16plt>:
.*: b203 lw \$2,101001ec <f_lo_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200044
101001f0 <f_dc@mips16plt>:
.*: b203 lw \$2,101001fc <f_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200050
10100200 <f_ic_dc@mips16plt>:
.*: b203 lw \$2,1010020c <f_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200054
10100210 <f_iu_ic_dc@mips16plt>:
.*: b203 lw \$2,1010021c <f_iu_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020005c
10100220 <f_iu_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010022c <f_iu_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200060
10100230 <f_lo_iu_ic_dc@mips16plt>:
.*: b203 lw \$2,1010023c <f_lo_iu_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200064
10100240 <f_lo_iu_du_ic_dc@mips16plt>:
.*: b203 lw \$2,1010024c <f_lo_iu_du_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x1020006c
10100250 <f_lo_ic_dc@mips16plt>:
.*: b203 lw \$2,1010025c <f_lo_ic_dc@mips16plt\+0xc>
.*: 9a60 lw \$3,0\(\$2\)
.*: 651a move \$24,\$2
.*: eb00 jr \$3
.*: 653b move \$25,\$3
.*: 6500 nop
.*: .... .... \.word 0x10200070
Disassembly of section \.MIPS\.stubs:
10101000 <_MIPS_STUBS_>:
# Lazy-binding stub for f_iu.
.*: 8f998010 lw \$25,-32752\(\$28\)
.*: 03e07821 move \$15,\$31
.*: 0320f809 jalr \$25
.*: 24180021 li \$24,33
# Lazy-binding stub for f_ic.
.*: 8f998010 lw \$25,-32752\(\$28\)
.*: 03e07821 move \$15,\$31
.*: 0320f809 jalr \$25
.*: 24180020 li \$24,32
# Lazy-binding stub for f_iu_ic.
.*: 8f998010 lw \$25,-32752\(\$28\)
.*: 03e07821 move \$15,\$31
.*: 0320f809 jalr \$25
.*: 2418001f li \$24,31
\.\.\.
Disassembly of section \.text\.a:
10102000 <testc>:
.*: .... .... jal [0-9a-f]+ <f_dc@mips16plt>
.*: 6500 nop
.*: f070 9b50 lw \$2,-32656\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jal [0-9a-f]+ <f_ic_dc@mips16plt>
.*: 6500 nop
.*: f010 9b58 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_du_dc@mips16plt>
.*: 6500 nop
.*: f010 9b5c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b40 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_iu_dc@mips16plt>
.*: 6500 nop
.*: f070 9b4c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: .... .... jal [0-9a-f]+ <f_iu_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b44 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_dc@mips16plt>
.*: 6500 nop
.*: f030 9b48 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b4c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_dc@mips16plt>
.*: 6500 nop
.*: f030 9b50 lw \$2,-32720\(\$3\)
# ^ local GOT entry for f_lo_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b54 lw \$2,-32716\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_dc@mips16plt>
.*: 6500 nop
.*: f030 9b58 lw \$2,-32712\(\$3\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f030 9b5c lw \$2,-32708\(\$3\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_dc@mips16plt>
.*: 6500 nop
.*: f050 9b40 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_ic_dc@mips16plt>
.*: 6500 nop
.*: f050 9b44 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@mips16plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_dc@mips16plt>
.*: 6500 nop
.*: f050 9b48 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_ic_dc@mips16plt>
.*: 6500 nop
.*: f050 9b4c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: e820 jr \$31
Disassembly of section \.text\.b:
10103000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c628074 lw \$2,-32652\(\$3\)
# ^ global GOT entry for f_iu
.*: 8c628050 lw \$2,-32688\(\$3\)
# ^ local GOT entry for f_iu_dc@mips16plt
.*: 8c62806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@mips16plt
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628054 lw \$2,-32684\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628058 lw \$2,-32680\(\$3\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62805c lw \$2,-32676\(\$3\)
# ^ local GOT entry for f_lo_iu@plt
.*: 8c628060 lw \$2,-32672\(\$3\)
# ^ local GOT entry for f_lo_iu_dc@mips16plt
.*: 8c628040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@plt
.*: 8c628044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@mips16plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628064 lw \$2,-32668\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628068 lw \$2,-32664\(\$3\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10104000 <testlo>:
.*: 24020150 li \$2,336
# ^ low 16 bits of f_lo@plt
.*: 240201e1 li \$2,481
# ^ low 16 bits of f_lo_dc@mips16plt
.*: 24020090 li \$2,144
# ^ low 16 bits of f_lo_ic@plt
.*: 24020251 li \$2,593
# ^ low 16 bits of f_lo_ic_dc@mips16plt
.*: 24020110 li \$2,272
# ^ low 16 bits of f_lo_du@plt
.*: 240200a0 li \$2,160
# ^ low 16 bits of f_lo_du_dc@plt
.*: 24020070 li \$2,112
# ^ low 16 bits of f_lo_du_ic@plt
.*: 24020040 li \$2,64
# ^ low 16 bits of f_lo_du_ic_dc@plt
.*: 24020020 li \$2,32
# ^ low 16 bits of f_lo_iu@plt
.*: 24020191 li \$2,401
# ^ low 16 bits of f_lo_iu_dc@mips16plt
.*: 24020080 li \$2,128
# ^ low 16 bits of f_lo_iu_ic@plt
.*: 24020231 li \$2,561
# ^ low 16 bits of f_lo_iu_ic_dc@mips16plt
.*: 24020100 li \$2,256
# ^ low 16 bits of f_lo_iu_du@plt
.*: 24020030 li \$2,48
# ^ low 16 bits of f_lo_iu_du_dc@plt
.*: 24020130 li \$2,304
# ^ low 16 bits of f_lo_iu_du_ic@plt
.*: 24020140 li \$2,320
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt

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Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10201000
#...
0x70000013 \(MIPS_GOTSYM\) 0x1f
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10004000
0x00000002 \(PLTRELSZ\) 224 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100020 f_lo_iu
1020000c [^ ]+ R_MIPS_JUMP_SLOT 10100030 f_lo_iu_du_dc
10200010 [^ ]+ R_MIPS_JUMP_SLOT 10100040 f_lo_du_ic_dc
10200014 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_dc
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100191 f_lo_iu_dc
1020001c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_ic
10200020 [^ ]+ R_MIPS_JUMP_SLOT 10100070 f_lo_du_ic
10200024 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_dc
10200028 [^ ]+ R_MIPS_JUMP_SLOT 10100080 f_lo_iu_ic
1020002c [^ ]+ R_MIPS_JUMP_SLOT 10100090 f_lo_ic
10200030 [^ ]+ R_MIPS_JUMP_SLOT 101000a0 f_lo_du_dc
10200034 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du
10200038 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_ic_dc
1020003c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_ic
10200040 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_dc
10200044 [^ ]+ R_MIPS_JUMP_SLOT 101001e1 f_lo_dc
10200048 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du
1020004c [^ ]+ R_MIPS_JUMP_SLOT 10100100 f_lo_iu_du
10200050 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_dc
10200054 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_ic_dc
10200058 [^ ]+ R_MIPS_JUMP_SLOT 10100110 f_lo_du
1020005c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_ic_dc
10200060 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_ic_dc
10200064 [^ ]+ R_MIPS_JUMP_SLOT 10100231 f_lo_iu_ic_dc
10200068 [^ ]+ R_MIPS_JUMP_SLOT 10100130 f_lo_iu_du_ic
1020006c [^ ]+ R_MIPS_JUMP_SLOT 10100140 f_lo_iu_du_ic_dc
10200070 [^ ]+ R_MIPS_JUMP_SLOT 10100251 f_lo_ic_dc
10200074 [^ ]+ R_MIPS_JUMP_SLOT 10100150 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# _lo symbols have their address taken, so their PLT symbols need to have
# a nonzero value. They must also have STO_MIPS_PLT in order to distinguish
# them from old-style lazy-binding stubs. Non-_lo symbols are only called,
# so their PLT symbols should have a zero value and no STO_MIPS_PLT annotation.
#
# A MIPS16 PLT should only be used as the symbol value if the function has
# a direct MIPS16 caller (dc) and no direct MIPS caller (du).
.*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
.*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
#...
.*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_dc
.*: 10100191 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_ic
.*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_dc
.*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
.*: 10100090 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
.*: 101000a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_ic
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_dc
.*: 101001e1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du
.*: 10100100 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_ic_dc
.*: 10100110 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_ic_dc
#...
.*: 10100231 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic_dc
.*: 10100130 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic
.*: 10100140 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic_dc
.*: 10100251 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic_dc
.*: 10100150 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. The symbol value
# is the address of the lazy-binding stub.
31: 10101020 0 FUNC GLOBAL DEFAULT UND f_iu_ic
32: 10101010 0 FUNC GLOBAL DEFAULT UND f_ic
33: 10101000 0 FUNC GLOBAL DEFAULT UND f_iu
Symbol table '\.symtab' .*
#...
Primary GOT:
Canonical gp value: 10208ff0
Reserved entries:
Address Access Initial Purpose
10201000 -32752\(gp\) 00000000 Lazy resolver
10201004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10201008 -32744\(gp\) 10100201
1020100c -32740\(gp\) 101000d0
10201010 -32736\(gp\) 101000c0
10201014 -32732\(gp\) 10100211
10201018 -32728\(gp\) 10100060
1020101c -32724\(gp\) 10100120
10201020 -32720\(gp\) 10100090
10201024 -32716\(gp\) 10100251
10201028 -32712\(gp\) 10100070
1020102c -32708\(gp\) 10100040
10201030 -32704\(gp\) 10100080
10201034 -32700\(gp\) 10100231
10201038 -32696\(gp\) 10100130
1020103c -32692\(gp\) 10100140
10201040 -32688\(gp\) 101001a1
10201044 -32684\(gp\) 101000f0
10201048 -32680\(gp\) 101000e0
1020104c -32676\(gp\) 10100020
10201050 -32672\(gp\) 10100191
10201054 -32668\(gp\) 10100100
10201058 -32664\(gp\) 10100030
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
1020105c -32660\(gp\) 10101020 10101020 FUNC UND f_iu_ic
10201060 -32656\(gp\) 10101010 10101010 FUNC UND f_ic
10201064 -32652\(gp\) 10101000 10101000 FUNC UND f_iu
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100000 10100020 FUNC UND f_lo_iu
1020000c 10100000 10100030 FUNC UND f_lo_iu_du_dc
10200010 10100000 10100040 FUNC UND f_lo_du_ic_dc
10200014 10100000 00000000 FUNC UND f_du_dc
10200018 10100000 10100191 FUNC UND f_lo_iu_dc
1020001c 10100000 00000000 FUNC UND f_iu_du_ic
10200020 10100000 10100070 FUNC UND f_lo_du_ic
10200024 10100000 00000000 FUNC UND f_iu_dc
10200028 10100000 10100080 FUNC UND f_lo_iu_ic
1020002c 10100000 10100090 FUNC UND f_lo_ic
10200030 10100000 101000a0 FUNC UND f_lo_du_dc
10200034 10100000 00000000 FUNC UND f_du
10200038 10100000 00000000 FUNC UND f_du_ic_dc
1020003c 10100000 00000000 FUNC UND f_du_ic
10200040 10100000 00000000 FUNC UND f_iu_du_dc
10200044 10100000 101001e1 FUNC UND f_lo_dc
10200048 10100000 00000000 FUNC UND f_iu_du
1020004c 10100000 10100100 FUNC UND f_lo_iu_du
10200050 10100000 00000000 FUNC UND f_dc
10200054 10100000 00000000 FUNC UND f_ic_dc
10200058 10100000 10100110 FUNC UND f_lo_du
1020005c 10100000 00000000 FUNC UND f_iu_ic_dc
10200060 10100000 00000000 FUNC UND f_iu_du_ic_dc
10200064 10100000 10100231 FUNC UND f_lo_iu_ic_dc
10200068 10100000 10100130 FUNC UND f_lo_iu_du_ic
1020006c 10100000 10100140 FUNC UND f_lo_iu_du_ic_dc
10200070 10100000 10100251 FUNC UND f_lo_ic_dc
10200074 10100000 10100150 FUNC UND f_lo

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.* file format .*
Disassembly of section \.plt:
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07821 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90008 lw \$25,8\(\$15\)
.*: 03200008 jr \$25
.*: 25f80008 addiu \$24,\$15,8
10100030 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100040 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100050 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100060 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90018 lw \$25,24\(\$15\)
.*: 03200008 jr \$25
.*: 25f80018 addiu \$24,\$15,24
10100070 <f_lo@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
Disassembly of section \.MIPS\.stubs:
10101000 <_MIPS_STUBS_>:
# Lazy-binding stub for f_iu.
.*: 8f998010 lw \$25,-32752\(\$28\)
.*: 03e07821 move \$15,\$31
.*: 0320f809 jalr \$25
.*: 24180009 li \$24,9
\.\.\.
Disassembly of section \.text\.b:
10102000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ global GOT entry for f_iu
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628018 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: 8c62801c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_lo_iu@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628020 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10103000 <testlo>:
.*: 24020070 li \$2,112
# ^ low 16 bits of f_lo@plt
.*: 24020060 li \$2,96
# ^ low 16 bits of f_lo_du@plt
.*: 24020020 li \$2,32
# ^ low 16 bits of f_lo_iu@plt
.*: 24020050 li \$2,80
# ^ low 16 bits of f_lo_iu_du@plt

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Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10201000
#...
0x70000013 \(MIPS_GOTSYM\) 0x9
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10004000
0x00000002 \(PLTRELSZ\) 48 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100020 f_lo_iu
1020000c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du
10200010 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du
10200014 [^ ]+ R_MIPS_JUMP_SLOT 10100050 f_lo_iu_du
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100060 f_lo_du
1020001c [^ ]+ R_MIPS_JUMP_SLOT 10100070 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# _lo symbols have their address taken, so their PLT symbols need to have
# a nonzero value. They must also have STO_MIPS_PLT in order to distinguish
# them from old-style lazy-binding stubs. Non-_lo symbols are only called,
# so their PLT symbols should have a zero value and no STO_MIPS_PLT annotation.
.*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
#...
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du
.*: 10100050 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
.*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du
#...
.*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. The symbol value
# is the address of the lazy-binding stub.
9: 10101000 0 FUNC GLOBAL DEFAULT UND f_iu
Symbol table '\.symtab' .*
#...
Primary GOT:
Canonical gp value: 10208ff0
Reserved entries:
Address Access Initial Purpose
10201000 -32752\(gp\) 00000000 Lazy resolver
10201004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10201008 -32744\(gp\) 10100040
1020100c -32740\(gp\) 10100020
10201010 -32736\(gp\) 10100050
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
10201014 -32732\(gp\) 10101000 10101000 FUNC UND f_iu
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100000 10100020 FUNC UND f_lo_iu
1020000c 10100000 00000000 FUNC UND f_du
10200010 10100000 00000000 FUNC UND f_iu_du
10200014 10100000 10100050 FUNC UND f_lo_iu_du
10200018 10100000 10100060 FUNC UND f_lo_du
1020001c 10100000 10100070 FUNC UND f_lo

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.* file format .*
Disassembly of section \.plt:
# Only _du (direct call from uncompressed code) functions should have
# non-microMIPS PLTs. All the rest must be microMIPS.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07821 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100030 <f_lo_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100040 <f_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100050 <f_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100060 <f_lo_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90020 lw \$25,32\(\$15\)
.*: 03200008 jr \$25
.*: 25f80020 addiu \$24,\$15,32
10100070 <f_lo_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90030 lw \$25,48\(\$15\)
.*: 03200008 jr \$25
.*: 25f80030 addiu \$24,\$15,48
10100080 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90034 lw \$25,52\(\$15\)
.*: 03200008 jr \$25
.*: 25f80034 addiu \$24,\$15,52
10100090 <f_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90038 lw \$25,56\(\$15\)
.*: 03200008 jr \$25
.*: 25f80038 addiu \$24,\$15,56
101000a0 <f_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9003c lw \$25,60\(\$15\)
.*: 03200008 jr \$25
.*: 25f8003c addiu \$24,\$15,60
101000b0 <f_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90040 lw \$25,64\(\$15\)
.*: 03200008 jr \$25
.*: 25f80040 addiu \$24,\$15,64
101000c0 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90048 lw \$25,72\(\$15\)
.*: 03200008 jr \$25
.*: 25f80048 addiu \$24,\$15,72
101000d0 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9004c lw \$25,76\(\$15\)
.*: 03200008 jr \$25
.*: 25f8004c addiu \$24,\$15,76
101000e0 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90058 lw \$25,88\(\$15\)
.*: 03200008 jr \$25
.*: 25f80058 addiu \$24,\$15,88
101000f0 <f_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90060 lw \$25,96\(\$15\)
.*: 03200008 jr \$25
.*: 25f80060 addiu \$24,\$15,96
10100100 <f_lo_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90068 lw \$25,104\(\$15\)
.*: 03200008 jr \$25
.*: 25f80068 addiu \$24,\$15,104
10100110 <f_lo_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9006c lw \$25,108\(\$15\)
.*: 03200008 jr \$25
.*: 25f8006c addiu \$24,\$15,108
10100120 <f_lo_iu@micromipsplt>:
.*: 7903 ffba addiu \$2,\$pc,1048296
# ^ 0x10200008
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010012c <f_lo_iu_du_dc@micromipsplt>:
.*: 7903 ffb8 addiu \$2,\$pc,1048288
# ^ 0x1020000c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100138 <f_lo_du_ic_dc@micromipsplt>:
.*: 7903 ffb6 addiu \$2,\$pc,1048280
# ^ 0x10200010
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100144 <f_du_dc@micromipsplt>:
.*: 7903 ffb4 addiu \$2,\$pc,1048272
# ^ 0x10200014
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100150 <f_lo_iu_dc@micromipsplt>:
.*: 7903 ffb2 addiu \$2,\$pc,1048264
# ^ 0x10200018
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010015c <f_iu_dc@micromipsplt>:
.*: 7903 ffb2 addiu \$2,\$pc,1048264
# ^ 0x10200024
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100168 <f_lo_iu_ic@micromipsplt>:
.*: 7903 ffb0 addiu \$2,\$pc,1048256
# ^ 0x10200028
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100174 <f_lo_ic@micromipsplt>:
.*: 7903 ffae addiu \$2,\$pc,1048248
# ^ 0x1020002c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100180 <f_lo_du_dc@micromipsplt>:
.*: 7903 ffac addiu \$2,\$pc,1048240
# ^ 0x10200030
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010018c <f_du_ic_dc@micromipsplt>:
.*: 7903 ffab addiu \$2,\$pc,1048236
# ^ 0x10200038
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100198 <f_iu_du_dc@micromipsplt>:
.*: 7903 ffaa addiu \$2,\$pc,1048232
# ^ 0x10200040
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001a4 <f_lo_dc@micromipsplt>:
.*: 7903 ffa8 addiu \$2,\$pc,1048224
# ^ 0x10200044
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001b0 <f_dc@micromipsplt>:
.*: 7903 ffa8 addiu \$2,\$pc,1048224
# ^ 0x10200050
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001bc <f_ic_dc@micromipsplt>:
.*: 7903 ffa6 addiu \$2,\$pc,1048216
# ^ 0x10200054
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001c8 <f_iu_ic_dc@micromipsplt>:
.*: 7903 ffa5 addiu \$2,\$pc,1048212
# ^ 0x1020005c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001d4 <f_iu_du_ic_dc@micromipsplt>:
.*: 7903 ffa3 addiu \$2,\$pc,1048204
# ^ 0x10200060
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001e0 <f_lo_iu_ic_dc@micromipsplt>:
.*: 7903 ffa1 addiu \$2,\$pc,1048196
# ^ 0x10200064
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001ec <f_lo_iu_du_ic_dc@micromipsplt>:
.*: 7903 ffa0 addiu \$2,\$pc,1048192
# ^ 0x1020006c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001f8 <f_lo_ic_dc@micromipsplt>:
.*: 7903 ff9e addiu \$2,\$pc,1048184
# ^ 0x10200070
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100204 <f_lo@micromipsplt>:
.*: 7903 ff9c addiu \$2,\$pc,1048176
# ^ 0x10200074
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
Disassembly of section \.text\.a:
10101000 <testc>:
.*: .... .... jal [0-9a-f]+ <f_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 808c lw \$2,-32628\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jal [0-9a-f]+ <f_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8018 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 801c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8020 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_iu_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8088 lw \$2,-32632\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: .... .... jal [0-9a-f]+ <f_iu_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_iu_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8030 lw \$2,-32720\(\$3\)
# ^ local GOT entry for f_lo_ic@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8034 lw \$2,-32716\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8038 lw \$2,-32712\(\$3\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 803c lw \$2,-32708\(\$3\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 459f jr \$31
Disassembly of section \.text\.b:
10102000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c628090 lw \$2,-32624\(\$3\)
# ^ global GOT entry for f_iu
.*: 8c628050 lw \$2,-32688\(\$3\)
# ^ local GOT entry for f_iu_dc@micromipsplt
.*: 8c628088 lw \$2,-32632\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@micromipsplt
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628054 lw \$2,-32684\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628058 lw \$2,-32680\(\$3\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62805c lw \$2,-32676\(\$3\)
# ^ local GOT entry for f_lo_iu@micromipsplt
.*: 8c628060 lw \$2,-32672\(\$3\)
# ^ local GOT entry for f_lo_iu_dc@micromipsplt
.*: 8c628040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@micromipsplt
.*: 8c628044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@micromipsplt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628064 lw \$2,-32668\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628068 lw \$2,-32664\(\$3\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10103000 <testlo>:
.*: 3040 0205 li \$2,517
# ^ low 16 bits of f_lo@micromipsplt
.*: 3040 01a5 li \$2,421
# ^ low 16 bits of f_lo_dc@micromipsplt
.*: 3040 0175 li \$2,373
# ^ low 16 bits of f_lo_ic@micromipsplt
.*: 3040 01f9 li \$2,505
# ^ low 16 bits of f_lo_ic_dc@micromipsplt
.*: 3040 00e0 li \$2,224
# ^ low 16 bits of f_lo_du@plt
.*: 3040 0070 li \$2,112
# ^ low 16 bits of f_lo_du_dc@plt
.*: 3040 0060 li \$2,96
# ^ low 16 bits of f_lo_du_ic@plt
.*: 3040 0030 li \$2,48
# ^ low 16 bits of f_lo_du_ic_dc@plt
.*: 3040 0121 li \$2,289
# ^ low 16 bits of f_lo_iu@micromipsplt
.*: 3040 0151 li \$2,337
# ^ low 16 bits of f_lo_iu_dc@micromipsplt
.*: 3040 0169 li \$2,361
# ^ low 16 bits of f_lo_iu_ic@micromipsplt
.*: 3040 01e1 li \$2,481
# ^ low 16 bits of f_lo_iu_ic_dc@micromipsplt
.*: 3040 00d0 li \$2,208
# ^ low 16 bits of f_lo_iu_du@plt
.*: 3040 0020 li \$2,32
# ^ low 16 bits of f_lo_iu_du_dc@plt
.*: 3040 0100 li \$2,256
# ^ low 16 bits of f_lo_iu_du_ic@plt
.*: 3040 0110 li \$2,272
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt
Disassembly of section \.text\.d:
10104000 <testgot>:
.*: fc5c 8094 lw \$2,-32620\(\$28\)
# ^ global GOT entry for f
.*: fc5c 806c lw \$2,-32660\(\$28\)
# ^ local GOT entry for f_dc@micromipsplt
.*: fc5c 808c lw \$2,-32628\(\$28\)
# ^ global GOT entry for f_ic
.*: fc5c 8018 lw \$2,-32744\(\$28\)
# ^ local GOT entry for f_ic_dc@micromipsplt
.*: fc5c 8070 lw \$2,-32656\(\$28\)
# ^ local GOT entry for f_du@plt
.*: fc5c 8074 lw \$2,-32652\(\$28\)
# ^ local GOT entry for f_du_dc@plt
.*: fc5c 801c lw \$2,-32740\(\$28\)
# ^ local GOT entry for f_du_ic@plt
.*: fc5c 8020 lw \$2,-32736\(\$28\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: fc5c 8090 lw \$2,-32624\(\$28\)
# ^ global GOT entry for f_iu
.*: fc5c 8050 lw \$2,-32688\(\$28\)
# ^ local GOT entry for f_iu_dc@micromipsplt
.*: fc5c 8088 lw \$2,-32632\(\$28\)
# ^ global GOT entry for f_iu_ic
.*: fc5c 8024 lw \$2,-32732\(\$28\)
# ^ local GOT entry for f_iu_ic_dc@micromipsplt
.*: fc5c 8054 lw \$2,-32684\(\$28\)
# ^ local GOT entry for f_iu_du@plt
.*: fc5c 8058 lw \$2,-32680\(\$28\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: fc5c 8028 lw \$2,-32728\(\$28\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: fc5c 802c lw \$2,-32724\(\$28\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: fc5c 8078 lw \$2,-32648\(\$28\)
# ^ local GOT entry for f_lo@micromipsplt
.*: fc5c 807c lw \$2,-32644\(\$28\)
# ^ local GOT entry for f_lo_dc@micromipsplt
.*: fc5c 8030 lw \$2,-32720\(\$28\)
# ^ local GOT entry for f_lo_ic@micromipsplt
.*: fc5c 8034 lw \$2,-32716\(\$28\)
# ^ local GOT entry for f_lo_ic_dc@micromipsplt
.*: fc5c 8080 lw \$2,-32640\(\$28\)
# ^ local GOT entry for f_lo_du@plt
.*: fc5c 8084 lw \$2,-32636\(\$28\)
# ^ local GOT entry for f_lo_du_dc@plt
.*: fc5c 8038 lw \$2,-32712\(\$28\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: fc5c 803c lw \$2,-32708\(\$28\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: fc5c 805c lw \$2,-32676\(\$28\)
# ^ local GOT entry for f_lo_iu@micromipsplt
.*: fc5c 8060 lw \$2,-32672\(\$28\)
# ^ local GOT entry for f_lo_iu_dc@micromipsplt
.*: fc5c 8040 lw \$2,-32704\(\$28\)
# ^ local GOT entry for f_lo_iu_ic@micromipsplt
.*: fc5c 8044 lw \$2,-32700\(\$28\)
# ^ local GOT entry for f_lo_iu_ic_dc@micromipsplt
.*: fc5c 8064 lw \$2,-32668\(\$28\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: fc5c 8068 lw \$2,-32664\(\$28\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: fc5c 8048 lw \$2,-32696\(\$28\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: fc5c 804c lw \$2,-32692\(\$28\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt

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Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10201000
#...
0x70000013 \(MIPS_GOTSYM\) 0x1f
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10004000
0x00000002 \(PLTRELSZ\) 224 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100121 f_lo_iu
1020000c [^ ]+ R_MIPS_JUMP_SLOT 10100020 f_lo_iu_du_dc
10200010 [^ ]+ R_MIPS_JUMP_SLOT 10100030 f_lo_du_ic_dc
10200014 [^ ]+ R_MIPS_JUMP_SLOT 10100040 f_du_dc
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100151 f_lo_iu_dc
1020001c [^ ]+ R_MIPS_JUMP_SLOT 10100050 f_iu_du_ic
10200020 [^ ]+ R_MIPS_JUMP_SLOT 10100060 f_lo_du_ic
10200024 [^ ]+ R_MIPS_JUMP_SLOT 1010015d f_iu_dc
10200028 [^ ]+ R_MIPS_JUMP_SLOT 10100169 f_lo_iu_ic
1020002c [^ ]+ R_MIPS_JUMP_SLOT 10100175 f_lo_ic
10200030 [^ ]+ R_MIPS_JUMP_SLOT 10100070 f_lo_du_dc
10200034 [^ ]+ R_MIPS_JUMP_SLOT 10100080 f_du
10200038 [^ ]+ R_MIPS_JUMP_SLOT 10100090 f_du_ic_dc
1020003c [^ ]+ R_MIPS_JUMP_SLOT 101000a0 f_du_ic
10200040 [^ ]+ R_MIPS_JUMP_SLOT 101000b0 f_iu_du_dc
10200044 [^ ]+ R_MIPS_JUMP_SLOT 101001a5 f_lo_dc
10200048 [^ ]+ R_MIPS_JUMP_SLOT 101000c0 f_iu_du
1020004c [^ ]+ R_MIPS_JUMP_SLOT 101000d0 f_lo_iu_du
10200050 [^ ]+ R_MIPS_JUMP_SLOT 101001b1 f_dc
10200054 [^ ]+ R_MIPS_JUMP_SLOT 101001bd f_ic_dc
10200058 [^ ]+ R_MIPS_JUMP_SLOT 101000e0 f_lo_du
1020005c [^ ]+ R_MIPS_JUMP_SLOT 101001c9 f_iu_ic_dc
10200060 [^ ]+ R_MIPS_JUMP_SLOT 101000f0 f_iu_du_ic_dc
10200064 [^ ]+ R_MIPS_JUMP_SLOT 101001e1 f_lo_iu_ic_dc
10200068 [^ ]+ R_MIPS_JUMP_SLOT 10100100 f_lo_iu_du_ic
1020006c [^ ]+ R_MIPS_JUMP_SLOT 10100110 f_lo_iu_du_ic_dc
10200070 [^ ]+ R_MIPS_JUMP_SLOT 101001f9 f_lo_ic_dc
10200074 [^ ]+ R_MIPS_JUMP_SLOT 10100205 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# All symbols have their address taken, so PLT symbols need to have a nonzero
# value. They must also have STO_MIPS_PLT in order to distinguish them from
# old-style lazy-binding stubs).
#
# A MIPS (as opposed to microMIPS) PLT should be used as the symbol value
# if and only if the function has a direct MIPS caller (du).
.*: 10100121 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
.*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
#...
.*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
.*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_dc
.*: 10100151 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
.*: 10100050 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic
.*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
.*: 1010015d 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_dc
.*: 10100169 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
.*: 10100175 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
.*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
.*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du
.*: 10100090 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_ic_dc
.*: 101000a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_ic
.*: 101000b0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_dc
.*: 101001a5 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
.*: 101000c0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du
.*: 101000d0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
.*: 101001b1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_dc
.*: 101001bd 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_ic_dc
.*: 101000e0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du
.*: 101001c9 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_ic_dc
.*: 101000f0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic_dc
#...
.*: 101001e1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic_dc
.*: 10100100 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic
.*: 10100110 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic_dc
.*: 101001f9 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic_dc
.*: 10100205 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. Since the functions
# have their addresses taken, they cannot use a lazy-binding stub.
# The symbol values are therefore all zero.
31: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_ic
32: 00000000 0 FUNC GLOBAL DEFAULT UND f_ic
33: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu
34: 00000000 0 FUNC GLOBAL DEFAULT UND f
Symbol table '\.symtab' .*
#...
Primary GOT:
Canonical gp value: 10208ff0
Reserved entries:
Address Access Initial Purpose
10201000 -32752\(gp\) 00000000 Lazy resolver
10201004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10201008 -32744\(gp\) 101001bd
1020100c -32740\(gp\) 101000a0
10201010 -32736\(gp\) 10100090
10201014 -32732\(gp\) 101001c9
10201018 -32728\(gp\) 10100050
1020101c -32724\(gp\) 101000f0
10201020 -32720\(gp\) 10100175
10201024 -32716\(gp\) 101001f9
10201028 -32712\(gp\) 10100060
1020102c -32708\(gp\) 10100030
10201030 -32704\(gp\) 10100169
10201034 -32700\(gp\) 101001e1
10201038 -32696\(gp\) 10100100
1020103c -32692\(gp\) 10100110
10201040 -32688\(gp\) 1010015d
10201044 -32684\(gp\) 101000c0
10201048 -32680\(gp\) 101000b0
1020104c -32676\(gp\) 10100121
10201050 -32672\(gp\) 10100151
10201054 -32668\(gp\) 101000d0
10201058 -32664\(gp\) 10100020
1020105c -32660\(gp\) 101001b1
10201060 -32656\(gp\) 10100080
10201064 -32652\(gp\) 10100040
10201068 -32648\(gp\) 10100205
1020106c -32644\(gp\) 101001a5
10201070 -32640\(gp\) 101000e0
10201074 -32636\(gp\) 10100070
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
10201078 -32632\(gp\) 00000000 00000000 FUNC UND f_iu_ic
1020107c -32628\(gp\) 00000000 00000000 FUNC UND f_ic
10201080 -32624\(gp\) 00000000 00000000 FUNC UND f_iu
10201084 -32620\(gp\) 00000000 00000000 FUNC UND f
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100000 10100121 FUNC UND f_lo_iu
1020000c 10100000 10100020 FUNC UND f_lo_iu_du_dc
10200010 10100000 10100030 FUNC UND f_lo_du_ic_dc
10200014 10100000 10100040 FUNC UND f_du_dc
10200018 10100000 10100151 FUNC UND f_lo_iu_dc
1020001c 10100000 10100050 FUNC UND f_iu_du_ic
10200020 10100000 10100060 FUNC UND f_lo_du_ic
10200024 10100000 1010015d FUNC UND f_iu_dc
10200028 10100000 10100169 FUNC UND f_lo_iu_ic
1020002c 10100000 10100175 FUNC UND f_lo_ic
10200030 10100000 10100070 FUNC UND f_lo_du_dc
10200034 10100000 10100080 FUNC UND f_du
10200038 10100000 10100090 FUNC UND f_du_ic_dc
1020003c 10100000 101000a0 FUNC UND f_du_ic
10200040 10100000 101000b0 FUNC UND f_iu_du_dc
10200044 10100000 101001a5 FUNC UND f_lo_dc
10200048 10100000 101000c0 FUNC UND f_iu_du
1020004c 10100000 101000d0 FUNC UND f_lo_iu_du
10200050 10100000 101001b1 FUNC UND f_dc
10200054 10100000 101001bd FUNC UND f_ic_dc
10200058 10100000 101000e0 FUNC UND f_lo_du
1020005c 10100000 101001c9 FUNC UND f_iu_ic_dc
10200060 10100000 101000f0 FUNC UND f_iu_du_ic_dc
10200064 10100000 101001e1 FUNC UND f_lo_iu_ic_dc
10200068 10100000 10100100 FUNC UND f_lo_iu_du_ic
1020006c 10100000 10100110 FUNC UND f_lo_iu_du_ic_dc
10200070 10100000 101001f9 FUNC UND f_lo_ic_dc
10200074 10100000 10100205 FUNC UND f_lo

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.* file format .*
Disassembly of section \.plt:
# All entries must be microMIPS.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 7984 0000 addiu \$3,\$pc,1048576
.*: ff23 0000 lw \$25,0\(\$3\)
.*: 0535 subu \$2,\$2,\$3
.*: 2525 srl \$2,\$2,2
.*: 3302 fffe addiu \$24,\$2,-2
.*: 0dff move \$15,\$31
.*: 45f9 jalrs \$25
.*: 0f83 move \$28,\$3
.*: 0c00 nop
10100018 <f_lo_ic@micromipsplt>:
.*: 7903 fffc addiu \$2,\$pc,1048560
# ^ 0x10200008
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100024 <f_lo_dc@micromipsplt>:
.*: 7903 fffa addiu \$2,\$pc,1048552
# ^ 0x1020000c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100030 <f_dc@micromipsplt>:
.*: 7903 fff8 addiu \$2,\$pc,1048544
# ^ 0x10200010
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010003c <f_ic_dc@micromipsplt>:
.*: 7903 fff6 addiu \$2,\$pc,1048536
# ^ 0x10200014
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100048 <f_lo_ic_dc@micromipsplt>:
.*: 7903 fff4 addiu \$2,\$pc,1048528
# ^ 0x10200018
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100054 <f_lo@micromipsplt>:
.*: 7903 fff2 addiu \$2,\$pc,1048520
# ^ 0x1020001c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
Disassembly of section \.MIPS\.stubs:
10101000 <_MIPS_STUBS_>:
# Lazy-binding stub for f_ic.
.*: ff3c 8010 lw \$25,-32752\(\$28\)
.*: 0dff move \$15,\$31
.*: 45d9 jalr \$25
.*: 3300 0009 li \$24,9
\.\.\.
Disassembly of section \.text\.a:
10102000 <testc>:
.*: .... .... jal [0-9a-f]+ <f_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8024 lw \$2,-32732\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jal [0-9a-f]+ <f_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8018 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 801c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_lo_ic@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8020 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@micromipsplt
.*: 459f jr \$31
Disassembly of section \.text\.c:
10103000 <testlo>:
.*: 3040 0055 li \$2,85
# ^ low 16 bits of f_lo@micromipsplt
.*: 3040 0025 li \$2,37
# ^ low 16 bits of f_lo_dc@micromipsplt
.*: 3040 0019 li \$2,25
# ^ low 16 bits of f_lo_ic@micromipsplt
.*: 3040 0049 li \$2,73
# ^ low 16 bits of f_lo_ic_dc@micromipsplt

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Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10201000
#...
0x70000013 \(MIPS_GOTSYM\) 0x9
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10004000
0x00000002 \(PLTRELSZ\) 48 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100019 f_lo_ic
1020000c [^ ]+ R_MIPS_JUMP_SLOT 10100025 f_lo_dc
10200010 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_dc
10200014 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_ic_dc
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100049 f_lo_ic_dc
1020001c [^ ]+ R_MIPS_JUMP_SLOT 10100055 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# _lo symbols have their address taken, so their PLT symbols need to have
# a nonzero value. They must also have STO_MIPS_PLT in order to distinguish
# them from old-style lazy-binding stubs. Non-_lo symbols are only called,
# so their PLT symbols should have a zero value and no STO_MIPS_PLT annotation.
#
# All PLTs should be microMIPS.
#...
.*: 10100019 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
.*: 10100025 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_ic_dc
#...
.*: 10100049 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic_dc
.*: 10100055 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. The symbol value
# is the address of the lazy-binding stub.
9: 10101001 0 FUNC GLOBAL DEFAULT UND f_ic
Symbol table '\.symtab' .*
#...
Primary GOT:
Canonical gp value: 10208ff0
Reserved entries:
Address Access Initial Purpose
10201000 -32752\(gp\) 00000000 Lazy resolver
10201004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10201008 -32744\(gp\) 1010003d
1020100c -32740\(gp\) 10100019
10201010 -32736\(gp\) 10100049
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
10201014 -32732\(gp\) 10101001 10101001 FUNC UND f_ic
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100001 10100019 FUNC UND f_lo_ic
1020000c 10100001 10100025 FUNC UND f_lo_dc
10200010 10100001 00000000 FUNC UND f_dc
10200014 10100001 00000000 FUNC UND f_ic_dc
10200018 10100001 10100049 FUNC UND f_lo_ic_dc
1020001c 10100001 10100055 FUNC UND f_lo

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.* file format .*
Disassembly of section \.plt:
# Only _du (direct call from uncompressed code) functions should have
# non-microMIPS PLTs. All the rest must be microMIPS.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07821 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100030 <f_lo_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100040 <f_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100050 <f_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100060 <f_lo_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90020 lw \$25,32\(\$15\)
.*: 03200008 jr \$25
.*: 25f80020 addiu \$24,\$15,32
10100070 <f_lo_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90030 lw \$25,48\(\$15\)
.*: 03200008 jr \$25
.*: 25f80030 addiu \$24,\$15,48
10100080 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90034 lw \$25,52\(\$15\)
.*: 03200008 jr \$25
.*: 25f80034 addiu \$24,\$15,52
10100090 <f_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90038 lw \$25,56\(\$15\)
.*: 03200008 jr \$25
.*: 25f80038 addiu \$24,\$15,56
101000a0 <f_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9003c lw \$25,60\(\$15\)
.*: 03200008 jr \$25
.*: 25f8003c addiu \$24,\$15,60
101000b0 <f_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90040 lw \$25,64\(\$15\)
.*: 03200008 jr \$25
.*: 25f80040 addiu \$24,\$15,64
101000c0 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90048 lw \$25,72\(\$15\)
.*: 03200008 jr \$25
.*: 25f80048 addiu \$24,\$15,72
101000d0 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9004c lw \$25,76\(\$15\)
.*: 03200008 jr \$25
.*: 25f8004c addiu \$24,\$15,76
101000e0 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90058 lw \$25,88\(\$15\)
.*: 03200008 jr \$25
.*: 25f80058 addiu \$24,\$15,88
101000f0 <f_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90060 lw \$25,96\(\$15\)
.*: 03200008 jr \$25
.*: 25f80060 addiu \$24,\$15,96
10100100 <f_lo_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90068 lw \$25,104\(\$15\)
.*: 03200008 jr \$25
.*: 25f80068 addiu \$24,\$15,104
10100110 <f_lo_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9006c lw \$25,108\(\$15\)
.*: 03200008 jr \$25
.*: 25f8006c addiu \$24,\$15,108
10100120 <f_lo_iu@micromipsplt>:
.*: 7903 ffba addiu \$2,\$pc,1048296
# ^ 0x10200008
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010012c <f_lo_iu_du_dc@micromipsplt>:
.*: 7903 ffb8 addiu \$2,\$pc,1048288
# ^ 0x1020000c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100138 <f_lo_du_ic_dc@micromipsplt>:
.*: 7903 ffb6 addiu \$2,\$pc,1048280
# ^ 0x10200010
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100144 <f_du_dc@micromipsplt>:
.*: 7903 ffb4 addiu \$2,\$pc,1048272
# ^ 0x10200014
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100150 <f_lo_iu_dc@micromipsplt>:
.*: 7903 ffb2 addiu \$2,\$pc,1048264
# ^ 0x10200018
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010015c <f_iu_dc@micromipsplt>:
.*: 7903 ffb2 addiu \$2,\$pc,1048264
# ^ 0x10200024
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100168 <f_lo_iu_ic@micromipsplt>:
.*: 7903 ffb0 addiu \$2,\$pc,1048256
# ^ 0x10200028
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100174 <f_lo_ic@micromipsplt>:
.*: 7903 ffae addiu \$2,\$pc,1048248
# ^ 0x1020002c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100180 <f_lo_du_dc@micromipsplt>:
.*: 7903 ffac addiu \$2,\$pc,1048240
# ^ 0x10200030
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010018c <f_du_ic_dc@micromipsplt>:
.*: 7903 ffab addiu \$2,\$pc,1048236
# ^ 0x10200038
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100198 <f_iu_du_dc@micromipsplt>:
.*: 7903 ffaa addiu \$2,\$pc,1048232
# ^ 0x10200040
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001a4 <f_lo_dc@micromipsplt>:
.*: 7903 ffa8 addiu \$2,\$pc,1048224
# ^ 0x10200044
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001b0 <f_dc@micromipsplt>:
.*: 7903 ffa8 addiu \$2,\$pc,1048224
# ^ 0x10200050
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001bc <f_ic_dc@micromipsplt>:
.*: 7903 ffa6 addiu \$2,\$pc,1048216
# ^ 0x10200054
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001c8 <f_iu_ic_dc@micromipsplt>:
.*: 7903 ffa5 addiu \$2,\$pc,1048212
# ^ 0x1020005c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001d4 <f_iu_du_ic_dc@micromipsplt>:
.*: 7903 ffa3 addiu \$2,\$pc,1048204
# ^ 0x10200060
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001e0 <f_lo_iu_ic_dc@micromipsplt>:
.*: 7903 ffa1 addiu \$2,\$pc,1048196
# ^ 0x10200064
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001ec <f_lo_iu_du_ic_dc@micromipsplt>:
.*: 7903 ffa0 addiu \$2,\$pc,1048192
# ^ 0x1020006c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001f8 <f_lo_ic_dc@micromipsplt>:
.*: 7903 ff9e addiu \$2,\$pc,1048184
# ^ 0x10200070
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100204 <f_lo@micromipsplt>:
.*: 7903 ff9c addiu \$2,\$pc,1048176
# ^ 0x10200074
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
Disassembly of section \.text\.a:
10101000 <testc>:
.*: .... .... jal [0-9a-f]+ <f_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8070 lw \$2,-32656\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jal [0-9a-f]+ <f_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8018 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 801c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8020 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_iu_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: .... .... jal [0-9a-f]+ <f_iu_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_iu_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8030 lw \$2,-32720\(\$3\)
# ^ local GOT entry for f_lo_ic@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8034 lw \$2,-32716\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8038 lw \$2,-32712\(\$3\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 803c lw \$2,-32708\(\$3\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 459f jr \$31
Disassembly of section \.text\.b:
10102000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c628074 lw \$2,-32652\(\$3\)
# ^ global GOT entry for f_iu
.*: 8c628050 lw \$2,-32688\(\$3\)
# ^ local GOT entry for f_iu_dc@micromipsplt
.*: 8c62806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@micromipsplt
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628054 lw \$2,-32684\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628058 lw \$2,-32680\(\$3\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62805c lw \$2,-32676\(\$3\)
# ^ local GOT entry for f_lo_iu@micromipsplt
.*: 8c628060 lw \$2,-32672\(\$3\)
# ^ local GOT entry for f_lo_iu_dc@micromipsplt
.*: 8c628040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@micromipsplt
.*: 8c628044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@micromipsplt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628064 lw \$2,-32668\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628068 lw \$2,-32664\(\$3\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10103000 <testlo>:
.*: 3040 0205 li \$2,517
# ^ low 16 bits of f_lo@micromipsplt
.*: 3040 01a5 li \$2,421
# ^ low 16 bits of f_lo_dc@micromipsplt
.*: 3040 0175 li \$2,373
# ^ low 16 bits of f_lo_ic@micromipsplt
.*: 3040 01f9 li \$2,505
# ^ low 16 bits of f_lo_ic_dc@micromipsplt
.*: 3040 00e0 li \$2,224
# ^ low 16 bits of f_lo_du@plt
.*: 3040 0070 li \$2,112
# ^ low 16 bits of f_lo_du_dc@plt
.*: 3040 0060 li \$2,96
# ^ low 16 bits of f_lo_du_ic@plt
.*: 3040 0030 li \$2,48
# ^ low 16 bits of f_lo_du_ic_dc@plt
.*: 3040 0121 li \$2,289
# ^ low 16 bits of f_lo_iu@micromipsplt
.*: 3040 0151 li \$2,337
# ^ low 16 bits of f_lo_iu_dc@micromipsplt
.*: 3040 0169 li \$2,361
# ^ low 16 bits of f_lo_iu_ic@micromipsplt
.*: 3040 01e1 li \$2,481
# ^ low 16 bits of f_lo_iu_ic_dc@micromipsplt
.*: 3040 00d0 li \$2,208
# ^ low 16 bits of f_lo_iu_du@plt
.*: 3040 0020 li \$2,32
# ^ low 16 bits of f_lo_iu_du_dc@plt
.*: 3040 0100 li \$2,256
# ^ low 16 bits of f_lo_iu_du_ic@plt
.*: 3040 0110 li \$2,272
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt

View File

@ -0,0 +1,198 @@
Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10202000
#...
0x70000013 \(MIPS_GOTSYM\) 0x1f
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10005000
0x00000002 \(PLTRELSZ\) 224 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.dyn' .*
# All symbols are referenced by a .word in the .data section, so pointer
# equality matters. If a PLT is needed to satisfy a direct call or %lo
# relocation, the symbol should have a nonzero value and there should be
# no dynamic relocations against it. The only relocations here are for
# undefined 0-value symbols. Note that unlike x86, we do not create a PLT
# for the uncalled symbol 'f' in order to maintain backward compatibility
# with pre-PLT ld.sos.
Offset Info Type Sym\.Value Sym\. Name
00000000 00000000 R_MIPS_NONE
10201028 00001f03 R_MIPS_REL32 00000000 f_iu_ic
10201008 00002003 R_MIPS_REL32 00000000 f_ic
10201020 00002103 R_MIPS_REL32 00000000 f_iu
10201000 00002203 R_MIPS_REL32 00000000 f
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100121 f_lo_iu
1020000c [^ ]+ R_MIPS_JUMP_SLOT 10100020 f_lo_iu_du_dc
10200010 [^ ]+ R_MIPS_JUMP_SLOT 10100030 f_lo_du_ic_dc
10200014 [^ ]+ R_MIPS_JUMP_SLOT 10100040 f_du_dc
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100151 f_lo_iu_dc
1020001c [^ ]+ R_MIPS_JUMP_SLOT 10100050 f_iu_du_ic
10200020 [^ ]+ R_MIPS_JUMP_SLOT 10100060 f_lo_du_ic
10200024 [^ ]+ R_MIPS_JUMP_SLOT 1010015d f_iu_dc
10200028 [^ ]+ R_MIPS_JUMP_SLOT 10100169 f_lo_iu_ic
1020002c [^ ]+ R_MIPS_JUMP_SLOT 10100175 f_lo_ic
10200030 [^ ]+ R_MIPS_JUMP_SLOT 10100070 f_lo_du_dc
10200034 [^ ]+ R_MIPS_JUMP_SLOT 10100080 f_du
10200038 [^ ]+ R_MIPS_JUMP_SLOT 10100090 f_du_ic_dc
1020003c [^ ]+ R_MIPS_JUMP_SLOT 101000a0 f_du_ic
10200040 [^ ]+ R_MIPS_JUMP_SLOT 101000b0 f_iu_du_dc
10200044 [^ ]+ R_MIPS_JUMP_SLOT 101001a5 f_lo_dc
10200048 [^ ]+ R_MIPS_JUMP_SLOT 101000c0 f_iu_du
1020004c [^ ]+ R_MIPS_JUMP_SLOT 101000d0 f_lo_iu_du
10200050 [^ ]+ R_MIPS_JUMP_SLOT 101001b1 f_dc
10200054 [^ ]+ R_MIPS_JUMP_SLOT 101001bd f_ic_dc
10200058 [^ ]+ R_MIPS_JUMP_SLOT 101000e0 f_lo_du
1020005c [^ ]+ R_MIPS_JUMP_SLOT 101001c9 f_iu_ic_dc
10200060 [^ ]+ R_MIPS_JUMP_SLOT 101000f0 f_iu_du_ic_dc
10200064 [^ ]+ R_MIPS_JUMP_SLOT 101001e1 f_lo_iu_ic_dc
10200068 [^ ]+ R_MIPS_JUMP_SLOT 10100100 f_lo_iu_du_ic
1020006c [^ ]+ R_MIPS_JUMP_SLOT 10100110 f_lo_iu_du_ic_dc
10200070 [^ ]+ R_MIPS_JUMP_SLOT 101001f9 f_lo_ic_dc
10200074 [^ ]+ R_MIPS_JUMP_SLOT 10100205 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# All symbols have their address taken, so PLT symbols need to have a nonzero
# value. They must also have STO_MIPS_PLT in order to distinguish them from
# old-style lazy-binding stubs).
#
# A MIPS (as opposed to microMIPS) PLT should be used as the symbol value
# if and only if the function has a direct MIPS caller (du).
.*: 10100121 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
.*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
#...
.*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
.*: 10100040 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_dc
.*: 10100151 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
.*: 10100050 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic
.*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
.*: 1010015d 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_dc
.*: 10100169 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
.*: 10100175 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
.*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
.*: 10100080 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du
.*: 10100090 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_ic_dc
.*: 101000a0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_du_ic
.*: 101000b0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_dc
.*: 101001a5 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
.*: 101000c0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du
.*: 101000d0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
.*: 101001b1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_dc
.*: 101001bd 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_ic_dc
.*: 101000e0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du
.*: 101001c9 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_ic_dc
.*: 101000f0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_iu_du_ic_dc
#...
.*: 101001e1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic_dc
.*: 10100100 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic
.*: 10100110 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic_dc
.*: 101001f9 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic_dc
.*: 10100205 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. Since the functions
# have their addresses taken, they cannot use a lazy-binding stub.
# The symbol values are therefore all zero.
31: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_ic
32: 00000000 0 FUNC GLOBAL DEFAULT UND f_ic
33: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu
34: 00000000 0 FUNC GLOBAL DEFAULT UND f
Symbol table '\.symtab' .*
#...
Hex dump of section '\.data':
0x10201000 (00000000|00000000) (101001b1|b1011010) (00000000|00000000) (101001bd|bd011010) .*
0x10201010 (10100080|80001010) (10100040|40001010) (101000a0|a0001010) (10100090|90001010) .*
0x10201020 (00000000|00000000) (1010015d|5d011010) (00000000|00000000) (101001c9|c9011010) .*
0x10201030 (101000c0|c0001010) (101000b0|b0001010) (10100050|50001010) (101000f0|f0001010) .*
0x10201040 (10100205|05021010) (101001a5|a5011010) (10100175|75011010) (101001f9|f9011010) .*
0x10201050 (101000e0|e0001010) (10100070|70001010) (10100060|60001010) (10100030|30001010) .*
0x10201060 (10100121|21011010) (10100151|51011010) (10100169|69011010) (101001e1|e1011010) .*
0x10201070 (101000d0|d0001010) (10100020|20001010) (10100100|00011010) (10100110|10011010) .*
Primary GOT:
Canonical gp value: 10209ff0
Reserved entries:
Address Access Initial Purpose
10202000 -32752\(gp\) 00000000 Lazy resolver
10202004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10202008 -32744\(gp\) 101001bd
1020200c -32740\(gp\) 101000a0
10202010 -32736\(gp\) 10100090
10202014 -32732\(gp\) 101001c9
10202018 -32728\(gp\) 10100050
1020201c -32724\(gp\) 101000f0
10202020 -32720\(gp\) 10100175
10202024 -32716\(gp\) 101001f9
10202028 -32712\(gp\) 10100060
1020202c -32708\(gp\) 10100030
10202030 -32704\(gp\) 10100169
10202034 -32700\(gp\) 101001e1
10202038 -32696\(gp\) 10100100
1020203c -32692\(gp\) 10100110
10202040 -32688\(gp\) 1010015d
10202044 -32684\(gp\) 101000c0
10202048 -32680\(gp\) 101000b0
1020204c -32676\(gp\) 10100121
10202050 -32672\(gp\) 10100151
10202054 -32668\(gp\) 101000d0
10202058 -32664\(gp\) 10100020
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
1020205c -32660\(gp\) 00000000 00000000 FUNC UND f_iu_ic
10202060 -32656\(gp\) 00000000 00000000 FUNC UND f_ic
10202064 -32652\(gp\) 00000000 00000000 FUNC UND f_iu
10202068 -32648\(gp\) 00000000 00000000 FUNC UND f
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100000 10100121 FUNC UND f_lo_iu
1020000c 10100000 10100020 FUNC UND f_lo_iu_du_dc
10200010 10100000 10100030 FUNC UND f_lo_du_ic_dc
10200014 10100000 10100040 FUNC UND f_du_dc
10200018 10100000 10100151 FUNC UND f_lo_iu_dc
1020001c 10100000 10100050 FUNC UND f_iu_du_ic
10200020 10100000 10100060 FUNC UND f_lo_du_ic
10200024 10100000 1010015d FUNC UND f_iu_dc
10200028 10100000 10100169 FUNC UND f_lo_iu_ic
1020002c 10100000 10100175 FUNC UND f_lo_ic
10200030 10100000 10100070 FUNC UND f_lo_du_dc
10200034 10100000 10100080 FUNC UND f_du
10200038 10100000 10100090 FUNC UND f_du_ic_dc
1020003c 10100000 101000a0 FUNC UND f_du_ic
10200040 10100000 101000b0 FUNC UND f_iu_du_dc
10200044 10100000 101001a5 FUNC UND f_lo_dc
10200048 10100000 101000c0 FUNC UND f_iu_du
1020004c 10100000 101000d0 FUNC UND f_lo_iu_du
10200050 10100000 101001b1 FUNC UND f_dc
10200054 10100000 101001bd FUNC UND f_ic_dc
10200058 10100000 101000e0 FUNC UND f_lo_du
1020005c 10100000 101001c9 FUNC UND f_iu_ic_dc
10200060 10100000 101000f0 FUNC UND f_iu_du_ic_dc
10200064 10100000 101001e1 FUNC UND f_lo_iu_ic_dc
10200068 10100000 10100100 FUNC UND f_lo_iu_du_ic
1020006c 10100000 10100110 FUNC UND f_lo_iu_du_ic_dc
10200070 10100000 101001f9 FUNC UND f_lo_ic_dc
10200074 10100000 10100205 FUNC UND f_lo

View File

@ -0,0 +1,512 @@
.* file format .*
Disassembly of section \.plt:
# Only _du (direct call from uncompressed code) functions should have
# non-microMIPS PLTs. All the rest must be microMIPS.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07821 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100030 <f_lo_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100040 <f_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100050 <f_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100060 <f_lo_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90020 lw \$25,32\(\$15\)
.*: 03200008 jr \$25
.*: 25f80020 addiu \$24,\$15,32
10100070 <f_lo_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90030 lw \$25,48\(\$15\)
.*: 03200008 jr \$25
.*: 25f80030 addiu \$24,\$15,48
10100080 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90034 lw \$25,52\(\$15\)
.*: 03200008 jr \$25
.*: 25f80034 addiu \$24,\$15,52
10100090 <f_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90038 lw \$25,56\(\$15\)
.*: 03200008 jr \$25
.*: 25f80038 addiu \$24,\$15,56
101000a0 <f_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9003c lw \$25,60\(\$15\)
.*: 03200008 jr \$25
.*: 25f8003c addiu \$24,\$15,60
101000b0 <f_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90040 lw \$25,64\(\$15\)
.*: 03200008 jr \$25
.*: 25f80040 addiu \$24,\$15,64
101000c0 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90048 lw \$25,72\(\$15\)
.*: 03200008 jr \$25
.*: 25f80048 addiu \$24,\$15,72
101000d0 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9004c lw \$25,76\(\$15\)
.*: 03200008 jr \$25
.*: 25f8004c addiu \$24,\$15,76
101000e0 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90058 lw \$25,88\(\$15\)
.*: 03200008 jr \$25
.*: 25f80058 addiu \$24,\$15,88
101000f0 <f_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90060 lw \$25,96\(\$15\)
.*: 03200008 jr \$25
.*: 25f80060 addiu \$24,\$15,96
10100100 <f_lo_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90068 lw \$25,104\(\$15\)
.*: 03200008 jr \$25
.*: 25f80068 addiu \$24,\$15,104
10100110 <f_lo_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9006c lw \$25,108\(\$15\)
.*: 03200008 jr \$25
.*: 25f8006c addiu \$24,\$15,108
10100120 <f_lo_iu@micromipsplt>:
.*: 7903 ffba addiu \$2,\$pc,1048296
# ^ 0x10200008
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010012c <f_lo_iu_du_dc@micromipsplt>:
.*: 7903 ffb8 addiu \$2,\$pc,1048288
# ^ 0x1020000c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100138 <f_lo_du_ic_dc@micromipsplt>:
.*: 7903 ffb6 addiu \$2,\$pc,1048280
# ^ 0x10200010
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100144 <f_du_dc@micromipsplt>:
.*: 7903 ffb4 addiu \$2,\$pc,1048272
# ^ 0x10200014
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100150 <f_lo_iu_dc@micromipsplt>:
.*: 7903 ffb2 addiu \$2,\$pc,1048264
# ^ 0x10200018
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010015c <f_iu_dc@micromipsplt>:
.*: 7903 ffb2 addiu \$2,\$pc,1048264
# ^ 0x10200024
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100168 <f_lo_iu_ic@micromipsplt>:
.*: 7903 ffb0 addiu \$2,\$pc,1048256
# ^ 0x10200028
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100174 <f_lo_ic@micromipsplt>:
.*: 7903 ffae addiu \$2,\$pc,1048248
# ^ 0x1020002c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100180 <f_lo_du_dc@micromipsplt>:
.*: 7903 ffac addiu \$2,\$pc,1048240
# ^ 0x10200030
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010018c <f_du_ic_dc@micromipsplt>:
.*: 7903 ffab addiu \$2,\$pc,1048236
# ^ 0x10200038
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100198 <f_iu_du_dc@micromipsplt>:
.*: 7903 ffaa addiu \$2,\$pc,1048232
# ^ 0x10200040
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001a4 <f_lo_dc@micromipsplt>:
.*: 7903 ffa8 addiu \$2,\$pc,1048224
# ^ 0x10200044
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001b0 <f_dc@micromipsplt>:
.*: 7903 ffa8 addiu \$2,\$pc,1048224
# ^ 0x10200050
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001bc <f_ic_dc@micromipsplt>:
.*: 7903 ffa6 addiu \$2,\$pc,1048216
# ^ 0x10200054
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001c8 <f_iu_ic_dc@micromipsplt>:
.*: 7903 ffa5 addiu \$2,\$pc,1048212
# ^ 0x1020005c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001d4 <f_iu_du_ic_dc@micromipsplt>:
.*: 7903 ffa3 addiu \$2,\$pc,1048204
# ^ 0x10200060
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001e0 <f_lo_iu_ic_dc@micromipsplt>:
.*: 7903 ffa1 addiu \$2,\$pc,1048196
# ^ 0x10200064
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001ec <f_lo_iu_du_ic_dc@micromipsplt>:
.*: 7903 ffa0 addiu \$2,\$pc,1048192
# ^ 0x1020006c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001f8 <f_lo_ic_dc@micromipsplt>:
.*: 7903 ff9e addiu \$2,\$pc,1048184
# ^ 0x10200070
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100204 <f_lo@micromipsplt>:
.*: 7903 ff9c addiu \$2,\$pc,1048176
# ^ 0x10200074
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
Disassembly of section \.MIPS\.stubs:
10101000 <_MIPS_STUBS_>:
# Lazy-binding stub for f_iu.
.*: ff3c 8010 lw \$25,-32752\(\$28\)
.*: 0dff move \$15,\$31
.*: 45d9 jalr \$25
.*: 3300 0021 li \$24,33
# Lazy-binding stub for f_ic.
.*: ff3c 8010 lw \$25,-32752\(\$28\)
.*: 0dff move \$15,\$31
.*: 45d9 jalr \$25
.*: 3300 0020 li \$24,32
# Lazy-binding stub for f_iu_ic.
.*: ff3c 8010 lw \$25,-32752\(\$28\)
.*: 0dff move \$15,\$31
.*: 45d9 jalr \$25
.*: 3300 001f li \$24,31
\.\.\.
Disassembly of section \.text\.a:
10102000 <testc>:
.*: .... .... jal [0-9a-f]+ <f_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8070 lw \$2,-32656\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jal [0-9a-f]+ <f_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8018 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 801c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8020 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_iu_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: .... .... jal [0-9a-f]+ <f_iu_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_iu_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8030 lw \$2,-32720\(\$3\)
# ^ local GOT entry for f_lo_ic@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8034 lw \$2,-32716\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8038 lw \$2,-32712\(\$3\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 803c lw \$2,-32708\(\$3\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 459f jr \$31
Disassembly of section \.text\.b:
10103000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c628074 lw \$2,-32652\(\$3\)
# ^ global GOT entry for f_iu
.*: 8c628050 lw \$2,-32688\(\$3\)
# ^ local GOT entry for f_iu_dc@micromipsplt
.*: 8c62806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@micromipsplt
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628054 lw \$2,-32684\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628058 lw \$2,-32680\(\$3\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62805c lw \$2,-32676\(\$3\)
# ^ local GOT entry for f_lo_iu@micromipsplt
.*: 8c628060 lw \$2,-32672\(\$3\)
# ^ local GOT entry for f_lo_iu_dc@micromipsplt
.*: 8c628040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@micromipsplt
.*: 8c628044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@micromipsplt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628064 lw \$2,-32668\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628068 lw \$2,-32664\(\$3\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10104000 <testlo>:
.*: 3040 0205 li \$2,517
# ^ low 16 bits of f_lo@micromipsplt
.*: 3040 01a5 li \$2,421
# ^ low 16 bits of f_lo_dc@micromipsplt
.*: 3040 0175 li \$2,373
# ^ low 16 bits of f_lo_ic@micromipsplt
.*: 3040 01f9 li \$2,505
# ^ low 16 bits of f_lo_ic_dc@micromipsplt
.*: 3040 00e0 li \$2,224
# ^ low 16 bits of f_lo_du@plt
.*: 3040 0070 li \$2,112
# ^ low 16 bits of f_lo_du_dc@plt
.*: 3040 0060 li \$2,96
# ^ low 16 bits of f_lo_du_ic@plt
.*: 3040 0030 li \$2,48
# ^ low 16 bits of f_lo_du_ic_dc@plt
.*: 3040 0121 li \$2,289
# ^ low 16 bits of f_lo_iu@micromipsplt
.*: 3040 0151 li \$2,337
# ^ low 16 bits of f_lo_iu_dc@micromipsplt
.*: 3040 0169 li \$2,361
# ^ low 16 bits of f_lo_iu_ic@micromipsplt
.*: 3040 01e1 li \$2,481
# ^ low 16 bits of f_lo_iu_ic_dc@micromipsplt
.*: 3040 00d0 li \$2,208
# ^ low 16 bits of f_lo_iu_du@plt
.*: 3040 0020 li \$2,32
# ^ low 16 bits of f_lo_iu_du_dc@plt
.*: 3040 0100 li \$2,256
# ^ low 16 bits of f_lo_iu_du_ic@plt
.*: 3040 0110 li \$2,272
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt

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@ -0,0 +1,170 @@
Dynamic section .*
#...
0x00000003 \(PLTGOT\) 0x10201000
#...
0x70000013 \(MIPS_GOTSYM\) 0x1f
0x00000014 \(PLTREL\) REL
0x00000017 \(JMPREL\) 0x10004000
0x00000002 \(PLTRELSZ\) 224 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) 0x10200000
#...
Relocation section '\.rel\.plt' .*
Offset Info Type Sym\.Value Sym\. Name
10200008 [^ ]+ R_MIPS_JUMP_SLOT 10100121 f_lo_iu
1020000c [^ ]+ R_MIPS_JUMP_SLOT 10100020 f_lo_iu_du_dc
10200010 [^ ]+ R_MIPS_JUMP_SLOT 10100030 f_lo_du_ic_dc
10200014 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_dc
10200018 [^ ]+ R_MIPS_JUMP_SLOT 10100151 f_lo_iu_dc
1020001c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_ic
10200020 [^ ]+ R_MIPS_JUMP_SLOT 10100060 f_lo_du_ic
10200024 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_dc
10200028 [^ ]+ R_MIPS_JUMP_SLOT 10100169 f_lo_iu_ic
1020002c [^ ]+ R_MIPS_JUMP_SLOT 10100175 f_lo_ic
10200030 [^ ]+ R_MIPS_JUMP_SLOT 10100070 f_lo_du_dc
10200034 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du
10200038 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_ic_dc
1020003c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_du_ic
10200040 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_dc
10200044 [^ ]+ R_MIPS_JUMP_SLOT 101001a5 f_lo_dc
10200048 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du
1020004c [^ ]+ R_MIPS_JUMP_SLOT 101000d0 f_lo_iu_du
10200050 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_dc
10200054 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_ic_dc
10200058 [^ ]+ R_MIPS_JUMP_SLOT 101000e0 f_lo_du
1020005c [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_ic_dc
10200060 [^ ]+ R_MIPS_JUMP_SLOT 00000000 f_iu_du_ic_dc
10200064 [^ ]+ R_MIPS_JUMP_SLOT 101001e1 f_lo_iu_ic_dc
10200068 [^ ]+ R_MIPS_JUMP_SLOT 10100100 f_lo_iu_du_ic
1020006c [^ ]+ R_MIPS_JUMP_SLOT 10100110 f_lo_iu_du_ic_dc
10200070 [^ ]+ R_MIPS_JUMP_SLOT 101001f9 f_lo_ic_dc
10200074 [^ ]+ R_MIPS_JUMP_SLOT 10100205 f_lo
Symbol table '\.dynsym' .*
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
# _lo symbols have their address taken, so their PLT symbols need to have
# a nonzero value. They must also have STO_MIPS_PLT in order to distinguish
# them from old-style lazy-binding stubs. Non-_lo symbols are only called,
# so their PLT symbols should have a zero value and no STO_MIPS_PLT annotation.
#
# A MIPS (as opposed to microMIPS) PLT should be used as the symbol value
# if and only if the function has a direct MIPS caller (du).
.*: 10100121 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu
.*: 10100020 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_dc
#...
.*: 10100030 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_dc
.*: 10100151 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_ic
.*: 10100060 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_ic
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_dc
.*: 10100169 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic
.*: 10100175 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic
.*: 10100070 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_du_ic
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_dc
.*: 101001a5 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du
.*: 101000d0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_ic_dc
.*: 101000e0 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_du
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_ic_dc
.*: 00000000 0 FUNC GLOBAL DEFAULT UND f_iu_du_ic_dc
#...
.*: 101001e1 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_ic_dc
.*: 10100100 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic
.*: 10100110 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_iu_du_ic_dc
.*: 101001f9 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo_ic_dc
.*: 10100205 0 FUNC GLOBAL DEFAULT \[MIPS PLT\] UND f_lo
# The start of the GOT-mapped area. This should only contain functions that
# are accessed purely via the traditional psABI scheme. The symbol value
# is the address of the lazy-binding stub.
31: 10101019 0 FUNC GLOBAL DEFAULT UND f_iu_ic
32: 1010100d 0 FUNC GLOBAL DEFAULT UND f_ic
33: 10101001 0 FUNC GLOBAL DEFAULT UND f_iu
Symbol table '\.symtab' .*
#...
Primary GOT:
Canonical gp value: 10208ff0
Reserved entries:
Address Access Initial Purpose
10201000 -32752\(gp\) 00000000 Lazy resolver
10201004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# See the disassembly output for the meaning of each entry.
Local entries:
Address Access Initial
10201008 -32744\(gp\) 101001bd
1020100c -32740\(gp\) 101000a0
10201010 -32736\(gp\) 10100090
10201014 -32732\(gp\) 101001c9
10201018 -32728\(gp\) 10100050
1020101c -32724\(gp\) 101000f0
10201020 -32720\(gp\) 10100175
10201024 -32716\(gp\) 101001f9
10201028 -32712\(gp\) 10100060
1020102c -32708\(gp\) 10100030
10201030 -32704\(gp\) 10100169
10201034 -32700\(gp\) 101001e1
10201038 -32696\(gp\) 10100100
1020103c -32692\(gp\) 10100110
10201040 -32688\(gp\) 1010015d
10201044 -32684\(gp\) 101000c0
10201048 -32680\(gp\) 101000b0
1020104c -32676\(gp\) 10100121
10201050 -32672\(gp\) 10100151
10201054 -32668\(gp\) 101000d0
10201058 -32664\(gp\) 10100020
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
1020105c -32660\(gp\) 10101019 10101019 FUNC UND f_iu_ic
10201060 -32656\(gp\) 1010100d 1010100d FUNC UND f_ic
10201064 -32652\(gp\) 10101001 10101001 FUNC UND f_iu
PLT GOT:
Reserved entries:
Address Initial Purpose
10200000 00000000 PLT lazy resolver
10200004 00000000 Module pointer
Entries:
Address Initial Sym\.Val\. Type Ndx Name
10200008 10100000 10100121 FUNC UND f_lo_iu
1020000c 10100000 10100020 FUNC UND f_lo_iu_du_dc
10200010 10100000 10100030 FUNC UND f_lo_du_ic_dc
10200014 10100000 00000000 FUNC UND f_du_dc
10200018 10100000 10100151 FUNC UND f_lo_iu_dc
1020001c 10100000 00000000 FUNC UND f_iu_du_ic
10200020 10100000 10100060 FUNC UND f_lo_du_ic
10200024 10100000 00000000 FUNC UND f_iu_dc
10200028 10100000 10100169 FUNC UND f_lo_iu_ic
1020002c 10100000 10100175 FUNC UND f_lo_ic
10200030 10100000 10100070 FUNC UND f_lo_du_dc
10200034 10100000 00000000 FUNC UND f_du
10200038 10100000 00000000 FUNC UND f_du_ic_dc
1020003c 10100000 00000000 FUNC UND f_du_ic
10200040 10100000 00000000 FUNC UND f_iu_du_dc
10200044 10100000 101001a5 FUNC UND f_lo_dc
10200048 10100000 00000000 FUNC UND f_iu_du
1020004c 10100000 101000d0 FUNC UND f_lo_iu_du
10200050 10100000 00000000 FUNC UND f_dc
10200054 10100000 00000000 FUNC UND f_ic_dc
10200058 10100000 101000e0 FUNC UND f_lo_du
1020005c 10100000 00000000 FUNC UND f_iu_ic_dc
10200060 10100000 00000000 FUNC UND f_iu_du_ic_dc
10200064 10100000 101001e1 FUNC UND f_lo_iu_ic_dc
10200068 10100000 10100100 FUNC UND f_lo_iu_du_ic
1020006c 10100000 10100110 FUNC UND f_lo_iu_du_ic_dc
10200070 10100000 101001f9 FUNC UND f_lo_ic_dc
10200074 10100000 10100205 FUNC UND f_lo

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@ -0,0 +1,38 @@
SECTIONS
{
. = 0x10000000;
.interp : { *(.interp) }
.reginfo : { *(.reginfo) }
.hash : { *(.hash) }
. = ALIGN(0x1000);
.dynsym : { *(.dynsym) }
. = ALIGN(0x1000);
.dynstr : { *(.dynstr) }
. = ALIGN(0x1000);
.dynamic : { *(.dynamic) }
. = ALIGN(0x1000);
.rel.dyn : { *(.rel.dyn) }
. = ALIGN(0x1000);
.rel.plt : { *(.rel.plt) }
. = 0x10100000;
.plt : { *(.plt) }
. = ALIGN(0x1000);
.MIPS.stubs : { *(.MIPS.stubs) }
. = ALIGN(0x1000);
.text.a : { *(.text.a) }
. = ALIGN(0x1000);
.text.b : { *(.text.b) }
. = ALIGN(0x1000);
.text.c : { *(.text.c) }
. = ALIGN(0x1000);
.text.d : { *(.text.d) }
. = 0x10200000;
.got.plt : { *(.got.plt) }
. = ALIGN(0x1000);
.data : { *(.data) }
. = ALIGN(0x1000);
_gp = . + 0x7ff0;
.got : { *(.got) }
. = ALIGN(0x1000);
.rld_map : { *(.rld_map) }
}

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@ -0,0 +1,62 @@
.macro call_stub, name
.set push
.set nomips16
.section .mips16.call.\name, "ax", @progbits
.ent __call_stub_\name
.type __call_stub_\name, @function
__call_stub_\name:
la $25, \name
jr $25
.set pop
.endm
# Flags to specify how a particular function is referenced
.equ DC, 1 # Direct call from "compressed" code
.equ IC, 2 # Indirect call from "compressed" code
.equ DU, 4 # Direct call from "uncompressed" code
.equ IU, 8 # Indirect call from "uncompressed" code
.equ LO, 16 # Direct address reference (%lo)
# A wrapper around a macro called test_one, which is defined by
# the file that includes this one. NAME is the name of a function
# that is referenced in the way described by FLAGS, an inclusive OR
# of the flags above. The wrapper filters out any functions whose
# FLAGS are not a subset of FILTER.
.macro test_filter, name, flags
.if (\flags & filter) == \flags
test_one \name, \flags
.endif
.endm
.macro test_all_dc, name, flags
test_filter \name, \flags
test_filter \name\()_dc, (\flags | DC)
.endm
.macro test_all_ic, name, flags
test_all_dc \name, \flags
test_all_dc \name\()_ic, (\flags | IC)
.endm
.macro test_all_du, name, flags
test_all_ic \name, \flags
test_all_ic \name\()_du, (\flags | DU)
.endm
.macro test_all_iu, name, flags
test_all_du \name, \flags
test_all_du \name\()_iu, (\flags | IU)
.endm
.macro test_all_lo, name, flags
test_all_iu \name, \flags
test_all_iu \name\()_lo, (\flags | LO)
.endm
# Test all the combinations of interest.
.macro test_all
test_all_lo f, 0
.endm

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@ -0,0 +1,37 @@
# Define a function with all "compressed" (dc and ic) references.
.abicalls
.option pic0
.include "compressed-plt-1.s"
.macro test_one, name, types
.if (\types) & DC
jal \name
nop
.if micromips
.ifdef o32
j \name
nop
.endif
.endif
.endif
.if (\types) & IC
lw $2, %call16(\name)($3)
.endif
.endm
.if micromips
.set micromips
.else
.set mips16
.endif
.section .text.a, "ax", @progbits
.globl testc
.ent testc
.set noreorder
testc:
test_all
jr $31
.end testc

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@ -0,0 +1,27 @@
# Define a function with all "uncompressed" (du and iu) references.
.abicalls
.option pic0
.include "compressed-plt-1.s"
.macro test_one, name, types
.if (\types) & DU
jal \name
nop
j \name
nop
.endif
.if (\types) & IU
lw $2, %call16(\name)($3)
.endif
.endm
.section .text.b, "ax", @progbits
.globl testu
.ent testu
.set noreorder
testu:
test_all
jr $31
.end testu

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@ -0,0 +1,24 @@
# Define a function with all direct (%lo) references.
.abicalls
.option pic0
.include "compressed-plt-1.s"
.macro test_one, name, types
.if (\types) & LO
li $2,%lo(\name)
.endif
.endm
.if micromips
.set micromips
.endif
.section .text.c, "ax", @progbits
.globl testlo
.ent testlo
.set noreorder
testlo:
test_all
.end testlo

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@ -0,0 +1,22 @@
# Create a GOT reference for every function under test.
.abicalls
.option pic2
.include "compressed-plt-1.s"
.macro test_one, name, types
lw $2,%got(\name)($gp)
.endm
.if micromips
.set micromips
.endif
.section .text.d, "ax", @progbits
.globl testgot
.ent testgot
.set noreorder
testgot:
test_all
.end testgot

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@ -0,0 +1,13 @@
# Create a .word reference for every function under test.
.abicalls
.option pic2
.include "compressed-plt-1.s"
.macro test_one, name, types
.word \name
.endm
.data
test_all

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@ -751,3 +751,79 @@ foreach { abi } $abis {
[list "objdump -d jalr3.dd"] \
"jalr3-${abi}"]]
}
proc build_mips_plt_lib { abi } {
global abi_asflags
global abi_ldflags
run_ld_link_tests [list \
[list "Shared $abi library for compressed PLT tests" \
"-shared $abi_ldflags($abi)" "" \
"$abi_asflags($abi)" \
{ compressed-plt-1-dyn.s } \
{} \
"compressed-plt-1-${abi}-dyn.so"]]
}
proc run_mips_plt_test { name abi filter micromips suffix {extra {}} } {
global abi_asflags
global abi_ldflags
set as_flags "$abi_asflags($abi) --defsym filter=$filter"
append as_flags " --defsym micromips=$micromips --defsym $abi=1"
if {[string equal $abi o32]} {
append as_flags " -march=mips2"
}
set ld_flags "$abi_ldflags($abi) -T compressed-plt-1.ld"
set dynobj "tmpdir/compressed-plt-1-${abi}-dyn.so"
set files [list]
if { $filter & 3 } {
lappend files compressed-plt-1a.s
}
if { $filter & 12 } {
lappend files compressed-plt-1b.s
}
if { $filter & 16 } {
lappend files compressed-plt-1c.s
}
eval [list lappend files] $extra
set readelf_flags "-A --syms --relocs -d"
if { [string match "*word*" $suffix] } {
append readelf_flags " -x.data"
}
set objdump_flags "-d -Mgpr-names=numeric"
set basename "compressed-plt-1-${abi}-${suffix}"
run_ld_link_tests [list \
[list "$name" $ld_flags $dynobj \
"$as_flags" $files \
[list [list readelf $readelf_flags ${basename}.rd] \
[list objdump $objdump_flags ${basename}.od]] \
$basename]]
}
if { $linux_gnu } {
build_mips_plt_lib o32
run_mips_plt_test "o32 PLTs for standard encoding" o32 28 0 se
run_mips_plt_test "o32 PLTs for MIPS16 encoding" o32 19 0 mips16-only
run_mips_plt_test "o32 PLTs for microMIPS encoding" o32 19 1 umips-only
run_mips_plt_test "o32 PLTs for mixed MIPS and MIPS16" \
o32 -1 0 mips16
run_mips_plt_test "o32 PLTs for mixed MIPS and MIPS16 with %got" \
o32 -1 0 mips16-got compressed-plt-1d.s
run_mips_plt_test "o32 PLTs for mixed MIPS and MIPS16 with .word" \
o32 -1 0 mips16-word compressed-plt-1e.s
run_mips_plt_test "o32 PLTs for mixed MIPS and microMIPS" \
o32 -1 1 umips
run_mips_plt_test "o32 PLTs for mixed MIPS and microMIPS with %got" \
o32 -1 1 umips-got compressed-plt-1d.s
run_mips_plt_test "o32 PLTs for mixed MIPS and microMIPS with .word" \
o32 -1 1 umips-word compressed-plt-1e.s
if $has_newabi {
build_mips_plt_lib n32
run_mips_plt_test "n32 PLTs for mixed MIPS and MIPS16" \
n32 -1 0 mips16
run_mips_plt_test "n32 PLTs for mixed MIPS and microMIPS" \
n32 -1 1 umips
}
}

View File

@ -331,10 +331,12 @@ proc default_ld_compile { cc source object } {
proc default_ld_assemble { as in_flags source object } {
global ASFLAGS
global host_triplet
global srcdir
global subdir
if ![info exists ASFLAGS] { set ASFLAGS "" }
set flags [big_or_little_endian]
set flags "[big_or_little_endian] -I$srcdir/$subdir"
set exec_output [run_host_cmd "$as" "$flags $in_flags $ASFLAGS -o $object $source"]
set exec_output [prune_warnings $exec_output]
if [string match "" $exec_output] then {