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* config/tc-mn10300.c (mn10300_insert_operand): Handle
repeated register operands. For mov imm8,dn mov imm8,an cmp imm8,dn cmp imm8,an The register appears twice in the bit pattern... Egad.
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@ -1,3 +1,8 @@
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Mon Nov 4 12:53:40 1996 Jeffrey A Law (law@cygnus.com)
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* config/tc-mn10300.c (mn10300_insert_operand): Handle
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repeated register operands.
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Fri Nov 1 10:42:49 1996 Ian Lance Taylor <ian@cygnus.com>
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* doc/as.texinfo: Added section on reporting bugs.
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@ -435,6 +435,7 @@ md_assemble (str)
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const char *errmsg = NULL;
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int op_idx;
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char *hold;
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int extra_shift = 0;
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fc = 0;
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match = 0;
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@ -587,8 +588,18 @@ md_assemble (str)
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goto error;
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}
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if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
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extra_shift = 8;
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else if (opcode->format == FMT_D2 || opcode->format == FMT_D4
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|| opcode->format == FMT_S2 || opcode->format == FMT_S4
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|| opcode->format == FMT_S6 || opcode->format == FMT_D5)
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extra_shift = 16;
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else
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extra_shift = 0;
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insn = mn10300_insert_operand (insn, operand, ex.X_add_number,
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(char *) NULL, 0);
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(char *) NULL, 0, extra_shift);
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break;
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case O_constant:
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@ -604,7 +615,7 @@ md_assemble (str)
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}
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insn = mn10300_insert_operand (insn, operand, ex.X_add_number,
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(char *) NULL, 0);
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(char *) NULL, 0, 0);
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break;
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default:
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@ -795,7 +806,7 @@ md_apply_fix3 (fixp, valuep, seg)
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insn = bfd_getl32((unsigned char *) where);
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insn = mn10300_insert_operand (insn, operand, (offsetT) value,
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fixp->fx_file, fixp->fx_line);
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fixp->fx_file, fixp->fx_line, 0);
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bfd_putl32((bfd_vma) insn, (unsigned char *) where);
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if (fixp->fx_done)
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@ -833,12 +844,13 @@ md_apply_fix3 (fixp, valuep, seg)
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/* Insert an operand value into an instruction. */
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static unsigned long
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mn10300_insert_operand (insn, operand, val, file, line)
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mn10300_insert_operand (insn, operand, val, file, line, shift)
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unsigned long insn;
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const struct mn10300_operand *operand;
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offsetT val;
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char *file;
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unsigned int line;
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unsigned int shift;
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{
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if (operand->bits != 32)
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{
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@ -873,7 +885,12 @@ mn10300_insert_operand (insn, operand, val, file, line)
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}
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}
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insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
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insn |= (((long) val & ((1 << operand->bits) - 1))
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<< (operand->shift + shift));
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if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
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insn |= (((long) val & ((1 << operand->bits) - 1))
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<< (operand->shift + shift + 2));
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return insn;
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}
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