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* infrun.c (handle_inferior_event): Assume that catchpoints
are not affected by DECR_PC_AFTER_BREAK.
This commit is contained in:
parent
81e5617914
commit
675bf4cbc8
@ -1,3 +1,8 @@
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2002-12-15 Daniel Jacobowitz <drow@mvista.com>
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* infrun.c (handle_inferior_event): Assume that catchpoints
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are not affected by DECR_PC_AFTER_BREAK.
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2002-12-15 Daniel Jacobowitz <drow@mvista.com>
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* target.c (update_current_target): Don't inherit DONT_USE.
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54
gdb/infrun.c
54
gdb/infrun.c
@ -1335,17 +1335,15 @@ handle_inferior_event (struct execution_control_state *ecs)
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stop_pc = read_pc_pid (ecs->ptid);
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ecs->saved_inferior_ptid = inferior_ptid;
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inferior_ptid = ecs->ptid;
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/* The second argument of bpstat_stop_status is meant to help
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distinguish between a breakpoint trap and a singlestep trap.
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This is only important on targets where DECR_PC_AFTER_BREAK
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is non-zero. The prev_pc test is meant to distinguish between
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singlestepping a trap instruction, and singlestepping thru a
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jump to the instruction following a trap instruction. */
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stop_bpstat = bpstat_stop_status (&stop_pc,
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currently_stepping (ecs) &&
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prev_pc !=
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stop_pc - DECR_PC_AFTER_BREAK);
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/* Assume that catchpoints are not really software breakpoints. If
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some future target implements them using software breakpoints then
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that target is responsible for fudging DECR_PC_AFTER_BREAK. Thus
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we pass 1 for the NOT_A_SW_BREAKPOINT argument, so that
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bpstat_stop_status will not decrement the PC. */
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stop_bpstat = bpstat_stop_status (&stop_pc, 1);
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ecs->random_signal = !bpstat_explains_signal (stop_bpstat);
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inferior_ptid = ecs->saved_inferior_ptid;
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goto process_event_stop_test;
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@ -1386,17 +1384,15 @@ handle_inferior_event (struct execution_control_state *ecs)
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}
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stop_pc = read_pc ();
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/* The second argument of bpstat_stop_status is meant to help
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distinguish between a breakpoint trap and a singlestep trap.
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This is only important on targets where DECR_PC_AFTER_BREAK
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is non-zero. The prev_pc test is meant to distinguish between
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singlestepping a trap instruction, and singlestepping thru a
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jump to the instruction following a trap instruction. */
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stop_bpstat = bpstat_stop_status (&stop_pc,
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currently_stepping (ecs) &&
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prev_pc !=
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stop_pc - DECR_PC_AFTER_BREAK);
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/* Assume that catchpoints are not really software breakpoints. If
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some future target implements them using software breakpoints then
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that target is responsible for fudging DECR_PC_AFTER_BREAK. Thus
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we pass 1 for the NOT_A_SW_BREAKPOINT argument, so that
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bpstat_stop_status will not decrement the PC. */
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stop_bpstat = bpstat_stop_status (&stop_pc, 1);
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ecs->random_signal = !bpstat_explains_signal (stop_bpstat);
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goto process_event_stop_test;
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@ -1435,17 +1431,15 @@ handle_inferior_event (struct execution_control_state *ecs)
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stop_pc = read_pc_pid (ecs->ptid);
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ecs->saved_inferior_ptid = inferior_ptid;
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inferior_ptid = ecs->ptid;
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/* The second argument of bpstat_stop_status is meant to help
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distinguish between a breakpoint trap and a singlestep trap.
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This is only important on targets where DECR_PC_AFTER_BREAK
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is non-zero. The prev_pc test is meant to distinguish between
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singlestepping a trap instruction, and singlestepping thru a
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jump to the instruction following a trap instruction. */
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stop_bpstat = bpstat_stop_status (&stop_pc,
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currently_stepping (ecs) &&
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prev_pc !=
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stop_pc - DECR_PC_AFTER_BREAK);
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/* Assume that catchpoints are not really software breakpoints. If
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some future target implements them using software breakpoints then
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that target is responsible for fudging DECR_PC_AFTER_BREAK. Thus
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we pass 1 for the NOT_A_SW_BREAKPOINT argument, so that
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bpstat_stop_status will not decrement the PC. */
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stop_bpstat = bpstat_stop_status (&stop_pc, 1);
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ecs->random_signal = !bpstat_explains_signal (stop_bpstat);
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inferior_ptid = ecs->saved_inferior_ptid;
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goto process_event_stop_test;
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