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Add CRX insns: pushx, popx
Add support to GAS for expressions which are the difference of two symbols
This commit is contained in:
Nick Clifton
parent
575eebb19f
commit
670ec21de9
@ -1,3 +1,11 @@
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2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
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* reloc.c: Add BFD_RELOC_CRX_SWITCH8, BFD_RELOC_CRX_SWITCH16,
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BFD_RELOC_CRX_SWITCH32.
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* bfd-in2.h: Regenerate.
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* elf32-crx.c: Support relocation/relaxation of
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BFD_RELOC_CRX_SWITCH* types.
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2004-07-27 Alan Modra <amodra@bigpond.net.au>
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* elf64-ppc.c: Correct "Linker stubs" comment.
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@ -3463,6 +3463,9 @@ This is the 5 bits of a value. */
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BFD_RELOC_CRX_NUM32,
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BFD_RELOC_CRX_IMM16,
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BFD_RELOC_CRX_IMM32,
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BFD_RELOC_CRX_SWITCH8,
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BFD_RELOC_CRX_SWITCH16,
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BFD_RELOC_CRX_SWITCH32,
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/* These relocs are only used within the CRIS assembler. They are not
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(at present) written to any object files. */
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102
bfd/elf32-crx.c
102
bfd/elf32-crx.c
@ -77,7 +77,10 @@ static const struct crx_reloc_map crx_reloc_map[R_CRX_MAX] =
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{BFD_RELOC_CRX_NUM16, R_CRX_NUM16},
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{BFD_RELOC_CRX_NUM32, R_CRX_NUM32},
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{BFD_RELOC_CRX_IMM16, R_CRX_IMM16},
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{BFD_RELOC_CRX_IMM32, R_CRX_IMM32}
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{BFD_RELOC_CRX_IMM32, R_CRX_IMM32},
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{BFD_RELOC_CRX_SWITCH8, R_CRX_SWITCH8},
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{BFD_RELOC_CRX_SWITCH16, R_CRX_SWITCH16},
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{BFD_RELOC_CRX_SWITCH32, R_CRX_SWITCH32}
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};
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static reloc_howto_type crx_elf_howto_table[] =
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@ -332,7 +335,58 @@ static reloc_howto_type crx_elf_howto_table[] =
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FALSE, /* partial_inplace */
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0xffffffff, /* src_mask */
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0xffffffff, /* dst_mask */
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FALSE) /* pcrel_offset */
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FALSE), /* pcrel_offset */
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/* An 8 bit switch table entry. This is generated for an expression
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such as ``.byte L1 - L2''. The offset holds the difference
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between the reloc address and L2. */
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HOWTO (R_CRX_SWITCH8, /* type */
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0, /* rightshift */
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0, /* size (0 = byte, 1 = short, 2 = long) */
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8, /* bitsize */
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FALSE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_unsigned, /* complain_on_overflow */
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bfd_elf_generic_reloc, /* special_function */
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"R_CRX_SWITCH8", /* name */
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FALSE, /* partial_inplace */
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0xff, /* src_mask */
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0xff, /* dst_mask */
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TRUE), /* pcrel_offset */
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/* A 16 bit switch table entry. This is generated for an expression
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such as ``.word L1 - L2''. The offset holds the difference
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between the reloc address and L2. */
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HOWTO (R_CRX_SWITCH16, /* type */
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0, /* rightshift */
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1, /* size (0 = byte, 1 = short, 2 = long) */
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16, /* bitsize */
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FALSE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_unsigned, /* complain_on_overflow */
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bfd_elf_generic_reloc, /* special_function */
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"R_CRX_SWITCH16", /* name */
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FALSE, /* partial_inplace */
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0xffff, /* src_mask */
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0xffff, /* dst_mask */
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TRUE), /* pcrel_offset */
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/* A 32 bit switch table entry. This is generated for an expression
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such as ``.long L1 - L2''. The offset holds the difference
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between the reloc address and L2. */
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HOWTO (R_CRX_SWITCH32, /* type */
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0, /* rightshift */
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2, /* size (0 = byte, 1 = short, 2 = long) */
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32, /* bitsize */
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FALSE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_unsigned, /* complain_on_overflow */
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bfd_elf_generic_reloc, /* special_function */
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"R_CRX_SWITCH32", /* name */
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FALSE, /* partial_inplace */
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0xffffffff, /* src_mask */
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0xffffffff, /* dst_mask */
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TRUE) /* pcrel_offset */
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};
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/* Retrieve a howto ptr using a BFD reloc_code. */
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@ -406,6 +460,13 @@ crx_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
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return bfd_reloc_ok;
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break;
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case R_CRX_SWITCH8:
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case R_CRX_SWITCH16:
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case R_CRX_SWITCH32:
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/* We only care about the addend, where the difference between
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expressions is kept. */
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Rvalue = 0;
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default:
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break;
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}
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@ -483,7 +544,7 @@ crx_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
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Rvalue |= (((bfd_get_16 (input_bfd, hit_data) << 16) |
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bfd_get_16 (input_bfd, hit_data + 2)) & ~howto->dst_mask);
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if (r_type == R_CRX_NUM32)
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if (r_type == R_CRX_NUM32 || r_type == R_CRX_SWITCH32)
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/* Relocation on DATA is purely little-endian, that is, for a
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multi-byte datum, the lowest address in memory contains the
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little end of the datum, that is, the least significant byte.
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@ -562,7 +623,40 @@ elf32_crx_relax_delete_bytes (bfd *abfd, asection *sec,
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if (isym->st_shndx == sec_shndx
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&& isym->st_value > addr
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&& isym->st_value < toaddr)
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isym->st_value -= count;
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{
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/* Adjust the addend of SWITCH relocations in this section,
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which reference this local symbol. */
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for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
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{
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unsigned long r_symndx;
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Elf_Internal_Sym *rsym;
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bfd_vma addsym, subsym;
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/* Skip if not a SWITCH relocation. */
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if (ELF32_R_TYPE (irel->r_info) != (int) R_CRX_SWITCH8
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&& ELF32_R_TYPE (irel->r_info) != (int) R_CRX_SWITCH16
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&& ELF32_R_TYPE (irel->r_info) != (int) R_CRX_SWITCH32)
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continue;
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r_symndx = ELF32_R_SYM (irel->r_info);
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rsym = (Elf_Internal_Sym *) symtab_hdr->contents + r_symndx;
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/* Skip if not the local adjusted symbol. */
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if (rsym != isym)
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continue;
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addsym = isym->st_value;
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subsym = addsym - irel->r_addend;
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/* Fix the addend only when -->> (addsym > addr >= subsym). */
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if (subsym <= addr)
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irel->r_addend -= count;
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else
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continue;
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}
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isym->st_value -= count;
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}
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}
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/* Now adjust the global symbols defined in this section. */
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@ -3888,6 +3888,12 @@ ENUMX
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BFD_RELOC_CRX_IMM16
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ENUMX
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BFD_RELOC_CRX_IMM32
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ENUMX
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BFD_RELOC_CRX_SWITCH8
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ENUMX
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BFD_RELOC_CRX_SWITCH16
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ENUMX
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BFD_RELOC_CRX_SWITCH32
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ENUMDOC
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NS CRX Relocations.
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@ -1,4 +1,10 @@
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2004-07-26 H.J. Lu <hongjiu.lu@intel.com>
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2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
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* config/tc-crx.c: Support evaluating the difference between two
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symbols.
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* config/tc-crx.h: Likewise.
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2004-07-26 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-ia64.c (start_unwind_section): Set the linked-to
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section.
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@ -1327,7 +1327,7 @@ coff_frob_symbol (symp, punt)
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order to call SA_SET_SYM_ENDNDX correctly. */
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if (! symbol_used_in_reloc_p (symp)
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&& ((symbol_get_bfdsym (symp)->flags & BSF_SECTION_SYM) != 0
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|| (! S_IS_EXTERNAL (symp)
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|| (! (S_IS_EXTERNAL (symp) || S_IS_WEAK (symp))
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&& ! symbol_get_tc (symp)->output
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&& S_GET_STORAGE_CLASS (symp) != C_FILE)))
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*punt = 1;
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@ -292,6 +292,34 @@ reset_vars (char *op, ins *crx_ins)
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strcpy (ins_parse, op);
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}
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/* This macro decides whether a particular reloc is an entry in a
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switch table. It is used when relaxing, because the linker needs
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to know about all such entries so that it can adjust them if
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necessary. */
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#define SWITCH_TABLE(fix) \
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( (fix)->fx_addsy != NULL \
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&& (fix)->fx_subsy != NULL \
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&& S_GET_SEGMENT ((fix)->fx_addsy) == \
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S_GET_SEGMENT ((fix)->fx_subsy) \
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&& S_GET_SEGMENT (fix->fx_addsy) != undefined_section \
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&& ( (fix)->fx_r_type == BFD_RELOC_CRX_NUM8 \
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|| (fix)->fx_r_type == BFD_RELOC_CRX_NUM16 \
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|| (fix)->fx_r_type == BFD_RELOC_CRX_NUM32))
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/* See whether we need to force a relocation into the output file.
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This is used to force out switch and PC relative relocations when
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relaxing. */
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int
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crx_force_relocation (fixS *fix)
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{
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if (generic_force_reloc (fix) || SWITCH_TABLE (fix))
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return 1;
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return 0;
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}
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/* Generate a relocation entry for a fixup. */
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arelent *
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@ -306,15 +334,42 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS * fixP)
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reloc->addend = fixP->fx_offset;
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if (fixP->fx_subsy != NULL)
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/* We don't resolve difference expressions. */
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("can't resolve `%s' {%s section} - `%s' {%s section}"),
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fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : "0",
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segment_name (fixP->fx_addsy
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? S_GET_SEGMENT (fixP->fx_addsy)
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: absolute_section),
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S_GET_NAME (fixP->fx_subsy),
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segment_name (S_GET_SEGMENT (fixP->fx_addsy)));
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{
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if (SWITCH_TABLE (fixP))
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{
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/* Keep the current difference in the addend. */
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reloc->addend = (S_GET_VALUE (fixP->fx_addsy)
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- S_GET_VALUE (fixP->fx_subsy) + fixP->fx_offset);
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switch (fixP->fx_r_type)
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{
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case BFD_RELOC_CRX_NUM8:
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fixP->fx_r_type = BFD_RELOC_CRX_SWITCH8;
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break;
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case BFD_RELOC_CRX_NUM16:
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fixP->fx_r_type = BFD_RELOC_CRX_SWITCH16;
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break;
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case BFD_RELOC_CRX_NUM32:
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fixP->fx_r_type = BFD_RELOC_CRX_SWITCH32;
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break;
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default:
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abort ();
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break;
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}
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}
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else
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{
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/* We only resolve difference expressions in the same section. */
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("can't resolve `%s' {%s section} - `%s' {%s section}"),
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fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : "0",
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segment_name (fixP->fx_addsy
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? S_GET_SEGMENT (fixP->fx_addsy)
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: absolute_section),
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S_GET_NAME (fixP->fx_subsy),
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segment_name (S_GET_SEGMENT (fixP->fx_addsy)));
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}
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}
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assert ((int) fixP->fx_r_type > 0);
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reloc->howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
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@ -48,6 +48,10 @@ extern const struct relax_type md_relax_table[];
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linker relaxations easier. */
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#define tc_fix_adjustable(fixP) 0
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/* We need to force out some relocations when relaxing. */
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#define TC_FORCE_RELOCATION(FIXP) crx_force_relocation (FIXP)
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extern int crx_force_relocation (struct fix *);
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/* Fixup debug sections since we will never relax them. */
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#define TC_LINKRELAX_FIXUP(seg) (seg->flags & SEC_ALLOC)
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@ -58,8 +62,8 @@ extern const struct relax_type md_relax_table[];
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/* This is called by emit_expr when creating a reloc for a cons.
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We could use the definition there, except that we want to handle
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the CRX reloc type specially, rather than the BFD_RELOC type. */
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#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) \
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fix_new_exp (FRAG, OFF, (int)LEN, EXP, 0, \
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#define TC_CONS_FIX_NEW(FRAG, OFF, LEN, EXP) \
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fix_new_exp (FRAG, OFF, (int) LEN, EXP, 0, \
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LEN == 1 ? BFD_RELOC_CRX_NUM8 \
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: LEN == 2 ? BFD_RELOC_CRX_NUM16 \
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: LEN == 4 ? BFD_RELOC_CRX_NUM32 \
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@ -1918,9 +1918,8 @@ ppc_frob_file_before_adjust ()
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free (dotname);
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if (dotsym != NULL && (symbol_used_p (dotsym)
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|| symbol_used_in_reloc_p (dotsym)))
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{
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symbol_mark_used (symp);
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}
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symbol_mark_used (symp);
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}
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/* Don't emit .TOC. symbol. */
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@ -4843,7 +4842,7 @@ ppc_frob_symbol (sym)
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table. */
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if (! symbol_used_in_reloc_p (sym)
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&& ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
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|| (! S_IS_EXTERNAL (sym)
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|| (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
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&& ! symbol_get_tc (sym)->output
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&& S_GET_STORAGE_CLASS (sym) != C_FILE)))
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return 1;
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@ -4909,7 +4908,7 @@ ppc_frob_symbol (sym)
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}
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}
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if (! S_IS_EXTERNAL (sym)
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if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
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&& (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
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&& S_GET_STORAGE_CLASS (sym) != C_FILE
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&& S_GET_STORAGE_CLASS (sym) != C_FCN
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@ -1,3 +1,7 @@
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2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
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* gas/all/gas.exp (do_930509a): Disable test for crx.
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2004-07-22 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/x86-64-inval.l: Remove the leading `+'.
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@ -85,12 +85,13 @@ proc do_930509a {} {
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if !$x then { fail $testname }
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}
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# This test is meaningless for the PA; the difference of two symbols
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# This test is meaningless for the PA and CRX; the difference of two symbols
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# must not be resolved by the assembler.
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# C54x assembler (for compatibility) does not allow differences between
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# forward references
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# C30 counts a four byte offset as a difference of one.
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if { ![istarget hppa*-*-*] &&
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![istarget crx*-*-*] &&
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![istarget *c30*-*-*] &&
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![istarget *c4x*-*-*] &&
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![istarget *c54x*-*-*] } then {
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@ -1,3 +1,4 @@
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#NO_APP
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.macro M arg1
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.ascii "\arg1"
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.endm
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@ -1,3 +1,8 @@
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2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
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* crx.h: Add BFD_RELOC_CRX_SWITCH8, BFD_RELOC_CRX_SWITCH16,
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BFD_RELOC_CRX_SWITCH32.
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2004-07-06 Tomer Levi <Tomer.Levi@nsc.com>
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* common.h (EM_CRX): Define.
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@ -45,6 +45,9 @@ START_RELOC_NUMBERS(elf_crx_reloc_type)
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RELOC_NUMBER (R_CRX_NUM32, 15)
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RELOC_NUMBER (R_CRX_IMM16, 16)
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RELOC_NUMBER (R_CRX_IMM32, 17)
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RELOC_NUMBER (R_CRX_SWITCH8, 18)
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RELOC_NUMBER (R_CRX_SWITCH16, 19)
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RELOC_NUMBER (R_CRX_SWITCH32, 20)
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END_RELOC_NUMBERS(R_CRX_MAX)
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#endif /* _ELF_CRX_H */
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@ -1,3 +1,7 @@
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2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
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* crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
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2004-07-22 Nick Clifton <nickc@redhat.com>
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PR/280
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@ -357,7 +357,7 @@ const inst crx_instruction[] =
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/* opc12 r rbase ridx scl2 disps22 */ \
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{NAME, 3, 0x33C+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{rbase_ridx_scl2_dispu22,0}, {regr,16}}}
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|
||||
LD_REG_INST ("loadb", 0x0, 0x0, DISPUB4),
|
||||
LD_REG_INST ("loadb", 0x0, 0x0, DISPUB4),
|
||||
LD_REG_INST ("loadw", 0x1, 0x1, DISPUW4),
|
||||
LD_REG_INST ("loadd", 0x2, 0x2, DISPUD4),
|
||||
|
||||
@ -439,42 +439,44 @@ const inst crx_instruction[] =
|
||||
CSTBIT_INST ("cbitw", i4, 0x382, 0x10, 20, 0xBD),
|
||||
CSTBIT_INST ("cbitd", i5, 0x1C3, 0x8, 21, 0x7B),
|
||||
{"cbitd", 2, 0x300838, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
|
||||
{"cbitd", 2, 0x18047B, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
|
||||
{"cbitd", 2, 0x18047B, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
|
||||
|
||||
CSTBIT_INST ("sbitb", i3, 0x701, 0x20, 19, 0x1FD),
|
||||
CSTBIT_INST ("sbitw", i4, 0x383, 0x10, 20, 0xBE),
|
||||
CSTBIT_INST ("sbitd", i5, 0x1C4, 0x8, 21, 0x7C),
|
||||
{"sbitd", 2, 0x300839, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
|
||||
{"sbitd", 2, 0x18047C, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
|
||||
{"sbitd", 2, 0x18047C, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
|
||||
|
||||
CSTBIT_INST ("tbitb", i3, 0x702, 0x20, 19, 0x1FE),
|
||||
CSTBIT_INST ("tbitw", i4, 0x384, 0x10, 20, 0xBF),
|
||||
CSTBIT_INST ("tbitd", i5, 0x1C5, 0x8, 21, 0x7D),
|
||||
{"tbitd", 2, 0x30083A, 8, CSTBIT_INS, {{regr,4}, {regr,0}}},
|
||||
{"tbitd", 2, 0x18047D, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
|
||||
{"tbitd", 2, 0x18047D, 9, CSTBIT_INS, {{i5,4}, {regr,0}}},
|
||||
|
||||
/* Instructions including a register list (opcode is represented as a mask). */
|
||||
#define REGLIST_INST(NAME, OPC) \
|
||||
/* opc12 r mask16 */ \
|
||||
{NAME, 2, OPC, 20, REG_LIST, {{regr,16}, {i16,0}}}
|
||||
|
||||
REG1_INST ("getrfid", 0xFF9),
|
||||
REG1_INST ("setrfid", 0xFFA),
|
||||
REG1_INST ("getrfid", 0xFF9),
|
||||
REG1_INST ("setrfid", 0xFFA),
|
||||
|
||||
REGLIST_INST ("push", 0x346),
|
||||
REG1_INST ("push", 0xFFB),
|
||||
REGLIST_INST ("pushx", 0x347),
|
||||
|
||||
REGLIST_INST ("pop", 0x324),
|
||||
REG1_INST ("pop", 0xFFC),
|
||||
REGLIST_INST ("popx", 0x327),
|
||||
|
||||
REGLIST_INST ("popret", 0x326),
|
||||
REG1_INST ("popret", 0xFFD),
|
||||
|
||||
REGLIST_INST ("loadm", 0x324),
|
||||
REGLIST_INST ("loadm", 0x324),
|
||||
REGLIST_INST ("loadma", 0x325),
|
||||
REGLIST_INST ("popma", 0x325),
|
||||
REGLIST_INST ("popma", 0x325),
|
||||
|
||||
REGLIST_INST ("storm", 0x344),
|
||||
REGLIST_INST ("storm", 0x344),
|
||||
REGLIST_INST ("storma", 0x345),
|
||||
REGLIST_INST ("pushma", 0x345),
|
||||
|
||||
@ -560,7 +562,7 @@ const reg_entry crx_regtab[] =
|
||||
REG(ra, 0xe, CRX_R_REGTYPE),
|
||||
REG(sp, 0xf, CRX_R_REGTYPE),
|
||||
|
||||
/* Build a user register ur<N>. */
|
||||
/* Build a user register u<N>. */
|
||||
#define REG_U(N) REG(CONCAT2(u,N), 0x80 + N, CRX_U_REGTYPE)
|
||||
|
||||
REG_U(0), REG_U(1), REG_U(2), REG_U(3),
|
||||
@ -607,7 +609,7 @@ const reg_entry crx_copregtab[] =
|
||||
REG_C(8), REG_C(9), REG_C(10), REG_C(11),
|
||||
REG_C(12), REG_C(13), REG_C(14), REG_C(15),
|
||||
|
||||
/* Build a Coprocessor Special register c<N>. */
|
||||
/* Build a Coprocessor Special register cs<N>. */
|
||||
#define REG_CS(N) REG(CONCAT2(cs,N), N, CRX_CS_REGTYPE)
|
||||
|
||||
REG_CS(0), REG_CS(1), REG_CS(2), REG_CS(3),
|
||||
|
||||
Loading…
Reference in New Issue
Block a user