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[AArch64] Cleanup comments in instruction decoding functions

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gdb/ChangeLog:

	* aarch64-tdep.c (decode_cb): Move up comment describing the
	encoding.
	(decode_tb): Fix a typo in comment above the function.  Move up
	comment describing the encoding.
This commit is contained in:
Pierre Langlois 2015-09-11 17:00:55 +01:00
parent 4d50586db7
commit 669e74e829
2 changed files with 12 additions and 7 deletions
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7
gdb/ChangeLog
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@ -1,3 +1,10 @@
2015-09-11 Pierre Langlois <pierre.langlois@arm.com>
* aarch64-tdep.c (decode_cb): Move up comment describing the
encoding.
(decode_tb): Fix a typo in comment above the function. Move up
comment describing the encoding.
2015-09-11 Pierre Langlois <pierre.langlois@arm.com> 2015-09-11 Pierre Langlois <pierre.langlois@arm.com>
* aarch64-tdep.c (decode_bcond): Fix incorrect mask. * aarch64-tdep.c (decode_bcond): Fix incorrect mask.

12
gdb/aarch64-tdep.c
View File

@ -401,11 +401,10 @@ static int
decode_cb (CORE_ADDR addr, uint32_t insn, int *is64, int *is_cbnz, decode_cb (CORE_ADDR addr, uint32_t insn, int *is64, int *is_cbnz,
unsigned *rn, int32_t *offset) unsigned *rn, int32_t *offset)
{ {
if (decode_masked_match (insn, 0x7e000000, 0x34000000))
{
/* cbz T011 010o iiii iiii iiii iiii iiir rrrr */ /* cbz T011 010o iiii iiii iiii iiii iiir rrrr */
/* cbnz T011 010o iiii iiii iiii iiii iiir rrrr */ /* cbnz T011 010o iiii iiii iiii iiii iiir rrrr */
if (decode_masked_match (insn, 0x7e000000, 0x34000000))
{
*rn = (insn >> 0) & 0x1f; *rn = (insn >> 0) & 0x1f;
*is64 = (insn >> 31) & 0x1; *is64 = (insn >> 31) & 0x1;
*is_cbnz = (insn >> 24) & 0x1; *is_cbnz = (insn >> 24) & 0x1;
@ -628,7 +627,7 @@ decode_stur (CORE_ADDR addr, uint32_t insn, int *is64, unsigned *rt,
return 0; return 0;
} }
/* Decode an opcode if it represents a TB or TBNZ instruction. /* Decode an opcode if it represents a TBZ or TBNZ instruction.
ADDR specifies the address of the opcode. ADDR specifies the address of the opcode.
INSN specifies the opcode to test. INSN specifies the opcode to test.
@ -643,11 +642,10 @@ static int
decode_tb (CORE_ADDR addr, uint32_t insn, int *is_tbnz, unsigned *bit, decode_tb (CORE_ADDR addr, uint32_t insn, int *is_tbnz, unsigned *bit,
unsigned *rt, int32_t *imm) unsigned *rt, int32_t *imm)
{ {
if (decode_masked_match (insn, 0x7e000000, 0x36000000))
{
/* tbz b011 0110 bbbb biii iiii iiii iiir rrrr */ /* tbz b011 0110 bbbb biii iiii iiii iiir rrrr */
/* tbnz B011 0111 bbbb biii iiii iiii iiir rrrr */ /* tbnz B011 0111 bbbb biii iiii iiii iiir rrrr */
if (decode_masked_match (insn, 0x7e000000, 0x36000000))
{
*rt = (insn >> 0) & 0x1f; *rt = (insn >> 0) & 0x1f;
*is_tbnz = (insn >> 24) & 0x1; *is_tbnz = (insn >> 24) & 0x1;
*bit = ((insn >> (31 - 4)) & 0x20) | ((insn >> 19) & 0x1f); *bit = ((insn >> (31 - 4)) & 0x20) | ((insn >> 19) & 0x1f);