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Renamed v850eq -> v850ea
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87d36c311e
commit
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@ -103,7 +103,7 @@ case "${target}" in
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extra_subdirs="${extra_subdirs} igen"
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only_if_gcc=yes
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;;
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v850eq-*-*)
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v850ea-*-*)
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# The V850 simulator can only be compiled by gcc.
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sim_target=v850
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extra_subdirs="${extra_subdirs} igen"
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@ -29,10 +29,10 @@ else
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lose_these_too="${r5900_files} ${lose_these_too}"
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fi
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if ( echo $* | grep keep\-v850eq > /dev/null ) ; then
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keep_these_too="v850eq-elf ${keep_these_too}"
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if ( echo $* | grep keep\-v850e > /dev/null ) ; then
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keep_these_too="v850e-elf ${keep_these_too}"
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else
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lose_these_too="v850eq-elf ${lose_these_too}"
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lose_these_too="v850e-elf ${lose_these_too}"
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fi
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# All files listed between the "Things-to-keep:" line and the
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@ -8,9 +8,6 @@ Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
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Wed Dec 3 17:27:19 1997 Nick Clifton <nickc@cygnus.com>
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start-sanitize-v850e
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* v850.igen: Added missing sanitization markers.
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end-sanitize-v850e
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* v850.igen: Make break have a zero first field, since otherwise
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it clashes with the DIVH instruction.
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@ -97,20 +94,19 @@ Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h",
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"sld.w" insns to v850.igen. Fix tracing.
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start-sanitize-v850eq
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start-sanitize-v850e
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(OP_70): Ditto for "sld.hu".
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end-sanitize-v850eq
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end-sanitize-v850e
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* v850.igen: Clarify tracing of "sld.b", "sld.h" et.al.
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end-sanitize-v850eq
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* simops.c (condition_met): Make global.
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* sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD,
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TRACE_ST): Define.
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start-sanitize-v850eq
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start-sanitize-v850e
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(TRACE_LD_NAME): Define.
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end-sanitize-v850eq
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end-sanitize-v850e
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start-sanitize-v850e
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* simops.c: Move "cmov", "cmov imm" to v850.igen, fix.
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@ -222,7 +218,7 @@ Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
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Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
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start-sanitize-v850eq
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start-sanitize-v850e
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* simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US].
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* simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn",
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@ -235,8 +231,6 @@ start-sanitize-v850eq
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* interp.c (sim_create_inferior): For v850eq set US bit by
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default.
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end-sanitize-v850eq
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start-sanitize-v850e
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* interp.c (sim_open): Don't set arch, now set by
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sim_analyze_program.
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@ -253,25 +247,18 @@ Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* simops.c (OP_60): Move "jmp" code from here.
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* v850.igen (jmp): To here.
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start-sanitize-v850eq
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start-sanitize-v850e
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* simops.c (OP_60): Move "sld.bu" code from here.
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* v850.igen (sld.bu): To here.
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end-sanitize-v850eq
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Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
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start-sanitize-v850eq
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* v850.igen (prepare, ...): Add to v850eq architecture.
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end-sanitize-v850eq
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start-sanitize-v850e
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* interp.c (sim_open): Default to v850eq.
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end-sanitize-v850e
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start-sanitize-v850eq
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* interp.c (sim_open): Default to v850e.
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end-sanitize-v850eq
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end-sanitize-v850e
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* sim-main.h (signal.h): Include.
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* v850.igen (illegal): Report/halt illegal instructions.
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@ -538,26 +525,21 @@ Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com>
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* simops.c (unsigned divide instructions): S bit set if result has
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top bit set.
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start-sanitize-v850eq
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start-sanitize-v850e
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* simops.c (pushml, pushmh, popml, popmh): Lower numbered
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registers go to higher numbered address.
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end-sanitize-v850eq
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end-sanitize-v850e
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Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com>
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* simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct
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interpretation of SR bit in list18 structure.
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start-sanitize-v850eq
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(divn, divun): New functions to perform N step divide functions.
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end-sanitize-v850eq
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start-sanitize-v850eq
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Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com>
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* simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes
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with US bit set in the PSW.
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end-sanitize-v850eq
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end-sanitize-v850e
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Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com>
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@ -579,11 +561,8 @@ start-sanitize-v850e
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* simops.c: Add support for v850e instructions.
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end-sanitize-v850e
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start-sanitize-v850eq
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* simops.c: Add support for v850eq instructions.
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end-sanitize-v850eq
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end-sanitize-v850e
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Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
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