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* gas/arm/addthumb2err.s: New test file.

Browse Source 
* gas/arm/addthumb2err.d: Test control file.
	* gas/arm/addthumb2err.l: Expected error messages.

	* config/tc-arm.c (do_t_add_sub): Only allow LSL shifts of less
	than 4 in Thumb mode.
This commit is contained in:
Nick Clifton 2011-06-30 13:42:46 +00:00
parent 68246214df
commit 5f4cb1986d
6 changed files with 74 additions and 0 deletions
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2011-06-30 Paul Carroll <pcarroll@codesourcery.com>
* config/tc-arm.c (do_t_add_sub): Only allow LSL shifts of less
than 4 in Thumb mode.
2011-06-30 Nick Clifton <nickc@redhat.com>
PR gas/12848

7
gas/config/tc-arm.c
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@ -9474,6 +9474,9 @@ do_t_add_sub (void)
}
else
{
unsigned int value = inst.reloc.exp.X_add_number;
unsigned int shift = inst.operands[2].shift_kind;
Rn = inst.operands[2].reg;
/* See if we can do this with a 16-bit instruction. */
if (!inst.operands[2].shifted && inst.size_req != 4)
@ -9524,6 +9527,10 @@ do_t_add_sub (void)
inst.instruction = THUMB_OP32 (inst.instruction);
inst.instruction |= Rd << 8;
inst.instruction |= Rs << 16;
constraint (Rd == REG_SP && Rs == REG_SP && value > 3,
_("shift value over 3 not allowed in thumb mode"));
constraint (Rd == REG_SP && Rs == REG_SP && shift != SHIFT_LSL,
_("only LSL shift allowed in thumb mode"));
encode_thumb32_shifted_operand (2);
}
}

6
gas/testsuite/ChangeLog
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@ -1,3 +1,9 @@
2011-06-30 Paul Carroll <pcarroll@codesourcery.com>
* gas/arm/addthumb2err.s: New test file.
* gas/arm/addthumb2err.d: Test control file.
* gas/arm/addthumb2err.l: Expected error messages.
2011-06-30 Nick Clifton <nickc@redhat.com>
PR gas/12931

7
gas/testsuite/gas/arm/addthumb2err.d Normal file
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@ -0,0 +1,7 @@
#name: bad Thumb2 Add{S} and Sub{S} instructions
#as: -march=armv7-a
#error-output: addthumb2err.l
# Test some Thumb2 instructions:
.*: +file format .*arm.*

21
gas/testsuite/gas/arm/addthumb2err.l Normal file
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[^:]*: Assembler messages:
[^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL#4'
[^:]*:10: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,LSR#3'
[^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR#3'
[^:]*:12: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ROR#3'
[^:]*:13: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,RRX'
[^:]*:14: Error: shift value over 3 not allowed in thumb mode -- `adds sp,sp,r0,LSL#4'
[^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR#3'
[^:]*:16: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ASR#3'
[^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR#3'
[^:]*:18: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,RRX'
[^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL#4'
[^:]*:20: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,LSR#3'
[^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR#3'
[^:]*:22: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ROR#3'
[^:]*:23: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,RRX'
[^:]*:24: Error: shift value over 3 not allowed in thumb mode -- `subs sp,sp,r0,LSL#4'
[^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR#3'
[^:]*:26: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ASR#3'
[^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR#3'
[^:]*:28: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,RRX'

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gas/testsuite/gas/arm/addthumb2err.s Normal file
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@ -0,0 +1,28 @@
.syntax unified
.text
.align 2
.thumb
# Test of invalid operands for ADD{S} and SUB{S} instructions
# in Thumb2 mode. The instruction form being testing
# involves having the first 2 operands be SP.
add sp, sp, r0, LSL #4
add sp, sp, r0, LSR #3
add sp, sp, r0, ASR #3
add sp, sp, r0, ROR #3
add sp, sp, r0, RRX
adds sp, sp, r0, LSL #4
adds sp, sp, r0, LSR #3
adds sp, sp, r0, ASR #3
adds sp, sp, r0, ROR #3
adds sp, sp, r0, RRX
sub sp, sp, r0, LSL #4
sub sp, sp, r0, LSR #3
sub sp, sp, r0, ASR #3
sub sp, sp, r0, ROR #3
sub sp, sp, r0, RRX
subs sp, sp, r0, LSL #4
subs sp, sp, r0, LSR #3
subs sp, sp, r0, ASR #3
subs sp, sp, r0, ROR #3
subs sp, sp, r0, RRX