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Print correct register names for MIPS targets using n32/n64 ABIs.

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This commit is contained in:
Kevin Buettner 2003-03-19 06:21:14 +00:00
parent 2512814ebc
commit 5e2e9765a7
8 changed files with 75 additions and 55 deletions
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16
gdb/ChangeLog
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@ -1,3 +1,19 @@
2003-03-18 Kevin Buettner <kevinb@redhat.com>
* Makefile.in (mips-tdep.o): Add dependency on $(gdb_assert_h).
* mips-tdep.c (gdb_assert.h): Include.
(mips_generic_reg_names, mips_processor_reg_names): Make static.
(mips_register_name): Handle integer registers explicitly. Add
bounds checking.
(mips_r3041_reg_names, mips_r3051_reg_names, mips_r3081_reg_names)
(mips_lsi33k_reg_names): Don't list integer registers; they're
handled by mips_register_name() now.
* config/mips/tm-irix3.h (MIPS_REGISTER_NAMES): Likewise.
* config/mips/tm-irix6.h (MIPS_REGISTER_NAMES): Likewise.
* config/mips/tm-mips.h (MIPS_REGISTER_NAMES): Likewise.
* config/mips/tm-tx39.h (MIPS_REGISTER_NAMES): Likewise.
* config/mips/tm-tx39l.h (MIPS_REGISTER_NAMES): Likewise.
2003-03-18 Andrew Cagney <cagney@redhat.com>
* printcmd.c (print_scalar_formatted): Change VALADDR parameter to

9
gdb/Makefile.in
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@ -1929,10 +1929,11 @@ mips-linux-tdep.o: mips-linux-tdep.c $(defs_h) $(gdbcore_h) $(target_h) \
$(solib_svr4_h) $(osabi_h) $(gdb_string_h) $(mips_tdep_h) \
$(gdb_assert_h)
mips-nat.o: mips-nat.c $(defs_h) $(inferior_h) $(gdbcore_h) $(regcache_h)
mips-tdep.o: mips-tdep.c $(defs_h) $(gdb_string_h) $(frame_h) $(inferior_h) \
$(symtab_h) $(value_h) $(gdbcmd_h) $(language_h) $(gdbcore_h) \
$(symfile_h) $(objfiles_h) $(gdbtypes_h) $(target_h) $(arch_utils_h) \
$(regcache_h) $(osabi_h) $(mips_tdep_h) $(block_h) $(opcode_mips_h) \
mips-tdep.o: mips-tdep.c $(defs_h) $(gdb_string_h) $(gdb_assert_h) \
$(frame_h) $(inferior_h) $(symtab_h) $(value_h) $(gdbcmd_h) \
$(language_h) $(gdbcore_h) $(symfile_h) $(objfiles_h) \
$(gdbtypes_h) $(target_h) $(arch_utils_h) $(regcache_h) \
$(osabi_h) $(mips_tdep_h) $(block_h) $(opcode_mips_h) \
$(elf_mips_h) $(elf_bfd_h) $(symcat_h)
mipsm3-nat.o: mipsm3-nat.c $(defs_h) $(inferior_h) $(regcache_h)
mipsnbsd-nat.o: mipsnbsd-nat.c $(defs_h) $(inferior_h) $(regcache_h) \

10
gdb/config/mips/tm-irix3.h
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@ -33,15 +33,11 @@
#undef FCRCS_REGNUM
#undef FCRIR_REGNUM
/* Initializer for an array of names of registers.
There should be NUM_REGS strings in this initializer. */
/* Initializer for an array of names for registers 32 and above.
There should be NUM_REGS-32 strings in this initializer. */
#define MIPS_REGISTER_NAMES \
{ "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
"t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra", \
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
{ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\

10
gdb/config/mips/tm-irix6.h
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@ -34,15 +34,11 @@
#undef FCRCS_REGNUM
#undef FCRIR_REGNUM
/* Initializer for an array of names of registers.
There should be NUM_REGS strings in this initializer. */
/* Initializer for an array of names for registers 32 and above.
There should be NUM_REGS-32 strings in this initializer. */
#define MIPS_REGISTER_NAMES \
{ "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
"a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3", \
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
{ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\

10
gdb/config/mips/tm-mips.h
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@ -59,16 +59,12 @@ extern int mips_step_skips_delay (CORE_ADDR);
#define MIPS_REGSIZE 4
#endif
/* Initializer for an array of names of registers.
There should be NUM_REGS strings in this initializer. */
/* Initializer for an array of names for registers 32 and above.
There should be NUM_REGS-32 strings in this initializer. */
#ifndef MIPS_REGISTER_NAMES
#define MIPS_REGISTER_NAMES \
{ "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
"sr", "lo", "hi", "bad", "cause","pc", \
{ "sr", "lo", "hi", "bad", "cause","pc", \
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\

6
gdb/config/mips/tm-tx39.h
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@ -21,11 +21,7 @@
#undef MIPS_REGISTER_NAMES
#define MIPS_REGISTER_NAMES \
{ "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
"sr", "lo", "hi", "bad", "cause","pc", \
{ "sr", "lo", "hi", "bad", "cause","pc", \
"", "", "", "", "", "", "", "", \
"", "", "", "", "", "", "", "", \
"", "", "", "", "", "", "", "", \

6
gdb/config/mips/tm-tx39l.h
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@ -21,11 +21,7 @@
#undef MIPS_REGISTER_NAMES
#define MIPS_REGISTER_NAMES \
{ "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
"sr", "lo", "hi", "bad", "cause","pc", \
{ "sr", "lo", "hi", "bad", "cause","pc", \
"", "", "", "", "", "", "", "", \
"", "", "", "", "", "", "", "", \
"", "", "", "", "", "", "", "", \

63
gdb/mips-tdep.c
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@ -25,6 +25,7 @@
#include "defs.h"
#include "gdb_string.h"
#include "gdb_assert.h"
#include "frame.h"
#include "inferior.h"
#include "symtab.h"
@ -361,23 +362,57 @@ static struct cmd_list_element *showmipscmdlist = NULL;
/* A set of original names, to be used when restoring back to generic
registers from a specific set. */
static char *mips_generic_reg_names[] = MIPS_REGISTER_NAMES;
char *mips_generic_reg_names[] = MIPS_REGISTER_NAMES;
char **mips_processor_reg_names = mips_generic_reg_names;
/* Integer registers 0 thru 31 are handled explicitly by
mips_register_name(). Processor specific registers 32 and above
are listed in the sets of register names assigned to
mips_processor_reg_names. */
static char **mips_processor_reg_names = mips_generic_reg_names;
/* Return the name of the register corresponding to REGNO. */
static const char *
mips_register_name (int i)
mips_register_name (int regno)
{
return mips_processor_reg_names[i];
/* GPR names for all ABIs other than n32/n64. */
static char *mips_gpr_names[] = {
"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
};
/* GPR names for n32 and n64 ABIs. */
static char *mips_n32_n64_gpr_names[] = {
"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
"a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3",
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra"
};
enum mips_abi abi = mips_abi (current_gdbarch);
/* The MIPS integer registers are always mapped from 0 to 31. The
names of the registers (which reflects the conventions regarding
register use) vary depending on the ABI. */
if (0 <= regno && regno < 32)
{
if (abi == MIPS_ABI_N32 || abi == MIPS_ABI_N64)
return mips_n32_n64_gpr_names[regno];
else
return mips_gpr_names[regno];
}
else if (32 <= regno && regno <= NUM_REGS)
return mips_processor_reg_names[regno - 32];
else
internal_error (__FILE__, __LINE__,
"mips_register_name: bad register number %d", regno);
}
/* *INDENT-OFF* */
/* Names of IDT R3041 registers. */
char *mips_r3041_reg_names[] = {
"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
"sr", "lo", "hi", "bad", "cause","pc",
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
@ -391,10 +426,6 @@ char *mips_r3041_reg_names[] = {
/* Names of IDT R3051 registers. */
char *mips_r3051_reg_names[] = {
"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
"sr", "lo", "hi", "bad", "cause","pc",
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
@ -408,10 +439,6 @@ char *mips_r3051_reg_names[] = {
/* Names of IDT R3081 registers. */
char *mips_r3081_reg_names[] = {
"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
"sr", "lo", "hi", "bad", "cause","pc",
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
@ -425,10 +452,6 @@ char *mips_r3081_reg_names[] = {
/* Names of LSI 33k registers. */
char *mips_lsi33k_reg_names[] = {
"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
"epc", "hi", "lo", "sr", "cause","badvaddr",
"dcic", "bpc", "bda", "", "", "", "", "",
"", "", "", "", "", "", "", "",