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2001-03-05 Dave Brolley <brolley

Browse Source 
arch.c: Regenerate.
        arch.h: Regenerate.
        cpu.c: Regenerate.
        cpu.h: Regenerate.
        cpuall.h: Regenerate.
        cpux.c: Regenerate.
        cpux.h: Regenerate.
        decode.c: Regenerate.
        decode.h: Regenerate.
        decodex.c: Regenerate.
        decodex.h: Regenerate.
        model.c: Regenerate.
        modelx.c: Regenerate.
        sem-switch.c: Regenerate.
        sem.c: Regenerate.
        semx-switch.c: Regenerate.
This commit is contained in:
Dave Brolley 2001-03-05 16:05:38 +00:00
parent 2edda1bf34
commit 55552082e8
17 changed files with 413 additions and 635 deletions
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19
sim/m32r/ChangeLog
View File

@ -1,3 +1,22 @@
2001-03-05 Dave Brolley <brolley@redhat.com>
arch.c: Regenerate.
arch.h: Regenerate.
cpu.c: Regenerate.
cpu.h: Regenerate.
cpuall.h: Regenerate.
cpux.c: Regenerate.
cpux.h: Regenerate.
decode.c: Regenerate.
decode.h: Regenerate.
decodex.c: Regenerate.
decodex.h: Regenerate.
model.c: Regenerate.
modelx.c: Regenerate.
sem-switch.c: Regenerate.
sem.c: Regenerate.
semx-switch.c: Regenerate.
2001-01-12 Frank Ch. Eigler <fche@redhat.com>
* configure: Regenerated with sim_scache fix.

2
sim/m32r/arch.c
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

2
sim/m32r/arch.h
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

2
sim/m32r/cpu.c
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

2
sim/m32r/cpu.h
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

2
sim/m32r/cpuall.h
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

2
sim/m32r/cpux.c
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

2
sim/m32r/cpux.h
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

151
sim/m32r/decode.c
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.
@ -224,60 +224,15 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
switch (val)
{
case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv;
case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx;
case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add;
case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv;
case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp;
case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp;
case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv;
case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx;
case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add;
case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv;
case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add;
case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add;
case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add;
case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add;
case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add;
case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add;
case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add;
case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv;
case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc;
case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc;
case 28 :
case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv; case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx; case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add; case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv; case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp; case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp; case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv; case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx; case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add; case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv; case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add; case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add; case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add; case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add; case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add; case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add; case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add; case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv; case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc; case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc; case 28 :
{
unsigned int val = (((insn >> 8) & (15 << 0)));
unsigned int val = (((insn >> 8) & (1 << 0)));
switch (val)
{
case 14 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl;
case 15 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp;
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl; case 1 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte;
case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap;
case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb;
case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth;
case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st;
case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock;
case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus;
case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus;
case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ld;
case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ld;
case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ld;
case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ld;
case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld;
case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock;
case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus;
case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi;
case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi;
case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi;
case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi;
case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi;
case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi;
case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi;
case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi;
case 64 : /* fall through */
case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte; case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap; case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb; case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth; case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st; case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock; case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus; case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus; case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ld; case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ld; case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ld; case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ld; case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld; case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock; case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus; case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi; case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi; case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi; case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi; case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi; case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi; case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi; case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi; case 64 : /* fall through */
case 65 : /* fall through */
case 66 : /* fall through */
case 67 : /* fall through */
@ -292,34 +247,23 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
case 76 : /* fall through */
case 77 : /* fall through */
case 78 : /* fall through */
case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi;
case 80 : /* fall through */
case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli;
case 82 : /* fall through */
case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli;
case 84 : /* fall through */
case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli;
case 87 :
case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi; case 80 : /* fall through */
case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli; case 82 : /* fall through */
case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli; case 84 : /* fall through */
case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli; case 87 :
{
unsigned int val = (((insn >> 0) & (15 << 0)));
unsigned int val = (((insn >> 0) & (1 << 0)));
switch (val)
{
case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi;
case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi;
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi; case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac;
case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac;
case 95 :
case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac; case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac; case 95 :
{
unsigned int val = (((insn >> 0) & (15 << 0)));
unsigned int val = (((insn >> 0) & (3 << 0)));
switch (val)
{
case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi;
case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi;
case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi;
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi; case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi; case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 96 : /* fall through */
@ -337,18 +281,12 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
case 108 : /* fall through */
case 109 : /* fall through */
case 110 : /* fall through */
case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8;
case 112 :
case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8; case 112 :
{
unsigned int val = (((insn >> 8) & (15 << 0)));
switch (val)
{
case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop;
case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8;
case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8;
case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8;
case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8;
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop; case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 113 : /* fall through */
@ -367,49 +305,13 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
case 126 : /* fall through */
case 127 :
{
unsigned int val = (((insn >> 8) & (15 << 0)));
unsigned int val = (((insn >> 8) & (3 << 0)));
switch (val)
{
case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8;
case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8;
case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8;
case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8;
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; case 1 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; case 2 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; case 3 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi;
case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi;
case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3;
case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3;
case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3;
case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3;
case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3;
case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div;
case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div;
case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div;
case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div;
case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3;
case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3;
case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3;
case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16;
case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d;
case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d;
case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d;
case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ld_d;
case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ld_d;
case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ld_d;
case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ld_d;
case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d;
case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq;
case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq;
case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz;
case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz;
case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz;
case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz;
case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz;
case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz;
case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth;
case 224 : /* fall through */
case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi; case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi; case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3; case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3; case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3; case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3; case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3; case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div; case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div; case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div; case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div; case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3; case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3; case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3; case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16; case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d; case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d; case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d; case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ld_d; case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ld_d; case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ld_d; case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ld_d; case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d; case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq; case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq; case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz; case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz; case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz; case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz; case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz; case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz; case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth; case 224 : /* fall through */
case 225 : /* fall through */
case 226 : /* fall through */
case 227 : /* fall through */
@ -424,8 +326,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
case 236 : /* fall through */
case 237 : /* fall through */
case 238 : /* fall through */
case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24;
case 240 : /* fall through */
case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24; case 240 : /* fall through */
case 241 : /* fall through */
case 242 : /* fall through */
case 243 : /* fall through */
@ -442,14 +343,10 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
case 254 : /* fall through */
case 255 :
{
unsigned int val = (((insn >> 8) & (15 << 0)));
unsigned int val = (((insn >> 8) & (3 << 0)));
switch (val)
{
case 12 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24;
case 13 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24;
case 14 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24;
case 15 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24;
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24; case 1 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24; case 2 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24; case 3 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
@ -462,7 +359,6 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_empty:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_empty.f
@ -1475,7 +1371,6 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_nop:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_empty.f
@ -1489,7 +1384,6 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_rac:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_empty.f
@ -1503,7 +1397,6 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_rte:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_empty.f

2
sim/m32r/decode.h
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

222
sim/m32r/decodex.c
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.
@ -258,81 +258,31 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
switch (val)
{
case 0 : itype = M32RXF_INSN_SUBV; goto extract_sfmt_addv;
case 1 : itype = M32RXF_INSN_SUBX; goto extract_sfmt_addx;
case 2 : itype = M32RXF_INSN_SUB; goto extract_sfmt_add;
case 3 : itype = M32RXF_INSN_NEG; goto extract_sfmt_mv;
case 4 : itype = M32RXF_INSN_CMP; goto extract_sfmt_cmp;
case 5 : itype = M32RXF_INSN_CMPU; goto extract_sfmt_cmp;
case 6 : itype = M32RXF_INSN_CMPEQ; goto extract_sfmt_cmp;
case 7 :
case 0 : itype = M32RXF_INSN_SUBV; goto extract_sfmt_addv; case 1 : itype = M32RXF_INSN_SUBX; goto extract_sfmt_addx; case 2 : itype = M32RXF_INSN_SUB; goto extract_sfmt_add; case 3 : itype = M32RXF_INSN_NEG; goto extract_sfmt_mv; case 4 : itype = M32RXF_INSN_CMP; goto extract_sfmt_cmp; case 5 : itype = M32RXF_INSN_CMPU; goto extract_sfmt_cmp; case 6 : itype = M32RXF_INSN_CMPEQ; goto extract_sfmt_cmp; case 7 :
{
unsigned int val = (((insn >> 8) & (15 << 0)));
unsigned int val = (((insn >> 8) & (3 << 0)));
switch (val)
{
case 0 : itype = M32RXF_INSN_CMPZ; goto extract_sfmt_cmpz;
case 3 : itype = M32RXF_INSN_PCMPBZ; goto extract_sfmt_cmpz;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RXF_INSN_CMPZ; goto extract_sfmt_cmpz; case 3 : itype = M32RXF_INSN_PCMPBZ; goto extract_sfmt_cmpz; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 8 : itype = M32RXF_INSN_ADDV; goto extract_sfmt_addv;
case 9 : itype = M32RXF_INSN_ADDX; goto extract_sfmt_addx;
case 10 : itype = M32RXF_INSN_ADD; goto extract_sfmt_add;
case 11 : itype = M32RXF_INSN_NOT; goto extract_sfmt_mv;
case 12 : itype = M32RXF_INSN_AND; goto extract_sfmt_add;
case 13 : itype = M32RXF_INSN_XOR; goto extract_sfmt_add;
case 14 : itype = M32RXF_INSN_OR; goto extract_sfmt_add;
case 16 : itype = M32RXF_INSN_SRL; goto extract_sfmt_add;
case 18 : itype = M32RXF_INSN_SRA; goto extract_sfmt_add;
case 20 : itype = M32RXF_INSN_SLL; goto extract_sfmt_add;
case 22 : itype = M32RXF_INSN_MUL; goto extract_sfmt_add;
case 24 : itype = M32RXF_INSN_MV; goto extract_sfmt_mv;
case 25 : itype = M32RXF_INSN_MVFC; goto extract_sfmt_mvfc;
case 26 : itype = M32RXF_INSN_MVTC; goto extract_sfmt_mvtc;
case 28 :
case 8 : itype = M32RXF_INSN_ADDV; goto extract_sfmt_addv; case 9 : itype = M32RXF_INSN_ADDX; goto extract_sfmt_addx; case 10 : itype = M32RXF_INSN_ADD; goto extract_sfmt_add; case 11 : itype = M32RXF_INSN_NOT; goto extract_sfmt_mv; case 12 : itype = M32RXF_INSN_AND; goto extract_sfmt_add; case 13 : itype = M32RXF_INSN_XOR; goto extract_sfmt_add; case 14 : itype = M32RXF_INSN_OR; goto extract_sfmt_add; case 16 : itype = M32RXF_INSN_SRL; goto extract_sfmt_add; case 18 : itype = M32RXF_INSN_SRA; goto extract_sfmt_add; case 20 : itype = M32RXF_INSN_SLL; goto extract_sfmt_add; case 22 : itype = M32RXF_INSN_MUL; goto extract_sfmt_add; case 24 : itype = M32RXF_INSN_MV; goto extract_sfmt_mv; case 25 : itype = M32RXF_INSN_MVFC; goto extract_sfmt_mvfc; case 26 : itype = M32RXF_INSN_MVTC; goto extract_sfmt_mvtc; case 28 :
{
unsigned int val = (((insn >> 8) & (15 << 0)));
unsigned int val = (((insn >> 8) & (3 << 0)));
switch (val)
{
case 12 : itype = M32RXF_INSN_JC; goto extract_sfmt_jc;
case 13 : itype = M32RXF_INSN_JNC; goto extract_sfmt_jc;
case 14 : itype = M32RXF_INSN_JL; goto extract_sfmt_jl;
case 15 : itype = M32RXF_INSN_JMP; goto extract_sfmt_jmp;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RXF_INSN_JC; goto extract_sfmt_jc; case 1 : itype = M32RXF_INSN_JNC; goto extract_sfmt_jc; case 2 : itype = M32RXF_INSN_JL; goto extract_sfmt_jl; case 3 : itype = M32RXF_INSN_JMP; goto extract_sfmt_jmp; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 29 : itype = M32RXF_INSN_RTE; goto extract_sfmt_rte;
case 31 : itype = M32RXF_INSN_TRAP; goto extract_sfmt_trap;
case 32 : itype = M32RXF_INSN_STB; goto extract_sfmt_stb;
case 34 : itype = M32RXF_INSN_STH; goto extract_sfmt_sth;
case 36 : itype = M32RXF_INSN_ST; goto extract_sfmt_st;
case 37 : itype = M32RXF_INSN_UNLOCK; goto extract_sfmt_unlock;
case 38 : itype = M32RXF_INSN_ST_PLUS; goto extract_sfmt_st_plus;
case 39 : itype = M32RXF_INSN_ST_MINUS; goto extract_sfmt_st_plus;
case 40 : itype = M32RXF_INSN_LDB; goto extract_sfmt_ld;
case 41 : itype = M32RXF_INSN_LDUB; goto extract_sfmt_ld;
case 42 : itype = M32RXF_INSN_LDH; goto extract_sfmt_ld;
case 43 : itype = M32RXF_INSN_LDUH; goto extract_sfmt_ld;
case 44 : itype = M32RXF_INSN_LD; goto extract_sfmt_ld;
case 45 : itype = M32RXF_INSN_LOCK; goto extract_sfmt_lock;
case 46 : itype = M32RXF_INSN_LD_PLUS; goto extract_sfmt_ld_plus;
case 48 : /* fall through */
case 56 : itype = M32RXF_INSN_MULHI_A; goto extract_sfmt_mulhi_a;
case 49 : /* fall through */
case 57 : itype = M32RXF_INSN_MULLO_A; goto extract_sfmt_mulhi_a;
case 50 : /* fall through */
case 58 : itype = M32RXF_INSN_MULWHI_A; goto extract_sfmt_mulhi_a;
case 51 : /* fall through */
case 59 : itype = M32RXF_INSN_MULWLO_A; goto extract_sfmt_mulhi_a;
case 52 : /* fall through */
case 60 : itype = M32RXF_INSN_MACHI_A; goto extract_sfmt_machi_a;
case 53 : /* fall through */
case 61 : itype = M32RXF_INSN_MACLO_A; goto extract_sfmt_machi_a;
case 54 : /* fall through */
case 62 : itype = M32RXF_INSN_MACWHI_A; goto extract_sfmt_machi_a;
case 55 : /* fall through */
case 63 : itype = M32RXF_INSN_MACWLO_A; goto extract_sfmt_machi_a;
case 64 : /* fall through */
case 29 : itype = M32RXF_INSN_RTE; goto extract_sfmt_rte; case 31 : itype = M32RXF_INSN_TRAP; goto extract_sfmt_trap; case 32 : itype = M32RXF_INSN_STB; goto extract_sfmt_stb; case 34 : itype = M32RXF_INSN_STH; goto extract_sfmt_sth; case 36 : itype = M32RXF_INSN_ST; goto extract_sfmt_st; case 37 : itype = M32RXF_INSN_UNLOCK; goto extract_sfmt_unlock; case 38 : itype = M32RXF_INSN_ST_PLUS; goto extract_sfmt_st_plus; case 39 : itype = M32RXF_INSN_ST_MINUS; goto extract_sfmt_st_plus; case 40 : itype = M32RXF_INSN_LDB; goto extract_sfmt_ld; case 41 : itype = M32RXF_INSN_LDUB; goto extract_sfmt_ld; case 42 : itype = M32RXF_INSN_LDH; goto extract_sfmt_ld; case 43 : itype = M32RXF_INSN_LDUH; goto extract_sfmt_ld; case 44 : itype = M32RXF_INSN_LD; goto extract_sfmt_ld; case 45 : itype = M32RXF_INSN_LOCK; goto extract_sfmt_lock; case 46 : itype = M32RXF_INSN_LD_PLUS; goto extract_sfmt_ld_plus; case 48 : /* fall through */
case 56 : itype = M32RXF_INSN_MULHI_A; goto extract_sfmt_mulhi_a; case 49 : /* fall through */
case 57 : itype = M32RXF_INSN_MULLO_A; goto extract_sfmt_mulhi_a; case 50 : /* fall through */
case 58 : itype = M32RXF_INSN_MULWHI_A; goto extract_sfmt_mulhi_a; case 51 : /* fall through */
case 59 : itype = M32RXF_INSN_MULWLO_A; goto extract_sfmt_mulhi_a; case 52 : /* fall through */
case 60 : itype = M32RXF_INSN_MACHI_A; goto extract_sfmt_machi_a; case 53 : /* fall through */
case 61 : itype = M32RXF_INSN_MACLO_A; goto extract_sfmt_machi_a; case 54 : /* fall through */
case 62 : itype = M32RXF_INSN_MACWHI_A; goto extract_sfmt_machi_a; case 55 : /* fall through */
case 63 : itype = M32RXF_INSN_MACWLO_A; goto extract_sfmt_machi_a; case 64 : /* fall through */
case 65 : /* fall through */
case 66 : /* fall through */
case 67 : /* fall through */
@ -347,39 +297,23 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
case 76 : /* fall through */
case 77 : /* fall through */
case 78 : /* fall through */
case 79 : itype = M32RXF_INSN_ADDI; goto extract_sfmt_addi;
case 80 : /* fall through */
case 81 : itype = M32RXF_INSN_SRLI; goto extract_sfmt_slli;
case 82 : /* fall through */
case 83 : itype = M32RXF_INSN_SRAI; goto extract_sfmt_slli;
case 84 : /* fall through */
case 85 : itype = M32RXF_INSN_SLLI; goto extract_sfmt_slli;
case 87 :
case 79 : itype = M32RXF_INSN_ADDI; goto extract_sfmt_addi; case 80 : /* fall through */
case 81 : itype = M32RXF_INSN_SRLI; goto extract_sfmt_slli; case 82 : /* fall through */
case 83 : itype = M32RXF_INSN_SRAI; goto extract_sfmt_slli; case 84 : /* fall through */
case 85 : itype = M32RXF_INSN_SLLI; goto extract_sfmt_slli; case 87 :
{
unsigned int val = (((insn >> 0) & (3 << 0)));
unsigned int val = (((insn >> 0) & (1 << 0)));
switch (val)
{
case 0 : itype = M32RXF_INSN_MVTACHI_A; goto extract_sfmt_mvtachi_a;
case 1 : itype = M32RXF_INSN_MVTACLO_A; goto extract_sfmt_mvtachi_a;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RXF_INSN_MVTACHI_A; goto extract_sfmt_mvtachi_a; case 1 : itype = M32RXF_INSN_MVTACLO_A; goto extract_sfmt_mvtachi_a; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 88 : itype = M32RXF_INSN_RACH_DSI; goto extract_sfmt_rac_dsi;
case 89 : itype = M32RXF_INSN_RAC_DSI; goto extract_sfmt_rac_dsi;
case 90 : itype = M32RXF_INSN_MULWU1; goto extract_sfmt_mulwu1;
case 91 : itype = M32RXF_INSN_MACWU1; goto extract_sfmt_macwu1;
case 92 : itype = M32RXF_INSN_MACLH1; goto extract_sfmt_macwu1;
case 93 : itype = M32RXF_INSN_MSBLO; goto extract_sfmt_msblo;
case 94 : itype = M32RXF_INSN_SADD; goto extract_sfmt_sadd;
case 95 :
case 88 : itype = M32RXF_INSN_RACH_DSI; goto extract_sfmt_rac_dsi; case 89 : itype = M32RXF_INSN_RAC_DSI; goto extract_sfmt_rac_dsi; case 90 : itype = M32RXF_INSN_MULWU1; goto extract_sfmt_mulwu1; case 91 : itype = M32RXF_INSN_MACWU1; goto extract_sfmt_macwu1; case 92 : itype = M32RXF_INSN_MACLH1; goto extract_sfmt_macwu1; case 93 : itype = M32RXF_INSN_MSBLO; goto extract_sfmt_msblo; case 94 : itype = M32RXF_INSN_SADD; goto extract_sfmt_sadd; case 95 :
{
unsigned int val = (((insn >> 0) & (3 << 0)));
switch (val)
{
case 0 : itype = M32RXF_INSN_MVFACHI_A; goto extract_sfmt_mvfachi_a;
case 1 : itype = M32RXF_INSN_MVFACLO_A; goto extract_sfmt_mvfachi_a;
case 2 : itype = M32RXF_INSN_MVFACMI_A; goto extract_sfmt_mvfachi_a;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RXF_INSN_MVFACHI_A; goto extract_sfmt_mvfachi_a; case 1 : itype = M32RXF_INSN_MVFACLO_A; goto extract_sfmt_mvfachi_a; case 2 : itype = M32RXF_INSN_MVFACMI_A; goto extract_sfmt_mvfachi_a; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 96 : /* fall through */
@ -397,22 +331,12 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
case 108 : /* fall through */
case 109 : /* fall through */
case 110 : /* fall through */
case 111 : itype = M32RXF_INSN_LDI8; goto extract_sfmt_ldi8;
case 112 :
case 111 : itype = M32RXF_INSN_LDI8; goto extract_sfmt_ldi8; case 112 :
{
unsigned int val = (((insn >> 8) & (15 << 0)));
switch (val)
{
case 0 : itype = M32RXF_INSN_NOP; goto extract_sfmt_nop;
case 4 : itype = M32RXF_INSN_SC; goto extract_sfmt_sc;
case 5 : itype = M32RXF_INSN_SNC; goto extract_sfmt_sc;
case 8 : itype = M32RXF_INSN_BCL8; goto extract_sfmt_bcl8;
case 9 : itype = M32RXF_INSN_BNCL8; goto extract_sfmt_bcl8;
case 12 : itype = M32RXF_INSN_BC8; goto extract_sfmt_bc8;
case 13 : itype = M32RXF_INSN_BNC8; goto extract_sfmt_bc8;
case 14 : itype = M32RXF_INSN_BL8; goto extract_sfmt_bl8;
case 15 : itype = M32RXF_INSN_BRA8; goto extract_sfmt_bra8;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RXF_INSN_NOP; goto extract_sfmt_nop; case 4 : itype = M32RXF_INSN_SC; goto extract_sfmt_sc; case 5 : itype = M32RXF_INSN_SNC; goto extract_sfmt_sc; case 8 : itype = M32RXF_INSN_BCL8; goto extract_sfmt_bcl8; case 9 : itype = M32RXF_INSN_BNCL8; goto extract_sfmt_bcl8; case 12 : itype = M32RXF_INSN_BC8; goto extract_sfmt_bc8; case 13 : itype = M32RXF_INSN_BNC8; goto extract_sfmt_bc8; case 14 : itype = M32RXF_INSN_BL8; goto extract_sfmt_bl8; case 15 : itype = M32RXF_INSN_BRA8; goto extract_sfmt_bra8; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 113 : /* fall through */
@ -431,87 +355,29 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
case 126 : /* fall through */
case 127 :
{
unsigned int val = (((insn >> 8) & (15 << 0)));
unsigned int val = (((insn >> 8) & (7 << 0)));
switch (val)
{
case 8 : itype = M32RXF_INSN_BCL8; goto extract_sfmt_bcl8;
case 9 : itype = M32RXF_INSN_BNCL8; goto extract_sfmt_bcl8;
case 12 : itype = M32RXF_INSN_BC8; goto extract_sfmt_bc8;
case 13 : itype = M32RXF_INSN_BNC8; goto extract_sfmt_bc8;
case 14 : itype = M32RXF_INSN_BL8; goto extract_sfmt_bl8;
case 15 : itype = M32RXF_INSN_BRA8; goto extract_sfmt_bra8;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RXF_INSN_BCL8; goto extract_sfmt_bcl8; case 1 : itype = M32RXF_INSN_BNCL8; goto extract_sfmt_bcl8; case 4 : itype = M32RXF_INSN_BC8; goto extract_sfmt_bc8; case 5 : itype = M32RXF_INSN_BNC8; goto extract_sfmt_bc8; case 6 : itype = M32RXF_INSN_BL8; goto extract_sfmt_bl8; case 7 : itype = M32RXF_INSN_BRA8; goto extract_sfmt_bra8; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 132 : itype = M32RXF_INSN_CMPI; goto extract_sfmt_cmpi;
case 133 : itype = M32RXF_INSN_CMPUI; goto extract_sfmt_cmpi;
case 134 :
case 132 : itype = M32RXF_INSN_CMPI; goto extract_sfmt_cmpi; case 133 : itype = M32RXF_INSN_CMPUI; goto extract_sfmt_cmpi; case 134 :
{
unsigned int val = (((insn >> -6) & (63 << 0)));
unsigned int val = (((insn >> -8) & (3 << 0)));
switch (val)
{
case 0 :
{
unsigned int val = (((insn >> -12) & (63 << 0)));
switch (val)
{
case 0 : itype = M32RXF_INSN_SAT; goto extract_sfmt_sat;
case 32 : itype = M32RXF_INSN_SATH; goto extract_sfmt_satb;
case 48 : itype = M32RXF_INSN_SATB; goto extract_sfmt_satb;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RXF_INSN_SAT; goto extract_sfmt_sat; case 2 : itype = M32RXF_INSN_SATH; goto extract_sfmt_satb; case 3 : itype = M32RXF_INSN_SATB; goto extract_sfmt_satb; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 136 : itype = M32RXF_INSN_ADDV3; goto extract_sfmt_addv3;
case 138 : itype = M32RXF_INSN_ADD3; goto extract_sfmt_add3;
case 140 : itype = M32RXF_INSN_AND3; goto extract_sfmt_and3;
case 141 : itype = M32RXF_INSN_XOR3; goto extract_sfmt_and3;
case 142 : itype = M32RXF_INSN_OR3; goto extract_sfmt_or3;
case 144 :
case 136 : itype = M32RXF_INSN_ADDV3; goto extract_sfmt_addv3; case 138 : itype = M32RXF_INSN_ADD3; goto extract_sfmt_add3; case 140 : itype = M32RXF_INSN_AND3; goto extract_sfmt_and3; case 141 : itype = M32RXF_INSN_XOR3; goto extract_sfmt_and3; case 142 : itype = M32RXF_INSN_OR3; goto extract_sfmt_or3; case 144 :
{
unsigned int val = (((insn >> -6) & (63 << 0)));
unsigned int val = (((insn >> -12) & (1 << 0)));
switch (val)
{
case 0 :
{
unsigned int val = (((insn >> -12) & (63 << 0)));
switch (val)
{
case 0 : itype = M32RXF_INSN_DIV; goto extract_sfmt_div;
case 1 : itype = M32RXF_INSN_DIVH; goto extract_sfmt_div;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RXF_INSN_DIV; goto extract_sfmt_div; case 1 : itype = M32RXF_INSN_DIVH; goto extract_sfmt_div; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
case 145 : itype = M32RXF_INSN_DIVU; goto extract_sfmt_div;
case 146 : itype = M32RXF_INSN_REM; goto extract_sfmt_div;
case 147 : itype = M32RXF_INSN_REMU; goto extract_sfmt_div;
case 152 : itype = M32RXF_INSN_SRL3; goto extract_sfmt_sll3;
case 154 : itype = M32RXF_INSN_SRA3; goto extract_sfmt_sll3;
case 156 : itype = M32RXF_INSN_SLL3; goto extract_sfmt_sll3;
case 159 : itype = M32RXF_INSN_LDI16; goto extract_sfmt_ldi16;
case 160 : itype = M32RXF_INSN_STB_D; goto extract_sfmt_stb_d;
case 162 : itype = M32RXF_INSN_STH_D; goto extract_sfmt_sth_d;
case 164 : itype = M32RXF_INSN_ST_D; goto extract_sfmt_st_d;
case 168 : itype = M32RXF_INSN_LDB_D; goto extract_sfmt_ld_d;
case 169 : itype = M32RXF_INSN_LDUB_D; goto extract_sfmt_ld_d;
case 170 : itype = M32RXF_INSN_LDH_D; goto extract_sfmt_ld_d;
case 171 : itype = M32RXF_INSN_LDUH_D; goto extract_sfmt_ld_d;
case 172 : itype = M32RXF_INSN_LD_D; goto extract_sfmt_ld_d;
case 176 : itype = M32RXF_INSN_BEQ; goto extract_sfmt_beq;
case 177 : itype = M32RXF_INSN_BNE; goto extract_sfmt_beq;
case 184 : itype = M32RXF_INSN_BEQZ; goto extract_sfmt_beqz;
case 185 : itype = M32RXF_INSN_BNEZ; goto extract_sfmt_beqz;
case 186 : itype = M32RXF_INSN_BLTZ; goto extract_sfmt_beqz;
case 187 : itype = M32RXF_INSN_BGEZ; goto extract_sfmt_beqz;
case 188 : itype = M32RXF_INSN_BLEZ; goto extract_sfmt_beqz;
case 189 : itype = M32RXF_INSN_BGTZ; goto extract_sfmt_beqz;
case 220 : itype = M32RXF_INSN_SETH; goto extract_sfmt_seth;
case 224 : /* fall through */
case 145 : itype = M32RXF_INSN_DIVU; goto extract_sfmt_div; case 146 : itype = M32RXF_INSN_REM; goto extract_sfmt_div; case 147 : itype = M32RXF_INSN_REMU; goto extract_sfmt_div; case 152 : itype = M32RXF_INSN_SRL3; goto extract_sfmt_sll3; case 154 : itype = M32RXF_INSN_SRA3; goto extract_sfmt_sll3; case 156 : itype = M32RXF_INSN_SLL3; goto extract_sfmt_sll3; case 159 : itype = M32RXF_INSN_LDI16; goto extract_sfmt_ldi16; case 160 : itype = M32RXF_INSN_STB_D; goto extract_sfmt_stb_d; case 162 : itype = M32RXF_INSN_STH_D; goto extract_sfmt_sth_d; case 164 : itype = M32RXF_INSN_ST_D; goto extract_sfmt_st_d; case 168 : itype = M32RXF_INSN_LDB_D; goto extract_sfmt_ld_d; case 169 : itype = M32RXF_INSN_LDUB_D; goto extract_sfmt_ld_d; case 170 : itype = M32RXF_INSN_LDH_D; goto extract_sfmt_ld_d; case 171 : itype = M32RXF_INSN_LDUH_D; goto extract_sfmt_ld_d; case 172 : itype = M32RXF_INSN_LD_D; goto extract_sfmt_ld_d; case 176 : itype = M32RXF_INSN_BEQ; goto extract_sfmt_beq; case 177 : itype = M32RXF_INSN_BNE; goto extract_sfmt_beq; case 184 : itype = M32RXF_INSN_BEQZ; goto extract_sfmt_beqz; case 185 : itype = M32RXF_INSN_BNEZ; goto extract_sfmt_beqz; case 186 : itype = M32RXF_INSN_BLTZ; goto extract_sfmt_beqz; case 187 : itype = M32RXF_INSN_BGEZ; goto extract_sfmt_beqz; case 188 : itype = M32RXF_INSN_BLEZ; goto extract_sfmt_beqz; case 189 : itype = M32RXF_INSN_BGTZ; goto extract_sfmt_beqz; case 220 : itype = M32RXF_INSN_SETH; goto extract_sfmt_seth; case 224 : /* fall through */
case 225 : /* fall through */
case 226 : /* fall through */
case 227 : /* fall through */
@ -526,8 +392,7 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
case 236 : /* fall through */
case 237 : /* fall through */
case 238 : /* fall through */
case 239 : itype = M32RXF_INSN_LD24; goto extract_sfmt_ld24;
case 240 : /* fall through */
case 239 : itype = M32RXF_INSN_LD24; goto extract_sfmt_ld24; case 240 : /* fall through */
case 241 : /* fall through */
case 242 : /* fall through */
case 243 : /* fall through */
@ -544,16 +409,10 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
case 254 : /* fall through */
case 255 :
{
unsigned int val = (((insn >> 8) & (15 << 0)));
unsigned int val = (((insn >> 8) & (7 << 0)));
switch (val)
{
case 8 : itype = M32RXF_INSN_BCL24; goto extract_sfmt_bcl24;
case 9 : itype = M32RXF_INSN_BNCL24; goto extract_sfmt_bcl24;
case 12 : itype = M32RXF_INSN_BC24; goto extract_sfmt_bc24;
case 13 : itype = M32RXF_INSN_BNC24; goto extract_sfmt_bc24;
case 14 : itype = M32RXF_INSN_BL24; goto extract_sfmt_bl24;
case 15 : itype = M32RXF_INSN_BRA24; goto extract_sfmt_bra24;
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
case 0 : itype = M32RXF_INSN_BCL24; goto extract_sfmt_bcl24; case 1 : itype = M32RXF_INSN_BNCL24; goto extract_sfmt_bcl24; case 4 : itype = M32RXF_INSN_BC24; goto extract_sfmt_bc24; case 5 : itype = M32RXF_INSN_BNC24; goto extract_sfmt_bc24; case 6 : itype = M32RXF_INSN_BL24; goto extract_sfmt_bl24; case 7 : itype = M32RXF_INSN_BRA24; goto extract_sfmt_bra24; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
}
}
default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
@ -566,7 +425,6 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_empty:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_empty.f
@ -1689,7 +1547,6 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_nop:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_empty.f
@ -1726,7 +1583,6 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_rte:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_empty.f
@ -2169,7 +2025,6 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_sadd:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_empty.f
@ -2273,7 +2128,6 @@ m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_sc:
{
const IDESC *idesc = &m32rxf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
#define FLD(f) abuf->fields.fmt_empty.f

2
sim/m32r/decodex.h
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

2
sim/m32r/model.c
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

2
sim/m32r/modelx.c
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.

148
sim/m32r/sem-switch.c
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.
@ -167,7 +167,11 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#endif
#undef GET_ATTR
#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
#else
#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
#endif
{
@ -348,7 +352,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -367,7 +371,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -386,7 +390,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -405,7 +409,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -424,7 +428,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -443,7 +447,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -462,7 +466,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -481,7 +485,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -500,7 +504,7 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -523,12 +527,12 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
BI opval = temp1;
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
}
@ -552,12 +556,12 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
BI opval = temp1;
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
}
@ -581,12 +585,12 @@ SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
BI opval = temp1;
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
}
@ -833,7 +837,7 @@ if (NESI (* FLD (i_src2), 0)) {
{
SI opval = ADDSI (ANDSI (pc, -4), 4);
CPU (h_gr[((UINT) 14)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
USI opval = FLD (i_disp8);
@ -861,7 +865,7 @@ if (NESI (* FLD (i_src2), 0)) {
{
SI opval = ADDSI (pc, 4);
CPU (h_gr[((UINT) 14)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
USI opval = FLD (i_disp24);
@ -1004,7 +1008,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) {
{
BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
#undef FLD
@ -1023,7 +1027,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) {
{
BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
#undef FLD
@ -1042,7 +1046,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) {
{
BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
#undef FLD
@ -1061,7 +1065,7 @@ if (NESI (* FLD (i_src1), * FLD (i_src2))) {
{
BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
#undef FLD
@ -1082,7 +1086,7 @@ if (NESI (* FLD (i_sr), 0)) {
SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1105,7 +1109,7 @@ if (NESI (* FLD (i_sr), 0)) {
SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1128,7 +1132,7 @@ if (NESI (* FLD (i_sr), 0)) {
SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1151,7 +1155,7 @@ if (NESI (* FLD (i_sr), 0)) {
SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1177,7 +1181,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = temp0;
CPU (h_gr[((UINT) 14)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
USI opval = temp1;
@ -1224,7 +1228,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1243,7 +1247,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1262,7 +1266,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1281,7 +1285,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1300,7 +1304,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1319,7 +1323,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1338,7 +1342,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1357,7 +1361,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1376,7 +1380,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1395,7 +1399,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1418,12 +1422,12 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
SI opval = temp1;
* FLD (i_sr) = opval;
TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1443,7 +1447,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = FLD (i_uimm24);
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1462,7 +1466,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = FLD (f_simm8);
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1481,7 +1485,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = FLD (f_simm16);
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1506,7 +1510,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1602,7 +1606,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1697,7 +1701,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = * FLD (i_sr);
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1716,7 +1720,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1735,7 +1739,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = TRUNCDISI (GET_H_ACCUM ());
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1754,7 +1758,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1773,7 +1777,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = GET_H_CR (FLD (f_r2));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1830,7 +1834,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
USI opval = * FLD (i_sr);
SET_H_CR (FLD (f_r1), opval);
TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
}
#undef FLD
@ -1849,7 +1853,7 @@ if (NESI (* FLD (i_sr), 0)) {
{
SI opval = NEGSI (* FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1883,7 +1887,7 @@ PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
{
SI opval = INVSI (* FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -1966,7 +1970,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
USI opval = GET_H_CR (((UINT) 14));
SET_H_CR (((UINT) 6), opval);
TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
}
{
UQI opval = CPU (h_bpsw);
@ -1997,7 +2001,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SLLSI (FLD (f_hi16), 16);
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2016,7 +2020,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2035,7 +2039,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2054,7 +2058,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2073,7 +2077,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2092,7 +2096,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2111,7 +2115,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2130,7 +2134,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2149,7 +2153,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2168,7 +2172,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2309,7 +2313,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = tmp_new_src2;
* FLD (i_src2) = opval;
TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -2337,7 +2341,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = tmp_new_src2;
* FLD (i_src2) = opval;
TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -2357,7 +2361,7 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
#undef FLD
@ -2380,12 +2384,12 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
BI opval = temp1;
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
}
@ -2409,12 +2413,12 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
BI opval = temp1;
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
}
@ -2436,12 +2440,12 @@ if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (1676083
{
USI opval = GET_H_CR (((UINT) 6));
SET_H_CR (((UINT) 14), opval);
TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
}
{
USI opval = ADDSI (pc, 4);
SET_H_CR (((UINT) 6), opval);
TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
}
{
UQI opval = CPU (h_bpsw);

148
sim/m32r/sem.c
View File

@ -2,7 +2,7 @@
THIS FILE IS MACHINE GENERATED WITH CGEN.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
This file is part of the GNU Simulators.
@ -30,7 +30,11 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#include "cgen-ops.h"
#undef GET_ATTR
#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
#else
#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
#endif
/* This is used so that we can compile two copies of the semantic code,
one with full feature support and one without that runs fast(er).
@ -211,7 +215,7 @@ SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -232,7 +236,7 @@ SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -253,7 +257,7 @@ SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -274,7 +278,7 @@ SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -295,7 +299,7 @@ SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -316,7 +320,7 @@ SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -337,7 +341,7 @@ SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -358,7 +362,7 @@ SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -379,7 +383,7 @@ SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -404,12 +408,12 @@ SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
BI opval = temp1;
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
}
@ -435,12 +439,12 @@ SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
BI opval = temp1;
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
}
@ -466,12 +470,12 @@ SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
BI opval = temp1;
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
}
@ -738,7 +742,7 @@ SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ADDSI (ANDSI (pc, -4), 4);
CPU (h_gr[((UINT) 14)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
USI opval = FLD (i_disp8);
@ -768,7 +772,7 @@ SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ADDSI (pc, 4);
CPU (h_gr[((UINT) 14)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
USI opval = FLD (i_disp24);
@ -923,7 +927,7 @@ SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
return vpc;
@ -944,7 +948,7 @@ SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
return vpc;
@ -965,7 +969,7 @@ SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
return vpc;
@ -986,7 +990,7 @@ SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
return vpc;
@ -1009,7 +1013,7 @@ if (NESI (* FLD (i_sr), 0)) {
SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1034,7 +1038,7 @@ if (NESI (* FLD (i_sr), 0)) {
SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1059,7 +1063,7 @@ if (NESI (* FLD (i_sr), 0)) {
SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1084,7 +1088,7 @@ if (NESI (* FLD (i_sr), 0)) {
SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
written |= (1 << 2);
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1112,7 +1116,7 @@ SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = temp0;
CPU (h_gr[((UINT) 14)]) = opval;
TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
USI opval = temp1;
@ -1163,7 +1167,7 @@ SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1184,7 +1188,7 @@ SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1205,7 +1209,7 @@ SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1226,7 +1230,7 @@ SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1247,7 +1251,7 @@ SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1268,7 +1272,7 @@ SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1289,7 +1293,7 @@ SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1310,7 +1314,7 @@ SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1331,7 +1335,7 @@ SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1352,7 +1356,7 @@ SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1377,12 +1381,12 @@ SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
SI opval = temp1;
* FLD (i_sr) = opval;
TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1404,7 +1408,7 @@ SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = FLD (i_uimm24);
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1425,7 +1429,7 @@ SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = FLD (f_simm8);
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1446,7 +1450,7 @@ SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = FLD (f_simm16);
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1473,7 +1477,7 @@ SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -1579,7 +1583,7 @@ SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1684,7 +1688,7 @@ SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = * FLD (i_sr);
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1705,7 +1709,7 @@ SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1726,7 +1730,7 @@ SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = TRUNCDISI (GET_H_ACCUM ());
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1747,7 +1751,7 @@ SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1768,7 +1772,7 @@ SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = GET_H_CR (FLD (f_r2));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1831,7 +1835,7 @@ SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
USI opval = * FLD (i_sr);
SET_H_CR (FLD (f_r1), opval);
TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
}
return vpc;
@ -1852,7 +1856,7 @@ SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = NEGSI (* FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1890,7 +1894,7 @@ SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = INVSI (* FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -1979,7 +1983,7 @@ SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
USI opval = GET_H_CR (((UINT) 14));
SET_H_CR (((UINT) 6), opval);
TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
}
{
UQI opval = CPU (h_bpsw);
@ -2012,7 +2016,7 @@ SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SLLSI (FLD (f_hi16), 16);
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2033,7 +2037,7 @@ SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2054,7 +2058,7 @@ SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2075,7 +2079,7 @@ SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2096,7 +2100,7 @@ SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2117,7 +2121,7 @@ SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2138,7 +2142,7 @@ SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2159,7 +2163,7 @@ SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2180,7 +2184,7 @@ SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2201,7 +2205,7 @@ SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2356,7 +2360,7 @@ SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = tmp_new_src2;
* FLD (i_src2) = opval;
TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -2386,7 +2390,7 @@ SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = tmp_new_src2;
* FLD (i_src2) = opval;
TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
}
@ -2408,7 +2412,7 @@ SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
return vpc;
@ -2433,12 +2437,12 @@ SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
BI opval = temp1;
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
}
@ -2464,12 +2468,12 @@ SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
SI opval = temp0;
* FLD (i_dr) = opval;
TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
}
{
BI opval = temp1;
CPU (h_cond) = opval;
TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
}
}
@ -2493,12 +2497,12 @@ SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
USI opval = GET_H_CR (((UINT) 6));
SET_H_CR (((UINT) 14), opval);
TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
}
{
USI opval = ADDSI (pc, 4);
SET_H_CR (((UINT) 6), opval);
TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
}
{
UQI opval = CPU (h_bpsw);

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sim/m32r/semx-switch.c
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