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Edit ELFv2 global entry prologue to non-PIC
Changing addis r2,r12,..; addi r2,r2,.. to lis r2,..; addi r2,r2.. in non-PIC executables has the benefit of removing a dependency on r12. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Edit global entry prologue to non-PIC in non-PIC executables. ld/testsuite/ * ld-powerpc/elfv2exe.d: Adjust for non-PIC global entry.
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@ -1,3 +1,8 @@
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2013-11-04 Alan Modra <amodra@gmail.com>
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* elf64-ppc.c (ppc64_elf_relocate_section): Edit global entry
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prologue to non-PIC in non-PIC executables.
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2013-11-04 Alan Modra <amodra@gmail.com>
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* elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Copy
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@ -13486,6 +13486,39 @@ ppc64_elf_relocate_section (bfd *output_bfd,
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rel->r_info = ELF64_R_INFO (r_symndx, r_type);
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}
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break;
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case R_PPC64_REL16_HA:
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/* If we are generating a non-PIC executable, edit
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. 0: addis 2,12,.TOC.-0b@ha
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. addi 2,2,.TOC.-0b@l
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used by ELFv2 global entry points to set up r2, to
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. lis 2,.TOC.@ha
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. addi 2,2,.TOC.@l
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if .TOC. is in range. */
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if (!info->shared
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&& h != NULL && &h->elf == htab->elf.hgot
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&& rel + 1 < relend
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&& rel[1].r_info == ELF64_R_INFO (r_symndx, R_PPC64_REL16_LO)
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&& rel[1].r_offset == rel->r_offset + 4
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&& rel[1].r_addend == rel->r_addend + 4
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&& relocation + 0x80008000 <= 0xffffffff)
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{
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unsigned int insn1, insn2;
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bfd_vma offset = rel->r_offset - d_offset;
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insn1 = bfd_get_32 (output_bfd, contents + offset);
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insn2 = bfd_get_32 (output_bfd, contents + offset + 4);
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if ((insn1 & 0xffff0000) == 0x3c4c0000 /* addis 2,12 */
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&& (insn2 & 0xffff0000) == 0x38420000 /* addi 2,2 */)
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{
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r_type = R_PPC64_ADDR16_HA;
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rel->r_info = ELF64_R_INFO (r_symndx, r_type);
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rel->r_addend -= d_offset;
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rel[1].r_info = ELF64_R_INFO (r_symndx, R_PPC64_ADDR16_LO);
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rel[1].r_addend -= d_offset + 4;
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bfd_put_32 (output_bfd, 0x3c400000, contents + offset);
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}
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}
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break;
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}
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/* Handle other relocations that tweak non-addend part of insn. */
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@ -1,3 +1,7 @@
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2013-11-04 Alan Modra <amodra@gmail.com>
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* ld-powerpc/elfv2exe.d: Adjust for non-PIC global entry.
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2013-11-04 Alan Modra <amodra@gmail.com>
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* ld-elfvers/vers24.rd: Allow extra readelf output after
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@ -20,8 +20,8 @@ Disassembly of section \.text:
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.*: (20 04 80 4e|4e 80 04 20) bctr
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0+100000e0 <_start>:
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.*: (02 00 4c 3c|3c 4c 00 02) addis r2,r12,2
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.*: (60 80 42 38|38 42 80 60) addi r2,r2,-32672
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.*: (02 10 40 3c|3c 40 10 02) lis r2,4098
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.*: (40 81 42 38|38 42 81 40) addi r2,r2,-32448
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.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
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.*: (e1 ff 21 f8|f8 21 ff e1) stdu r1,-32\(r1\)
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.*: (30 00 01 f8|f8 01 00 30) std r0,48\(r1\)
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