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x86: use <xyz> for VFPCLASSP{S,D}

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Just like VFPCLASSPH does. While the order of generated table entries
changes this way, the individual entries don't change.
This commit is contained in:
Jan Beulich 2024-10-29 08:08:50 +01:00
parent c1a4b47e2a
commit 5168ed9912
2 changed files with 38 additions and 42 deletions
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6
opcodes/i386-opc.tbl
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@ -2832,11 +2832,7 @@ vextracti64x2, 0x6639, AVX512DQ, Modrm|Masking|Space0F3A|VexW=2|Disp8MemShift=4|
vinsertf64x2, 0x6618, AVX512DQ, Modrm|Masking|Space0F3A|Src1VVVV|VexW1|Disp8MemShift=4|CheckOperandSize|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
vinserti64x2, 0x6638, AVX512DQ, Modrm|Masking|Space0F3A|Src1VVVV|VexW1|Disp8MemShift=4|CheckOperandSize|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
vfpclassp<sd>, 0x6666, AVX512DQ, Modrm|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8ShiftVL|NoSuf|IntelSyntax, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|<sd:elem>|Unspecified|BaseIndex, RegMask }
vfpclassp<sd>, 0x6666, AVX512DQ, Modrm|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8ShiftVL|NoSuf|ATTSyntax, { Imm8|Imm8S, RegXMM|RegYMM|RegZMM|<sd:elem>|BaseIndex, RegMask }
vfpclassp<sd>z, 0x6666, AVX512DQ, Modrm|EVex512|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8MemShift=6|NoSuf, { Imm8|Imm8S, RegZMM|<sd:elem>|Unspecified|BaseIndex, RegMask }
vfpclassp<sd>x, 0x6666, AVX512DQ&AVX512VL, Modrm|EVex128|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8MemShift=4|NoSuf, { Imm8|Imm8S, RegXMM|<sd:elem>|Unspecified|BaseIndex, RegMask }
vfpclassp<sd>y, 0x6666, AVX512DQ&AVX512VL, Modrm|EVex256|Masking|Space0F3A|<sd:vexw>|Broadcast|Disp8MemShift=5|NoSuf, { Imm8|Imm8S, RegYMM|<sd:elem>|Unspecified|BaseIndex, RegMask }
vfpclassp<sd><xyz>, 0x6666, AVX512DQ&<xyz:vl>, Modrm|<xyz:attr>|Masking|Space0F3A|<sd:vexw>|Broadcast|NoSuf, { Imm8|Imm8S, <xyz:src>|<sd:elem>, RegMask }
vfpclasss<sdh>, 0x<sdh:pfx>67, <sdh:cpudq>, Modrm|EVexLIG|Masking|Space0F3A|<sdh:vexw>|Disp8MemShift|NoSuf, { Imm8|Imm8S, RegXMM|<sdh:elem>|Unspecified|BaseIndex, RegMask }
vpmov<dq>2m, 0xf339, AVX512DQ, Modrm|EVexDYN|Space0F38|<dq:vexw>|NoSuf, { RegXMM|RegYMM|RegZMM, RegMask }

74
opcodes/i386-tbl.h
View File

@ -40958,6 +40958,42 @@ static const insn_template i386_optab[] =
1, 1, 1, 0, 0, 0 } },
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vfpclasspsz, 0x66, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
0, 0 },
{ { 35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
0, 0, 1, 0, 1, 0 } },
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vfpclasspsx, 0x66, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 1, 1, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
0, 0 },
{ { 35, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
1, 0, 0, 0, 1, 0 } },
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vfpclasspsy, 0x66, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
0, 0 },
{ { 35, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
0, 1, 0, 0, 1, 0 } },
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vfpclasspd, 0x66, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 1, 4, 0, 0, 7, 0, 1, 0, 0, 0,
@ -40982,18 +41018,6 @@ static const insn_template i386_optab[] =
1, 1, 1, 0, 0, 0 } },
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vfpclasspsz, 0x66, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 3, 0, 0, 6, 0, 0, 0, 0, 0,
0, 0 },
{ { 35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
0, 0, 1, 0, 1, 0 } },
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vfpclasspdz, 0x66, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 2, 1, 0, 0, 1, 1, 4, 0, 0, 6, 0, 0, 0, 0, 0,
@ -41006,18 +41030,6 @@ static const insn_template i386_optab[] =
0, 0, 1, 0, 1, 0 } },
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vfpclasspsx, 0x66, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 1, 1, 0, 0, 2, 1, 3, 0, 0, 4, 0, 0, 0, 0, 0,
0, 0 },
{ { 35, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
1, 0, 0, 0, 1, 0 } },
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vfpclasspdx, 0x66, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 2, 1, 0, 0, 2, 1, 4, 0, 0, 4, 0, 0, 0, 0, 0,
@ -41030,18 +41042,6 @@ static const insn_template i386_optab[] =
1, 0, 0, 0, 1, 0 } },
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vfpclasspsy, 0x66, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 1, 3, 0, 0, 5, 0, 0, 0, 0, 0,
0, 0 },
{ { 35, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
0, 1, 0, 0, 1, 0 } },
{ { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_vfpclasspdy, 0x66, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 2, 1, 0, 0, 3, 1, 4, 0, 0, 5, 0, 0, 0, 0, 0,
@ -46623,7 +46623,7 @@ static const i386_op_off_t i386_op_sets[] =
3863, 3864, 3865, 3866, 3867, 3870, 3873, 3874,
3875, 3878, 3879, 3880, 3881, 3882, 3885, 3888,
3891, 3892, 3893, 3894, 3895, 3896, 3897, 3898,
3899, 3900, 3901, 3903, 3905, 3906, 3907, 3908,
3899, 3900, 3901, 3903, 3904, 3905, 3906, 3908,
3909, 3910, 3911, 3912, 3913, 3914, 3915, 3916,
3917, 3918, 3919, 3920, 3921, 3922, 3923, 3924,
3925, 3926, 3927, 3928, 3929, 3930, 3932, 3934,