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ubsan: m32c: left shift of negative value
cpu/ * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value. opcodes/ * m32c-ibld.c: Regenerate.
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@ -1,3 +1,7 @@
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2020-02-03 Alan Modra <amodra@gmail.com>
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* m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
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2020-02-01 Alan Modra <amodra@gmail.com>
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* frv.cpu (f-u12): Multiply rather than left shift signed values.
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@ -781,12 +781,12 @@
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(df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT
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((value pc) (ext INT
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(trunc HI
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(or (and (srl value 8) #x00ff)
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(and (sll value 8) #xff00))))) ; insert
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(or (and (srl value 8) #xff)
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(sll (and value #xff) 8))))) ; insert
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((value pc) (ext INT
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(trunc HI
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(or (and (srl value 8) #x00ff)
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(and (sll value 8) #xff00))))) ; extract
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(or (and (srl value 8) #xff)
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(sll (and value #xff) 8))))) ; extract
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)
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;-------------------------------------------------------------
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@ -1,3 +1,7 @@
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2020-02-03 Alan Modra <amodra@gmail.com>
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* m32c-ibld.c: Regenerate.
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2020-02-01 Alan Modra <amodra@gmail.com>
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* frv-ibld.c: Regenerate.
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@ -1401,7 +1401,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
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case M32C_OPERAND_IMM_64_HI :
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{
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long value = fields->f_dsp_64_s16;
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value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
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value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
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errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
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}
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break;
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@ -2561,7 +2561,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
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{
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long value;
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length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
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value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
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value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
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fields->f_dsp_64_s16 = value;
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}
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break;
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