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* config/tc-ppc.c (parse_cpu): Add -me300 support.
	(md_show_usage): Likewise.
	* doc/c-ppc.texi (PowerPC-Opts): Document it.
include/opcode/
	* ppc.h (PPC_OPCODE_E300): Define.
opcodes/
	* ppc-dis.c (powerpc_dialect): Handle e300.
	(print_ppc_disassembler_options): Likewise.
	* ppc-opc.c (PPCE300): Define.
	(powerpc_opcodes): Mark icbt as available for the e300.
binutils/
	* doc/binutils.texi (objdump): Document -M e300.
This commit is contained in:
Daniel Jacobowitz 2005-08-15 15:37:15 +00:00
parent ce490eda4b
commit 36ae0db314
10 changed files with 41 additions and 4 deletions
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4
binutils/ChangeLog
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@ -1,3 +1,7 @@
2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
* doc/binutils.texi (objdump): Document -M e300.
2005-08-14 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
* readelf.c (slurp_hppa_unwind_table): Fix entry size on hppa64-hpux.

3
binutils/doc/binutils.texi
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@ -1745,7 +1745,8 @@ suffix could be inferred by the operands.
For PPC, @option{booke}, @option{booke32} and @option{booke64} select
disassembly of BookE instructions. @option{32} and @option{64} select
PowerPC and PowerPC64 disassembly, respectively.
PowerPC and PowerPC64 disassembly, respectively. @option{e300} selects
disassembly for the e300 family.
For MIPS, this option controls the printing of instruction mneumonic
names and register names in disassembled instructions. Multiple

6
gas/ChangeLog
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@ -1,3 +1,9 @@
2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
* config/tc-ppc.c (parse_cpu): Add -me300 support.
(md_show_usage): Likewise.
* doc/c-ppc.texi (PowerPC-Opts): Document it.
2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
* config/tc-s390.c (md_parse_option): Add cpu type z9-109.

4
gas/config/tc-ppc.c
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@ -858,6 +858,9 @@ parse_cpu (const char *arg)
|| strcmp (arg, "7455") == 0)
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
else if (strcmp (arg, "e300") == 0)
ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
| PPC_OPCODE_E300);
else if (strcmp (arg, "altivec") == 0)
{
if (ppc_cpu == 0)
@ -1111,6 +1114,7 @@ PowerPC options:\n\
-many generate code for any architecture (PWR/PWRX/PPC)\n"));
fprintf (stream, _("\
-maltivec generate code for AltiVec\n\
-me300 generate code for PowerPC e300 family\n\
-me500, -me500x2 generate code for Motorola e500 core complex\n\
-mspe generate code for Motorola SPE instructions\n\
-mregnames Allow symbolic names for registers\n\

5
gas/doc/c-ppc.texi
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@ -1,4 +1,4 @@
@c Copyright 2001, 2002, 2003
@c Copyright 2001, 2002, 2003, 2005
@c Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ -67,6 +67,9 @@ Generate code for 64-bit BookE.
@item -mbooke, mbooke32
Generate code for 32-bit BookE.
@item -me300
Generate code for PowerPC e300 family.
@item -maltivec
Generate code for processors with AltiVec instructions.

4
include/opcode/ChangeLog
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@ -1,3 +1,7 @@
2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
* ppc.h (PPC_OPCODE_E300): Define.
2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
* s390.h (s390_opcode_cpu_val): Add enum for cpu type z9-109.

5
include/opcode/ppc.h
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@ -1,5 +1,5 @@
/* ppc.h -- Header file for PowerPC opcode table
Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004
Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support
@ -137,6 +137,9 @@ extern const int powerpc_num_opcodes;
/* Opcode is only supported by Power5 architecture. */
#define PPC_OPCODE_POWER5 0x1000000
/* Opcode is supported by PowerPC e300 family. */
#define PPC_OPCODE_E300 0x2000000
/* A macro to extract the major opcode from an instruction. */
#define PPC_OP(i) (((i) >> 26) & 0x3f)

7
opcodes/ChangeLog
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@ -1,3 +1,10 @@
2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
* ppc-dis.c (powerpc_dialect): Handle e300.
(print_ppc_disassembler_options): Likewise.
* ppc-opc.c (PPCE300): Define.
(powerpc_opcodes): Mark icbt as available for the e300.
2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
* hppa-dis.c (print_insn_hppa): Don't print '%' before register names.

4
opcodes/ppc-dis.c
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@ -63,6 +63,9 @@ powerpc_dialect (struct disassemble_info *info)
else if (info->disassembler_options
&& strstr (info->disassembler_options, "efs") != NULL)
dialect |= PPC_OPCODE_EFS;
else if (info->disassembler_options
&& strstr (info->disassembler_options, "e300") != NULL)
dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
else
dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
| PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);
@ -303,6 +306,7 @@ The following PPC specific disassembler options are supported for use with\n\
the -M switch:\n");
fprintf (stream, " booke|booke32|booke64 Disassemble the BookE instructions\n");
fprintf (stream, " e300 Disassemble the e300 instructions\n");
fprintf (stream, " e500|e500x2 Disassemble the e500 instructions\n");
fprintf (stream, " efs Disassemble the EFS instructions\n");
fprintf (stream, " power4 Disassemble the Power4 instructions\n");

3
opcodes/ppc-opc.c
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@ -1844,6 +1844,7 @@ extract_tbr (unsigned long insn,
#define BOOKE PPC_OPCODE_BOOKE
#define BOOKE64 PPC_OPCODE_BOOKE64
#define CLASSIC PPC_OPCODE_CLASSIC
#define PPCE300 PPC_OPCODE_E300
#define PPCSPE PPC_OPCODE_SPE
#define PPCISEL PPC_OPCODE_ISEL
#define PPCEFS PPC_OPCODE_EFS
@ -3327,7 +3328,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{ "ldx", X(31,21), X_MASK, PPC64, { RT, RA0, RB } },
{ "icbt", X(31,22), X_MASK, BOOKE, { CT, RA, RB } },
{ "icbt", X(31,22), X_MASK, BOOKE|PPCE300, { CT, RA, RB } },
{ "icbt", X(31,262), XRT_MASK, PPC403, { RA, RB } },
{ "lwzx", X(31,23), X_MASK, PPCCOM, { RT, RA0, RB } },