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x86: drop {,reg16_}inoutportreg variables
The checking against reg16_inoutportreg can be had with a simple test of a bit, and the value setting from inoutportreg can be replaced by using the actual register's reg_type field. Note that the so far redundant 2nd instance of OPERAND_TYPE_INOUTPORTREG is left in place, for its use in type_names[].
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@ -1,3 +1,9 @@
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2018-07-11 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (inoutportreg, reg16_inoutportreg): Delete.
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(i386_att_operand): Replace uses of reg16_inoutportreg and
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inoutportreg.
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2018-07-11 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (output_insn): Remove check_prefix label and
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@ -1832,10 +1832,6 @@ operand_type_xor (i386_operand_type x, i386_operand_type y)
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static const i386_operand_type acc32 = OPERAND_TYPE_ACC32;
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static const i386_operand_type acc64 = OPERAND_TYPE_ACC64;
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static const i386_operand_type inoutportreg
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= OPERAND_TYPE_INOUTPORTREG;
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static const i386_operand_type reg16_inoutportreg
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= OPERAND_TYPE_REG16_INOUTPORTREG;
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static const i386_operand_type disp16 = OPERAND_TYPE_DISP16;
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static const i386_operand_type disp32 = OPERAND_TYPE_DISP32;
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static const i386_operand_type disp32s = OPERAND_TYPE_DISP32S;
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@ -9637,14 +9633,13 @@ i386_att_operand (char *operand_string)
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/* Special case for (%dx) while doing input/output op. */
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if (i.base_reg
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&& operand_type_equal (&i.base_reg->reg_type,
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®16_inoutportreg)
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&& i.base_reg->reg_type.bitfield.inoutportreg
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&& i.index_reg == 0
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&& i.log2_scale_factor == 0
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&& i.seg[i.mem_operands] == 0
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&& !operand_type_check (i.types[this_operand], disp))
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{
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i.types[this_operand] = inoutportreg;
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i.types[this_operand] = i.base_reg->reg_type;
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return 1;
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}
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@ -1,3 +1,10 @@
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2018-07-11 Jan Beulich <jbeulich@suse.com>
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* i386-gen.c (operand_type_init): Remove
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OPERAND_TYPE_REG16_INOUTPORTREG entry and one instance of
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OPERAND_TYPE_INOUTPORTREG.
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* i386-init.h: Re-generate.
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2018-07-11 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (wrssd, wrussd): Add Dword.
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@ -444,10 +444,6 @@ static initializer operand_type_init[] =
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"Reg32|Acc|Dword" },
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{ "OPERAND_TYPE_ACC64",
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"Reg64|Acc|Qword" },
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{ "OPERAND_TYPE_INOUTPORTREG",
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"InOutPortReg" },
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{ "OPERAND_TYPE_REG16_INOUTPORTREG",
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"Reg16|InOutPortReg" },
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{ "OPERAND_TYPE_DISP16_32",
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"Disp16|Disp32" },
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{ "OPERAND_TYPE_ANYDISP",
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@ -1452,16 +1452,6 @@
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0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
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0, 0, 0 } }
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#define OPERAND_TYPE_INOUTPORTREG \
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0 } }
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#define OPERAND_TYPE_REG16_INOUTPORTREG \
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{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0 } }
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#define OPERAND_TYPE_DISP16_32 \
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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