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[cgen/cpu]
* cpu/mep-ivc2.cpu (h-ccr-ivc2): Enable for C3 slots, fix accumulator names. (f-ivc2-ccrn-c3hi): New. (f-ivc2-ccrn-c3lo): New. (f-ivc2-ccrn-c3): New. (ivc2c3ccrn): Use it. [sid/component/cgen-cpu/mep] * mep-cop1-32-decode.cxx: Regenerate. * mep-cop1-32-decode.h: Regenerate. * mep-cop1-32-sem.cxx: Regenerate. * mep-cop1-48-sem.cxx: Regenerate. [opcodes] * mep-asm.c: Regenerate. * mep-desc.c: Regenerate. * mep-desc.h: Regenerate. * mep-dis.c: Regenerate. * mep-ibld.c: Regenerate. * mep-opc.c: Regenerate. * mep-opc.h: Regenerate.
This commit is contained in:
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@ -1,3 +1,13 @@
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2009-05-26 DJ Delorie <dj@redhat.com>
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* mep-asm.c: Regenerate.
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* mep-desc.c: Regenerate.
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* mep-desc.h: Regenerate.
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* mep-dis.c: Regenerate.
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* mep-ibld.c: Regenerate.
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* mep-opc.c: Regenerate.
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* mep-opc.h: Regenerate.
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2009-05-26 Nick Clifton <nickc@redhat.com>
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* po/id.po: Updated Indonesian translation.
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@ -981,7 +981,7 @@ mep_cgen_parse_operand (CGEN_CPU_DESC cd,
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errmsg = cgen_parse_unsigned_integer (cd, strp, MEP_OPERAND_IVC_X_6_3, (unsigned long *) (& fields->f_ivc2_3u6));
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break;
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case MEP_OPERAND_IVC2C3CCRN :
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errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_ccr_ivc2, & fields->f_ccrn);
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errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_ccr_ivc2, & fields->f_ivc2_ccrn_c3);
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break;
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case MEP_OPERAND_IVC2CCRN :
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errmsg = cgen_parse_keyword (cd, strp, & mep_cgen_opval_h_ccr_ivc2, & fields->f_ivc2_ccrn);
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@ -473,22 +473,22 @@ static CGEN_KEYWORD_ENTRY mep_cgen_opval_h_ccr_ivc2_entries[] =
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{ "$cofa0", 6, {0, {{{0, 0}}}}, 0, 0 },
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{ "$cofa1", 7, {0, {{{0, 0}}}}, 0, 0 },
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{ "$csar1", 15, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc00", 16, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc01", 17, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc02", 18, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc03", 19, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc04", 20, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc05", 21, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc06", 22, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc07", 23, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc10", 24, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc11", 25, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc12", 26, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc13", 27, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc14", 28, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc15", 29, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc16", 30, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc17", 31, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc0_0", 16, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc0_1", 17, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc0_2", 18, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc0_3", 19, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc0_4", 20, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc0_5", 21, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc0_6", 22, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc0_7", 23, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc1_0", 24, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc1_1", 25, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc1_2", 26, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc1_3", 27, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc1_4", 28, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc1_5", 29, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc1_6", 30, {0, {{{0, 0}}}}, 0, 0 },
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{ "$acc1_7", 31, {0, {{{0, 0}}}}, 0, 0 },
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{ "$ccr0", 0, {0, {{{0, 0}}}}, 0, 0 },
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{ "$ccr1", 1, {0, {{{0, 0}}}}, 0, 0 },
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{ "$ccr2", 2, {0, {{{0, 0}}}}, 0, 0 },
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@ -555,7 +555,7 @@ const CGEN_HW_ENTRY mep_cgen_hw_table[] =
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{ "h-ccr", HW_H_CCR, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_ccr, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ "h-ccr-w", HW_H_CCR_W, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ "h-cr-ivc2", HW_H_CR_IVC2, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_cr_ivc2, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } } },
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{ "h-ccr-ivc2", HW_H_CCR_IVC2, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_ccr_ivc2, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xd0" } } } } },
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{ "h-ccr-ivc2", HW_H_CCR_IVC2, CGEN_ASM_KEYWORD, (PTR) & mep_cgen_opval_h_ccr_ivc2, { 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ 0, 0, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
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};
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@ -715,6 +715,8 @@ const CGEN_IFLD mep_cgen_ifld_table[] =
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{ MEP_F_IVC2_3U25, "f-ivc2-3u25", 0, 32, 25, 3, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_IMM16P0, "f-ivc2-imm16p0", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_SIMM16P0, "f-ivc2-simm16p0", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_CCRN_C3HI, "f-ivc2-ccrn-c3hi", 0, 32, 28, 2, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_CCRN_C3LO, "f-ivc2-ccrn-c3lo", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_CRN, "f-ivc2-crn", 0, 32, 0, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_CRM, "f-ivc2-crm", 0, 32, 4, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_CCRN_H1, "f-ivc2-ccrn-h1", 0, 32, 20, 1, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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@ -723,6 +725,7 @@ const CGEN_IFLD mep_cgen_ifld_table[] =
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{ MEP_F_IVC2_CMOV1, "f-ivc2-cmov1", 0, 32, 8, 12, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_CMOV2, "f-ivc2-cmov2", 0, 32, 22, 6, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_CMOV3, "f-ivc2-cmov3", 0, 32, 28, 4, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_CCRN_C3, "f-ivc2-ccrn-c3", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_CCRN, "f-ivc2-ccrn", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ MEP_F_IVC2_CRNX, "f-ivc2-crnx", 0, 0, 0, 0,{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } } } } },
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{ 0, 0, 0, 0, 0, 0, { 0, { { { (1<<MACH_BASE), 0 } }, { { 1, "\x80" } } } } }
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@ -747,6 +750,7 @@ const CGEN_MAYBE_MULTI_IFLD MEP_F_C5_RMUIMM20_MULTI_IFIELD [];
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const CGEN_MAYBE_MULTI_IFLD MEP_F_C5_RNMUIMM24_MULTI_IFIELD [];
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const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_IMM16P0_MULTI_IFIELD [];
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const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_SIMM16P0_MULTI_IFIELD [];
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const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_CCRN_C3_MULTI_IFIELD [];
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const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_CCRN_MULTI_IFIELD [];
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const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_CRNX_MULTI_IFIELD [];
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@ -833,6 +837,12 @@ const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_SIMM16P0_MULTI_IFIELD [] =
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{ 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_8U20] } },
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{ 0, { (const PTR) 0 } }
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};
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const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_CCRN_C3_MULTI_IFIELD [] =
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{
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{ 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_CCRN_C3HI] } },
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{ 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_CCRN_C3LO] } },
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{ 0, { (const PTR) 0 } }
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};
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const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_CCRN_MULTI_IFIELD [] =
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{
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{ 0, { (const PTR) &mep_cgen_ifld_table[MEP_F_IVC2_CCRN_H2] } },
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@ -1347,7 +1357,7 @@ const CGEN_OPERAND mep_cgen_operand_table[] =
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{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_REGNUM, 0 } }, { { 1, 0 } } } } },
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/* ivc2c3ccrn: copro control reg CCRn */
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{ "ivc2c3ccrn", MEP_OPERAND_IVC2C3CCRN, HW_H_CCR_IVC2, 4, 6,
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{ 2, { (const PTR) &MEP_F_CCRN_MULTI_IFIELD[0] } },
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{ 2, { (const PTR) &MEP_F_IVC2_CCRN_C3_MULTI_IFIELD[0] } },
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{ 0|A(VIRTUAL), { { { (1<<MACH_BASE), 0 } }, { { 1, "\xfc" } }, { { CDATA_REGNUM, 0 } }, { { 1, 0 } } } } },
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/* sentinel */
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{ 0, 0, 0, 0, 0,
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@ -168,10 +168,11 @@ typedef enum ifield_type {
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, MEP_F_IVC2_4U4, MEP_F_IVC2_3U5, MEP_F_IVC2_5U8, MEP_F_IVC2_4U10
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, MEP_F_IVC2_3U12, MEP_F_IVC2_5U13, MEP_F_IVC2_2U18, MEP_F_IVC2_5U18
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, MEP_F_IVC2_8U20, MEP_F_IVC2_8S20, MEP_F_IVC2_5U23, MEP_F_IVC2_2U23
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, MEP_F_IVC2_3U25, MEP_F_IVC2_IMM16P0, MEP_F_IVC2_SIMM16P0, MEP_F_IVC2_CRN
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, MEP_F_IVC2_CRM, MEP_F_IVC2_CCRN_H1, MEP_F_IVC2_CCRN_H2, MEP_F_IVC2_CCRN_LO
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, MEP_F_IVC2_CMOV1, MEP_F_IVC2_CMOV2, MEP_F_IVC2_CMOV3, MEP_F_IVC2_CCRN
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, MEP_F_IVC2_CRNX, MEP_F_MAX
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, MEP_F_IVC2_3U25, MEP_F_IVC2_IMM16P0, MEP_F_IVC2_SIMM16P0, MEP_F_IVC2_CCRN_C3HI
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, MEP_F_IVC2_CCRN_C3LO, MEP_F_IVC2_CRN, MEP_F_IVC2_CRM, MEP_F_IVC2_CCRN_H1
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, MEP_F_IVC2_CCRN_H2, MEP_F_IVC2_CCRN_LO, MEP_F_IVC2_CMOV1, MEP_F_IVC2_CMOV2
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, MEP_F_IVC2_CMOV3, MEP_F_IVC2_CCRN_C3, MEP_F_IVC2_CCRN, MEP_F_IVC2_CRNX
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, MEP_F_MAX
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} IFIELD_TYPE;
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#define MAX_IFLD ((int) MEP_F_MAX)
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@ -929,7 +929,7 @@ mep_cgen_print_operand (CGEN_CPU_DESC cd,
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print_normal (cd, info, fields->f_ivc2_3u6, 0, pc, length);
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break;
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case MEP_OPERAND_IVC2C3CCRN :
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print_keyword (cd, info, & mep_cgen_opval_h_ccr_ivc2, fields->f_ccrn, 0|(1<<CGEN_OPERAND_VIRTUAL));
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print_keyword (cd, info, & mep_cgen_opval_h_ccr_ivc2, fields->f_ivc2_ccrn_c3, 0|(1<<CGEN_OPERAND_VIRTUAL));
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break;
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case MEP_OPERAND_IVC2CCRN :
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print_keyword (cd, info, & mep_cgen_opval_h_ccr_ivc2, fields->f_ivc2_ccrn, 0|(1<<CGEN_OPERAND_VIRTUAL));
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@ -881,13 +881,13 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
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case MEP_OPERAND_IVC2C3CCRN :
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{
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{
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FLD (f_ccrn_hi) = ((((unsigned int) (FLD (f_ccrn)) >> (4))) & (3));
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FLD (f_ccrn_lo) = ((FLD (f_ccrn)) & (15));
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FLD (f_ivc2_ccrn_c3hi) = ((((unsigned int) (FLD (f_ivc2_ccrn_c3)) >> (4))) & (3));
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FLD (f_ivc2_ccrn_c3lo) = ((FLD (f_ivc2_ccrn_c3)) & (15));
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}
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errmsg = insert_normal (cd, fields->f_ccrn_hi, 0, 0, 28, 2, 32, total_length, buffer);
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errmsg = insert_normal (cd, fields->f_ivc2_ccrn_c3hi, 0, 0, 28, 2, 32, total_length, buffer);
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if (errmsg)
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break;
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errmsg = insert_normal (cd, fields->f_ccrn_lo, 0, 0, 4, 4, 32, total_length, buffer);
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errmsg = insert_normal (cd, fields->f_ivc2_ccrn_c3lo, 0, 0, 4, 4, 32, total_length, buffer);
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if (errmsg)
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break;
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}
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@ -1461,11 +1461,11 @@ mep_cgen_extract_operand (CGEN_CPU_DESC cd,
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break;
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case MEP_OPERAND_IVC2C3CCRN :
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{
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length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 2, 32, total_length, pc, & fields->f_ccrn_hi);
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length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 2, 32, total_length, pc, & fields->f_ivc2_ccrn_c3hi);
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if (length <= 0) break;
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length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_ccrn_lo);
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length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_ivc2_ccrn_c3lo);
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if (length <= 0) break;
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FLD (f_ccrn) = ((((FLD (f_ccrn_hi)) << (4))) | (FLD (f_ccrn_lo)));
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FLD (f_ivc2_ccrn_c3) = ((((FLD (f_ivc2_ccrn_c3hi)) << (4))) | (FLD (f_ivc2_ccrn_c3lo)));
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}
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break;
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case MEP_OPERAND_IVC2CCRN :
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@ -1918,7 +1918,7 @@ mep_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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value = fields->f_ivc2_3u6;
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break;
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case MEP_OPERAND_IVC2C3CCRN :
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value = fields->f_ccrn;
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value = fields->f_ivc2_ccrn_c3;
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break;
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case MEP_OPERAND_IVC2CCRN :
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value = fields->f_ivc2_ccrn;
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@ -2301,7 +2301,7 @@ mep_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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value = fields->f_ivc2_3u6;
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break;
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case MEP_OPERAND_IVC2C3CCRN :
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value = fields->f_ccrn;
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value = fields->f_ivc2_ccrn_c3;
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break;
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case MEP_OPERAND_IVC2CCRN :
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value = fields->f_ivc2_ccrn;
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@ -2685,7 +2685,7 @@ mep_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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fields->f_ivc2_3u6 = value;
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break;
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case MEP_OPERAND_IVC2C3CCRN :
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fields->f_ccrn = value;
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fields->f_ivc2_ccrn_c3 = value;
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break;
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case MEP_OPERAND_IVC2CCRN :
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fields->f_ivc2_ccrn = value;
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@ -3042,7 +3042,7 @@ mep_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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fields->f_ivc2_3u6 = value;
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break;
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case MEP_OPERAND_IVC2C3CCRN :
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fields->f_ccrn = value;
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fields->f_ivc2_ccrn_c3 = value;
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break;
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case MEP_OPERAND_IVC2CCRN :
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fields->f_ivc2_ccrn = value;
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@ -439,7 +439,7 @@ static const CGEN_IFMT ifmt_cmov_crn_rm ATTRIBUTE_UNUSED = {
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};
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static const CGEN_IFMT ifmt_cmovc_ccrn_rm ATTRIBUTE_UNUSED = {
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32, 32, 0xf00ffff3, { { F (F_MAJOR) }, { F (F_CCRN) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_IVC2_4U16) }, { F (F_IVC2_4U20) }, { F (F_IVC2_4U24) }, { F (F_30) }, { F (F_31) }, { 0 } }
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32, 32, 0xf00ffff3, { { F (F_MAJOR) }, { F (F_IVC2_CCRN_C3) }, { F (F_RM) }, { F (F_SUB4) }, { F (F_IVC2_4U16) }, { F (F_IVC2_4U20) }, { F (F_IVC2_4U24) }, { F (F_30) }, { F (F_31) }, { 0 } }
|
||||
};
|
||||
|
||||
static const CGEN_IFMT ifmt_cmov_crn_rm_p0 ATTRIBUTE_UNUSED = {
|
||||
|
@ -484,6 +484,8 @@ struct cgen_fields
|
||||
long f_ivc2_3u25;
|
||||
long f_ivc2_imm16p0;
|
||||
long f_ivc2_simm16p0;
|
||||
long f_ivc2_ccrn_c3hi;
|
||||
long f_ivc2_ccrn_c3lo;
|
||||
long f_ivc2_crn;
|
||||
long f_ivc2_crm;
|
||||
long f_ivc2_ccrn_h1;
|
||||
@ -492,6 +494,7 @@ struct cgen_fields
|
||||
long f_ivc2_cmov1;
|
||||
long f_ivc2_cmov2;
|
||||
long f_ivc2_cmov3;
|
||||
long f_ivc2_ccrn_c3;
|
||||
long f_ivc2_ccrn;
|
||||
long f_ivc2_crnx;
|
||||
};
|
||||
|
Loading…
Reference in New Issue
Block a user