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RISC-V: Mention -mbig-endian and -mlittle-endian in doc

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gas/
    * doc/as.texi: Add -mlittle-endian and -mbig-endian to docs.
    * doc/c-riscv.texi: Likewise.
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Marcus Comstedt 2021-01-05 22:50:37 +01:00 committed by Nelson Chu
parent f36ce378b4
commit 286d2f2cd7
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
* doc/as.texi: Add -mlittle-endian and -mbig-endian to docs.
* doc/c-riscv.texi: Likewise.
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
* testsuite/gas/riscv/li32.d: Accept bigriscv in addition

1
gas/doc/as.texi
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@ -536,6 +536,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
[@b{-fpic}|@b{-fPIC}|@b{-fno-pic}]
[@b{-march}=@var{ISA}]
[@b{-mabi}=@var{ABI}]
[@b{-mlittle-endian}|@b{-mbig-endian}]
@end ifset
@ifset RL78

8
gas/doc/c-riscv.texi
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@ -99,6 +99,14 @@ read-only CSR can not be written by the CSR instructions.
@cindex @samp{-mno-csr-check} option, RISC-V
@item -mno-csr-check
Don't do CSR checking.
@cindex @samp{-mlittle-endian} option, RISC-V
@item -mlittle-endian
Generate code for a little endian machine.
@cindex @samp{-mbig-endian} option, RISC-V
@item -mbig-endian
Generate code for a big endian machine.
@end table
@c man end