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gas/

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2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (baseindex): Removed.
	(build_modrm_byte): Check reg_num for RIP register instead of
	reg_type.
	(i386_index_check): Likewise.

opcodes/

2007-09-17  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (RegRip): New.

	* i386-reg.tbl (rip): Use RegRip for reg_num.
	* i386-tbl.h: Regenerated.
This commit is contained in:
H.J. Lu 2007-09-18 00:56:54 +00:00
parent b10a8ae01c
commit 20e192ab8d
6 changed files with 19 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
gas/ChangeLog
View File

@ -1,3 +1,10 @@
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (baseindex): Removed.
(build_modrm_byte): Check reg_num for RIP register instead of
reg_type.
(i386_index_check): Likewise.
2007-09-17 H.J. Lu <hongjiu.lu@intel.com> 2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5035 PR gas/5035

5
gas/config/tc-i386.c
View File

@ -1098,7 +1098,6 @@ static const i386_operand_type disp32s = OPERAND_TYPE_DISP32S;
static const i386_operand_type disp16_32 = OPERAND_TYPE_DISP16_32; static const i386_operand_type disp16_32 = OPERAND_TYPE_DISP16_32;
static const i386_operand_type anydisp static const i386_operand_type anydisp
= OPERAND_TYPE_ANYDISP; = OPERAND_TYPE_ANYDISP;
static const i386_operand_type baseindex = OPERAND_TYPE_BASEINDEX;
static const i386_operand_type regxmm = OPERAND_TYPE_REGXMM; static const i386_operand_type regxmm = OPERAND_TYPE_REGXMM;
static const i386_operand_type imm8 = OPERAND_TYPE_IMM8; static const i386_operand_type imm8 = OPERAND_TYPE_IMM8;
static const i386_operand_type imm8s = OPERAND_TYPE_IMM8S; static const i386_operand_type imm8s = OPERAND_TYPE_IMM8S;
@ -4541,7 +4540,7 @@ build_modrm_byte (void)
} }
} }
/* RIP addressing for 64bit mode. */ /* RIP addressing for 64bit mode. */
else if (UINTS_EQUAL (i.base_reg->reg_type, baseindex)) else if (i.base_reg->reg_num == RegRip)
{ {
i.rm.regmem = NO_BASE_REGISTER; i.rm.regmem = NO_BASE_REGISTER;
i.types[op].bitfield.disp8 = 0; i.types[op].bitfield.disp8 = 0;
@ -5977,7 +5976,7 @@ i386_index_check (const char *operand_string)
|| (i.prefix[ADDR_PREFIX] || (i.prefix[ADDR_PREFIX]
&& !i.base_reg->reg_type.bitfield.reg32)) && !i.base_reg->reg_type.bitfield.reg32))
&& (i.index_reg && (i.index_reg
|| !UINTS_EQUAL (i.base_reg->reg_type, baseindex))) || i.base_reg->reg_num != RegRip))
|| (i.index_reg || (i.index_reg
&& (!i.index_reg->reg_type.bitfield.baseindex && (!i.index_reg->reg_type.bitfield.baseindex
|| (i.prefix[ADDR_PREFIX] == 0 || (i.prefix[ADDR_PREFIX] == 0

7
opcodes/ChangeLog
View File

@ -1,3 +1,10 @@
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (RegRip): New.
* i386-reg.tbl (rip): Use RegRip for reg_num.
* i386-tbl.h: Regenerated.
2007-09-17 Nick Clifton <nickc@redhat.com> 2007-09-17 Nick Clifton <nickc@redhat.com>
* po/es.po: Updated Spanish translation. * po/es.po: Updated Spanish translation.

1
opcodes/i386-opc.h
View File

@ -443,6 +443,7 @@ typedef struct
#define RegRex 0x1 /* Extended register. */ #define RegRex 0x1 /* Extended register. */
#define RegRex64 0x2 /* Extended 8 bit register. */ #define RegRex64 0x2 /* Extended 8 bit register. */
unsigned int reg_num; unsigned int reg_num;
#define RegRip ((unsigned int ) ~0)
} }
reg_entry; reg_entry;

2
opcodes/i386-reg.tbl
View File

@ -189,7 +189,7 @@ xmm14, RegXMM, RegRex, 6
xmm15, RegXMM, RegRex, 7 xmm15, RegXMM, RegRex, 7
// No type will make this register rejected for all purposes except // No type will make this register rejected for all purposes except
// for addressing. This saves creating one extra type for RIP. // for addressing. This saves creating one extra type for RIP.
rip, BaseIndex, 0, 0 rip, BaseIndex, 0, RegRip
// fp regs. // fp regs.
st(0), FloatReg|FloatAcc, 0, 0 st(0), FloatReg|FloatAcc, 0, 0
st(1), FloatReg, 0, 1 st(1), FloatReg, 0, 1

2
opcodes/i386-tbl.h
View File

@ -13278,7 +13278,7 @@ const reg_entry i386_regtab[] =
{ "rip", { "rip",
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
0, 0 }, 0, RegRip },
{ "st(0)", { "st(0)",
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 } }, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 } },