mirror of
https://sourceware.org/git/binutils-gdb.git
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2003-06-03 Michael Snyder <msnyder@redhat.com>
and Bernd Schmidt <bernds@redhat.com> and Alexandre Oliva <aoliva@redhat.com> * disassemble.c (disassembler): Add support for h8300sx. * h8300-dis.c: Ditto.
This commit is contained in:
Michael Snyder
parent
7ee7b84dfa
commit
20dc5b5ae3
@ -1,3 +1,9 @@
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2003-06-03 Michael Snyder <msnyder@redhat.com>
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and Bernd Schmidt <bernds@redhat.com>
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and Alexandre Oliva <aoliva@redhat.com>
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* disassemble.c (disassembler): Add support for h8300sx.
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* h8300-dis.c: Ditto.
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2003-06-03 Nick Clifton <nickc@redhat.com>
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* frv-desc.c: Regenerate.
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@ -1,5 +1,5 @@
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/* Disassemble h8300 instructions.
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Copyright 1993, 1994, 1996, 1998, 2000, 2001, 2002
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Copyright 1993, 1994, 1996, 1998, 2000, 2001, 2002, 2003
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Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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@ -34,11 +34,39 @@ struct h8_instruction
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struct h8_instruction *h8_instructions;
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static void bfd_h8_disassemble_init PARAMS ((void));
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static unsigned int bfd_h8_disassemble
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PARAMS ((bfd_vma, disassemble_info *, int));
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static void print_one_arg PARAMS ((disassemble_info *, bfd_vma, op_type,
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int, int, int, int, const char **, int));
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static unsigned int bfd_h8_disassemble PARAMS ((bfd_vma,
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disassemble_info *,
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int));
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static void extract_immediate PARAMS ((FILE *,
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op_type, int,
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unsigned char *,
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int *, int *,
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const struct h8_opcode *));
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static void print_colon_thingie PARAMS ((op_type *));
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static void
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print_colon_thingie (op_type *nib)
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{
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switch (*nib & SIZE) {
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case L_2: fprintf (stdout, "2"); break;
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case L_3:
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case L_3NZ: fprintf (stdout, "3"); break;
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case L_4: fprintf (stdout, "4"); break;
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case L_5: fprintf (stdout, "5"); break;
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case L_8: fprintf (stdout, "8"); break;
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case L_16:
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case L_16U: fprintf (stdout, "16"); break;
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case L_24: fprintf (stdout, "24"); break;
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case L_32: fprintf (stdout, "32"); break;
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}
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}
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/* Run through the opcodes and sort them into order to make them easy
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to disassemble. */
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static void
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bfd_h8_disassemble_init ()
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{
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@ -69,11 +97,14 @@ bfd_h8_disassemble_init ()
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/* Just make sure there are an even number of nibbles in it, and
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that the count is the same as the length. */
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for (i = 0; p->data.nib[i] != E; i++)
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for (i = 0; p->data.nib[i] != (op_type) E; i++)
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;
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if (i & 1)
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abort ();
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{
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fprintf (stderr, "Internal error, h8_disassemble_init.\n");
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abort ();
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}
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pi->length = i / 2;
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pi->opcode = p;
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@ -84,42 +115,287 @@ bfd_h8_disassemble_init ()
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pi->opcode = p;
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}
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static void
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extract_immediate (stream, looking_for, thisnib, data, cst, len, q)
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FILE *stream;
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op_type looking_for;
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int thisnib;
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unsigned char *data;
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int *cst, *len;
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const struct h8_opcode *q;
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{
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switch (looking_for & SIZE)
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{
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case L_2:
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*len = 2;
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*cst = thisnib & 3;
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/* DISP2 special treatment. */
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if ((looking_for & MODE) == DISP)
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{
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if (OP_KIND (q->how) == O_MOVAB ||
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OP_KIND (q->how) == O_MOVAW ||
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OP_KIND (q->how) == O_MOVAL)
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{
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/* Handling for mova insn. */
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switch (q->args.nib[0] & MODE) {
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case INDEXB:
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default:
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break;
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case INDEXW:
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*cst *= 2;
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break;
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case INDEXL:
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*cst *= 4;
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break;
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}
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}
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else
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{
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/* Handling for non-mova insn. */
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switch (OP_SIZE (q->how)) {
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default: break;
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case SW:
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*cst *= 2;
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break;
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case SL:
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*cst *= 4;
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break;
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}
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}
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}
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break;
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case L_8:
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*len = 8;
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*cst = data[0];
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break;
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case L_16:
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case L_16U:
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*len = 16;
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*cst = (data[0] << 8) + data [1];
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#if 0
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if ((looking_for & SIZE) == L_16)
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*cst = (short) *cst; /* sign extend */
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#endif
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break;
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case L_32:
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*len = 32;
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*cst = (data[0] << 24) + (data[1] << 16) + (data[2] << 8) + data[3];
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break;
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default:
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*len = 0;
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*cst = 0;
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fprintf (stream, "DISP bad size\n");
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break;
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}
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}
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static const char *regnames[] =
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{
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"r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
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"r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
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};
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static const char *wregnames[] =
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{
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
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};
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static const char *lregnames[] =
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{
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"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
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"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
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};
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static const char *cregnames[] =
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{
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"ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
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};
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static void
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print_one_arg (info, addr, x, cst, cstlen, rdisp_n, rn, pregnames, len)
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disassemble_info *info;
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bfd_vma addr;
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op_type x;
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int cst, cstlen, rdisp_n, rn;
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const char **pregnames;
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int len;
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{
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void *stream = info->stream;
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fprintf_ftype outfn = info->fprintf_func;
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if ((x & SIZE) == L_3 ||
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(x & SIZE) == L_3NZ)
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{
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outfn (stream, "#0x%x", (unsigned) cst);
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}
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else if ((x & MODE) == IMM)
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{
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outfn (stream, "#0x%x", (unsigned) cst);
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}
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else if ((x & MODE) == DBIT ||
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(x & MODE) == KBIT)
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{
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outfn (stream, "#%d", (unsigned) cst);
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}
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else if ((x & MODE) == CONST_2)
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outfn (stream, "#2");
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else if ((x & MODE) == CONST_4)
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outfn (stream, "#4");
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else if ((x & MODE) == CONST_8)
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outfn (stream, "#8");
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else if ((x & MODE) == CONST_16)
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outfn (stream, "#16");
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else if ((x & MODE) == REG)
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{
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switch (x & SIZE)
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{
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case L_8:
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outfn (stream, "%s", regnames[rn]);
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break;
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case L_16:
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case L_16U:
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outfn (stream, "%s", wregnames[rn]);
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break;
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case L_P:
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case L_32:
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outfn (stream, "%s", lregnames[rn]);
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break;
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}
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}
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else if ((x & MODE) == LOWREG)
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{
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switch (x & SIZE)
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{
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case L_8:
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/* Always take low half of reg. */
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outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
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break;
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case L_16:
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case L_16U:
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/* Always take low half of reg. */
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outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
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break;
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case L_P:
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case L_32:
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outfn (stream, "%s.l", lregnames[rn]);
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break;
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}
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}
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else if ((x & MODE) == POSTINC)
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{
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outfn (stream, "@%s+", pregnames[rn]);
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}
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else if ((x & MODE) == POSTDEC)
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{
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outfn (stream, "@%s-", pregnames[rn]);
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}
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else if ((x & MODE) == PREINC)
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{
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outfn (stream, "@+%s", pregnames[rn]);
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}
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else if ((x & MODE) == PREDEC)
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{
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outfn (stream, "@-%s", pregnames[rn]);
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}
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else if ((x & MODE) == IND)
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{
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outfn (stream, "@%s", pregnames[rn]);
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}
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else if ((x & MODE) == ABS || (x & ABSJMP))
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{
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outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);
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}
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else if ((x & MODE) == MEMIND)
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{
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outfn (stream, "@@%d (0x%x)", cst, cst);
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}
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else if ((x & MODE) == VECIND)
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{
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/* FIXME Multiplier should be 2 or 4, depending on processor mode,
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by which is meant "normal" vs. "middle", "advanced", "maximum". */
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int offset = (cst + 0x80) * 4;
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outfn (stream, "@@%d (0x%x)", offset, offset);
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}
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else if ((x & MODE) == PCREL)
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{
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if ((x & SIZE) == L_16 ||
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(x & SIZE) == L_16U)
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{
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outfn (stream, ".%s%d (0x%x)",
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(short) cst > 0 ? "+" : "",
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(short) cst,
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addr + (short) cst + len);
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}
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else
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{
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outfn (stream, ".%s%d (0x%x)",
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(char) cst > 0 ? "+" : "",
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(char) cst,
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addr + (char) cst + len);
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}
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}
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else if ((x & MODE) == DISP)
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{
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outfn (stream, "@(0x%x:%d,%s)", cst, cstlen,
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pregnames[rdisp_n]);
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}
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else if ((x & MODE) == INDEXB)
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{
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/* Always take low half of reg. */
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outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
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regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);
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}
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else if ((x & MODE) == INDEXW)
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{
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/* Always take low half of reg. */
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outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
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wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);
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}
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else if ((x & MODE) == INDEXL)
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{
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outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen,
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lregnames[rdisp_n]);
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}
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else if (x & CTRL)
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{
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outfn (stream, cregnames[rn]);
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}
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else if ((x & MODE) == CCR)
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{
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outfn (stream, "ccr");
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}
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else if ((x & MODE) == EXR)
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{
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outfn (stream, "exr");
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}
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else if ((x & MODE) == MACREG)
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{
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outfn (stream, "mac%c", cst ? 'l' : 'h');
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}
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else
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/* xgettext:c-format */
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outfn (stream, _("Hmmmm 0x%x"), x);
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}
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static unsigned int
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bfd_h8_disassemble (addr, info, mode)
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bfd_h8_disassemble (addr, info, mach)
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bfd_vma addr;
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disassemble_info *info;
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int mode;
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int mach;
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{
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/* Find the first entry in the table for this opcode. */
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static const char *regnames[] =
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{
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"r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
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"r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
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};
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static const char *wregnames[] =
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{
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
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};
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static const char *lregnames[] =
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{
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"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
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"er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
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};
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int rs = 0;
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int rd = 0;
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int rdisp = 0;
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int abs = 0;
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int bit = 0;
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int plen = 0;
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int regno[3] = { 0, 0, 0 };
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int dispregno[3] = { 0, 0, 0 };
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int cst[3] = { 0, 0, 0 };
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int cstlen[3] = { 0, 0, 0 };
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static bfd_boolean init = 0;
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const struct h8_instruction *qi;
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char const **pregnames = mode != 0 ? lregnames : wregnames;
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char const **pregnames = mach != 0 ? lregnames : wregnames;
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int status;
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int l;
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unsigned char data[20];
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unsigned int l;
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unsigned char data[MAX_CODE_NIBBLES];
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void *stream = info->stream;
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fprintf_ftype fprintf = info->fprintf_func;
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fprintf_ftype outfn = info->fprintf_func;
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if (!init)
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{
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@ -134,7 +410,7 @@ bfd_h8_disassemble (addr, info, mode)
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return -1;
|
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}
|
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|
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for (l = 2; status == 0 && l < 10; l += 2)
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for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
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status = info->read_memory_func (addr + l, data + l, 2, info);
|
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|
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/* Find the exact opcode/arg combo. */
|
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@ -147,9 +423,12 @@ bfd_h8_disassemble (addr, info, mode)
|
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while (1)
|
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{
|
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op_type looking_for = *nib;
|
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int thisnib = data[len >> 1];
|
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int thisnib = data[len / 2];
|
||||
int opnr;
|
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|
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thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib >> 4) & 0xf);
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thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
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opnr = ((looking_for & OP3) == OP3 ? 2
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: (looking_for & DST) == DST ? 1 : 0);
|
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|
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if (looking_for < 16 && looking_for >= 0)
|
||||
{
|
||||
@ -160,21 +439,78 @@ bfd_h8_disassemble (addr, info, mode)
|
||||
{
|
||||
if ((int) looking_for & (int) B31)
|
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{
|
||||
if (!(((int) thisnib & 0x8) != 0))
|
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if (!((thisnib & 0x8) != 0))
|
||||
goto fail;
|
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|
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looking_for = (op_type) ((int) looking_for & ~(int) B31);
|
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thisnib &= 0x7;
|
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}
|
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|
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if ((int) looking_for & (int) B30)
|
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else if ((int) looking_for & (int) B30)
|
||||
{
|
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if (!(((int) thisnib & 0x8) == 0))
|
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if (!((thisnib & 0x8) == 0))
|
||||
goto fail;
|
||||
|
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looking_for = (op_type) ((int) looking_for & ~(int) B30);
|
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}
|
||||
|
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if (looking_for & DBIT)
|
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if ((int) looking_for & (int) B21)
|
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{
|
||||
if (!((thisnib & 0x4) != 0))
|
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goto fail;
|
||||
|
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looking_for = (op_type) ((int) looking_for & ~(int) B21);
|
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thisnib &= 0xb;
|
||||
}
|
||||
else if ((int) looking_for & (int) B20)
|
||||
{
|
||||
if (!((thisnib & 0x4) == 0))
|
||||
goto fail;
|
||||
|
||||
looking_for = (op_type) ((int) looking_for & ~(int) B20);
|
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}
|
||||
if ((int) looking_for & (int) B11)
|
||||
{
|
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if (!((thisnib & 0x2) != 0))
|
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goto fail;
|
||||
|
||||
looking_for = (op_type) ((int) looking_for & ~(int) B11);
|
||||
thisnib &= 0xd;
|
||||
}
|
||||
else if ((int) looking_for & (int) B10)
|
||||
{
|
||||
if (!((thisnib & 0x2) == 0))
|
||||
goto fail;
|
||||
|
||||
looking_for = (op_type) ((int) looking_for & ~(int) B10);
|
||||
}
|
||||
|
||||
if ((int) looking_for & (int) B01)
|
||||
{
|
||||
if (!((thisnib & 0x1) != 0))
|
||||
goto fail;
|
||||
|
||||
looking_for = (op_type) ((int) looking_for & ~(int) B01);
|
||||
thisnib &= 0xe;
|
||||
}
|
||||
else if ((int) looking_for & (int) B00)
|
||||
{
|
||||
if (!((thisnib & 0x1) == 0))
|
||||
goto fail;
|
||||
|
||||
looking_for = (op_type) ((int) looking_for & ~(int) B00);
|
||||
}
|
||||
|
||||
if (looking_for & IGNORE)
|
||||
{
|
||||
/* Hitachi has declared that IGNORE must be zero. */
|
||||
if (thisnib != 0)
|
||||
goto fail;
|
||||
}
|
||||
else if ((looking_for & MODE) == DATA)
|
||||
{
|
||||
; /* Skip embedded data. */
|
||||
}
|
||||
else if ((looking_for & MODE) == DBIT)
|
||||
{
|
||||
/* Exclude adds/subs by looking at bit 0 and 2, and
|
||||
make sure the operand size, either w or l,
|
||||
@ -182,45 +518,98 @@ bfd_h8_disassemble (addr, info, mode)
|
||||
if ((looking_for & 7) != (thisnib & 7))
|
||||
goto fail;
|
||||
|
||||
abs = (thisnib & 0x8) ? 2 : 1;
|
||||
cst[opnr] = (thisnib & 0x8) ? 2 : 1;
|
||||
}
|
||||
else if (looking_for & (REG | IND | INC | DEC))
|
||||
else if ((looking_for & MODE) == DISP ||
|
||||
(looking_for & MODE) == ABS ||
|
||||
(looking_for & MODE) == PCREL ||
|
||||
(looking_for & MODE) == INDEXB ||
|
||||
(looking_for & MODE) == INDEXW ||
|
||||
(looking_for & MODE) == INDEXL)
|
||||
{
|
||||
if (looking_for & SRC)
|
||||
rs = thisnib;
|
||||
else
|
||||
rd = thisnib;
|
||||
extract_immediate (stream, looking_for, thisnib,
|
||||
data + len / 2, cst + opnr,
|
||||
cstlen + opnr, q);
|
||||
/* Even address == bra, odd == bra/s. */
|
||||
if (q->how == O (O_BRAS, SB))
|
||||
cst[opnr] -= 1;
|
||||
}
|
||||
else if (looking_for & L_16)
|
||||
else if ((looking_for & MODE) == REG ||
|
||||
(looking_for & MODE) == LOWREG ||
|
||||
(looking_for & MODE) == IND ||
|
||||
(looking_for & MODE) == PREINC ||
|
||||
(looking_for & MODE) == POSTINC ||
|
||||
(looking_for & MODE) == PREDEC ||
|
||||
(looking_for & MODE) == POSTDEC)
|
||||
{
|
||||
abs = (data[len >> 1]) * 256 + data[(len + 2) >> 1];
|
||||
plen = 16;
|
||||
regno[opnr] = thisnib;
|
||||
}
|
||||
else if (looking_for & ABSJMP)
|
||||
else if (looking_for & CTRL) /* Control Register */
|
||||
{
|
||||
abs = (data[1] << 16) | (data[2] << 8) | (data[3]);
|
||||
}
|
||||
else if (looking_for & MEMIND)
|
||||
{
|
||||
abs = data[1];
|
||||
}
|
||||
else if (looking_for & L_32)
|
||||
{
|
||||
int i = len >> 1;
|
||||
thisnib &= 7;
|
||||
if (((looking_for & MODE) == CCR && (thisnib != C_CCR)) ||
|
||||
((looking_for & MODE) == EXR && (thisnib != C_EXR)) ||
|
||||
((looking_for & MODE) == MACH && (thisnib != C_MACH)) ||
|
||||
((looking_for & MODE) == MACL && (thisnib != C_MACL)) ||
|
||||
((looking_for & MODE) == VBR && (thisnib != C_VBR)) ||
|
||||
((looking_for & MODE) == SBR && (thisnib != C_SBR)))
|
||||
goto fail;
|
||||
if (((looking_for & MODE) == CCR_EXR &&
|
||||
(thisnib != C_CCR && thisnib != C_EXR)) ||
|
||||
((looking_for & MODE) == VBR_SBR &&
|
||||
(thisnib != C_VBR && thisnib != C_SBR)) ||
|
||||
((looking_for & MODE) == MACREG &&
|
||||
(thisnib != C_MACH && thisnib != C_MACL)))
|
||||
goto fail;
|
||||
if (((looking_for & MODE) == CC_EX_VB_SB &&
|
||||
(thisnib != C_CCR && thisnib != C_EXR &&
|
||||
thisnib != C_VBR && thisnib != C_SBR)))
|
||||
goto fail;
|
||||
|
||||
abs = (data[i] << 24)
|
||||
| (data[i + 1] << 16)
|
||||
| (data[i + 2] << 8)
|
||||
| (data[i + 3]);
|
||||
|
||||
plen = 32;
|
||||
regno[opnr] = thisnib;
|
||||
}
|
||||
else if (looking_for & L_24)
|
||||
else if ((looking_for & SIZE) == L_5)
|
||||
{
|
||||
int i = len >> 1;
|
||||
cst[opnr] = data[len / 2] & 31;
|
||||
cstlen[opnr] = 5;
|
||||
}
|
||||
else if ((looking_for & SIZE) == L_4)
|
||||
{
|
||||
cst[opnr] = thisnib;
|
||||
cstlen[opnr] = 4;
|
||||
}
|
||||
else if ((looking_for & SIZE) == L_16 ||
|
||||
(looking_for & SIZE) == L_16U)
|
||||
{
|
||||
cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
|
||||
cstlen[opnr] = 16;
|
||||
}
|
||||
else if ((looking_for & MODE) == MEMIND)
|
||||
{
|
||||
cst[opnr] = data[1];
|
||||
}
|
||||
else if ((looking_for & MODE) == VECIND)
|
||||
{
|
||||
cst[opnr] = data[1] & 0x7f;
|
||||
}
|
||||
else if ((looking_for & SIZE) == L_32)
|
||||
{
|
||||
int i = len / 2;
|
||||
|
||||
abs = (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
|
||||
plen = 24;
|
||||
cst[opnr] = ((data[i] << 24)
|
||||
| (data[i + 1] << 16)
|
||||
| (data[i + 2] << 8)
|
||||
| (data[i + 3]));
|
||||
|
||||
cstlen[opnr] = 32;
|
||||
}
|
||||
else if ((looking_for & SIZE) == L_24)
|
||||
{
|
||||
int i = len / 2;
|
||||
|
||||
cst[opnr] =
|
||||
(data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
|
||||
cstlen[opnr] = 24;
|
||||
}
|
||||
else if (looking_for & IGNORE)
|
||||
{
|
||||
@ -228,64 +617,67 @@ bfd_h8_disassemble (addr, info, mode)
|
||||
}
|
||||
else if (looking_for & DISPREG)
|
||||
{
|
||||
rdisp = thisnib;
|
||||
dispregno[opnr] = thisnib & 7;
|
||||
}
|
||||
else if (looking_for & KBIT)
|
||||
else if ((looking_for & MODE) == KBIT)
|
||||
{
|
||||
switch (thisnib)
|
||||
{
|
||||
case 9:
|
||||
abs = 4;
|
||||
cst[opnr] = 4;
|
||||
break;
|
||||
case 8:
|
||||
abs = 2;
|
||||
cst[opnr] = 2;
|
||||
break;
|
||||
case 0:
|
||||
abs = 1;
|
||||
cst[opnr] = 1;
|
||||
break;
|
||||
default:
|
||||
goto fail;
|
||||
}
|
||||
}
|
||||
else if (looking_for & L_8)
|
||||
else if ((looking_for & SIZE) == L_8)
|
||||
{
|
||||
plen = 8;
|
||||
abs = data[len >> 1];
|
||||
cstlen[opnr] = 8;
|
||||
cst[opnr] = data[len / 2];
|
||||
}
|
||||
else if (looking_for & L_3)
|
||||
else if ((looking_for & SIZE) == L_3 ||
|
||||
(looking_for & SIZE) == L_3NZ)
|
||||
{
|
||||
bit = thisnib & 0x7;
|
||||
cst[opnr] = thisnib & 0x7;
|
||||
if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
|
||||
goto fail;
|
||||
}
|
||||
else if (looking_for & L_2)
|
||||
else if ((looking_for & SIZE) == L_2)
|
||||
{
|
||||
plen = 2;
|
||||
abs = thisnib & 0x3;
|
||||
cstlen[opnr] = 2;
|
||||
cst[opnr] = thisnib & 0x3;
|
||||
}
|
||||
else if (looking_for & MACREG)
|
||||
else if ((looking_for & MODE) == MACREG)
|
||||
{
|
||||
abs = (thisnib == 3);
|
||||
cst[opnr] = (thisnib == 3);
|
||||
}
|
||||
else if (looking_for == E)
|
||||
else if (looking_for == (op_type) E)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < qi->length; i++)
|
||||
fprintf (stream, "%02x ", data[i]);
|
||||
outfn (stream, "%02x ", data[i]);
|
||||
|
||||
for (; i < 6; i++)
|
||||
fprintf (stream, " ");
|
||||
outfn (stream, " ");
|
||||
|
||||
fprintf (stream, "%s\t", q->name);
|
||||
outfn (stream, "%s\t", q->name);
|
||||
|
||||
/* Gross. Disgusting. */
|
||||
if (strcmp (q->name, "ldm.l") == 0)
|
||||
{
|
||||
int count, high;
|
||||
|
||||
count = (data[1] >> 4) & 0x3;
|
||||
high = data[3] & 0x7;
|
||||
count = (data[1] / 16) & 0x3;
|
||||
high = regno[1];
|
||||
|
||||
fprintf (stream, "@sp+,er%d-er%d", high - count, high);
|
||||
outfn (stream, "@sp+,er%d-er%d", high - count, high);
|
||||
return qi->length;
|
||||
}
|
||||
|
||||
@ -293,121 +685,71 @@ bfd_h8_disassemble (addr, info, mode)
|
||||
{
|
||||
int count, low;
|
||||
|
||||
count = (data[1] >> 4) & 0x3;
|
||||
low = data[3] & 0x7;
|
||||
count = (data[1] / 16) & 0x3;
|
||||
low = regno[0];
|
||||
|
||||
fprintf (stream, "er%d-er%d,@-sp", low, low + count);
|
||||
outfn (stream, "er%d-er%d,@-sp", low, low + count);
|
||||
return qi->length;
|
||||
}
|
||||
if (strcmp (q->name, "rte/l") == 0
|
||||
|| strcmp (q->name, "rts/l") == 0)
|
||||
{
|
||||
if (regno[0] == 0)
|
||||
outfn (stream, "er%d", regno[1]);
|
||||
else
|
||||
{
|
||||
outfn (stream, "(er%d-er%d)", regno[1] - regno[0],
|
||||
regno[1]);
|
||||
}
|
||||
return qi->length;
|
||||
}
|
||||
if (strncmp (q->name, "mova", 4) == 0)
|
||||
{
|
||||
op_type *args = q->args.nib;
|
||||
|
||||
if (args[1] == (op_type) E)
|
||||
{
|
||||
/* Short form. */
|
||||
print_one_arg (info, addr, args[0], cst[0],
|
||||
cstlen[0], dispregno[0], regno[0],
|
||||
pregnames, qi->length);
|
||||
outfn (stream, ",er%d", dispregno[0]);
|
||||
}
|
||||
else
|
||||
{
|
||||
outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
|
||||
print_one_arg (info, addr, args[1], cst[1],
|
||||
cstlen[1], dispregno[1], regno[1],
|
||||
pregnames, qi->length);
|
||||
outfn (stream, ".%c),",
|
||||
(args[0] & MODE) == INDEXB ? 'b' : 'w');
|
||||
print_one_arg (info, addr, args[2], cst[2],
|
||||
cstlen[2], dispregno[2], regno[2],
|
||||
pregnames, qi->length);
|
||||
}
|
||||
return qi->length;
|
||||
}
|
||||
/* Fill in the args. */
|
||||
{
|
||||
op_type *args = q->args.nib;
|
||||
int hadone = 0;
|
||||
int nargs;
|
||||
|
||||
while (*args != E)
|
||||
for (nargs = 0;
|
||||
nargs < 3 && args[nargs] != (op_type) E;
|
||||
nargs++)
|
||||
{
|
||||
int x = *args;
|
||||
int x = args[nargs];
|
||||
|
||||
if (hadone)
|
||||
fprintf (stream, ",");
|
||||
outfn (stream, ",");
|
||||
|
||||
if (x & L_3)
|
||||
{
|
||||
fprintf (stream, "#0x%x", (unsigned) bit);
|
||||
}
|
||||
else if (x & (IMM | KBIT | DBIT))
|
||||
{
|
||||
/* Bletch. For shal #2,er0 and friends. */
|
||||
if (*(args + 1) & SRC_IN_DST)
|
||||
abs = 2;
|
||||
|
||||
fprintf (stream, "#0x%x", (unsigned) abs);
|
||||
}
|
||||
else if (x & REG)
|
||||
{
|
||||
int rn = (x & DST) ? rd : rs;
|
||||
|
||||
switch (x & SIZE)
|
||||
{
|
||||
case L_8:
|
||||
fprintf (stream, "%s", regnames[rn]);
|
||||
break;
|
||||
case L_16:
|
||||
fprintf (stream, "%s", wregnames[rn]);
|
||||
break;
|
||||
case L_P:
|
||||
case L_32:
|
||||
fprintf (stream, "%s", lregnames[rn]);
|
||||
break;
|
||||
}
|
||||
}
|
||||
else if (x & MACREG)
|
||||
{
|
||||
fprintf (stream, "mac%c", abs ? 'l' : 'h');
|
||||
}
|
||||
else if (x & INC)
|
||||
{
|
||||
fprintf (stream, "@%s+", pregnames[rs]);
|
||||
}
|
||||
else if (x & DEC)
|
||||
{
|
||||
fprintf (stream, "@-%s", pregnames[rd]);
|
||||
}
|
||||
else if (x & IND)
|
||||
{
|
||||
int rn = (x & DST) ? rd : rs;
|
||||
fprintf (stream, "@%s", pregnames[rn]);
|
||||
}
|
||||
else if (x & ABS8MEM)
|
||||
{
|
||||
fprintf (stream, "@0x%x:8", (unsigned) abs);
|
||||
}
|
||||
else if (x & (ABS | ABSJMP))
|
||||
{
|
||||
fprintf (stream, "@0x%x:%d", (unsigned) abs, plen);
|
||||
}
|
||||
else if (x & MEMIND)
|
||||
{
|
||||
fprintf (stream, "@@%d (%x)", abs, abs);
|
||||
}
|
||||
else if (x & PCREL)
|
||||
{
|
||||
if (x & L_16)
|
||||
{
|
||||
abs += 2;
|
||||
fprintf (stream,
|
||||
".%s%d (%x)",
|
||||
(short) abs > 0 ? "+" : "",
|
||||
(short) abs, addr + (short) abs + 2);
|
||||
}
|
||||
else
|
||||
{
|
||||
fprintf (stream,
|
||||
".%s%d (%x)",
|
||||
(char) abs > 0 ? "+" : "",
|
||||
(char) abs, addr + (char) abs + 2);
|
||||
}
|
||||
}
|
||||
else if (x & DISP)
|
||||
{
|
||||
fprintf (stream, "@(0x%x:%d,%s)",
|
||||
abs, plen, pregnames[rdisp]);
|
||||
}
|
||||
else if (x & CCR)
|
||||
{
|
||||
fprintf (stream, "ccr");
|
||||
}
|
||||
else if (x & EXR)
|
||||
{
|
||||
fprintf (stream, "exr");
|
||||
}
|
||||
else
|
||||
/* xgettext:c-format */
|
||||
fprintf (stream, _("Hmmmm %x"), x);
|
||||
print_one_arg (info, addr, x,
|
||||
cst[nargs], cstlen[nargs],
|
||||
dispregno[nargs], regno[nargs],
|
||||
pregnames, qi->length);
|
||||
|
||||
hadone = 1;
|
||||
args++;
|
||||
}
|
||||
}
|
||||
|
||||
@ -415,7 +757,7 @@ bfd_h8_disassemble (addr, info, mode)
|
||||
}
|
||||
else
|
||||
/* xgettext:c-format */
|
||||
fprintf (stream, _("Don't understand %x \n"), looking_for);
|
||||
outfn (stream, _("Don't understand 0x%x \n"), looking_for);
|
||||
}
|
||||
|
||||
len++;
|
||||
@ -427,7 +769,7 @@ bfd_h8_disassemble (addr, info, mode)
|
||||
}
|
||||
|
||||
/* Fell off the end. */
|
||||
fprintf (stream, "%02x %02x .word\tH'%x,H'%x",
|
||||
outfn (stream, "%02x %02x .word\tH'%x,H'%x",
|
||||
data[0], data[1],
|
||||
data[0], data[1]);
|
||||
return 2;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user