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ubsan: fr30: left shift of negative value

Browse Source 
cpu/
	* fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
	left shift signed values.
opcodes/
	* fr30-ibld.c: Regenerate.
This commit is contained in:
Alan Modra 2020-01-11 12:32:11 +10:30
parent 7ef412cf72
commit 202e762b32
4 changed files with 19 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
cpu/ChangeLog
View File

@ -1,3 +1,8 @@
2020-01-13 Alan Modra <amodra@gmail.com>
* fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
left shift signed values.
2020-01-06 Alan Modra <amodra@gmail.com>
* m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign

10
cpu/fr30.cpu
View File

@ -193,15 +193,15 @@
(df f-disp8 "8 bit signed offset" () 4 8 INT #f #f)
(df f-disp9 "9 bit signed offset" () 4 8 INT
((value pc) (sra WI value (const 1)))
((value pc) (sll WI value (const 1)))
((value pc) (mul WI value (const 2)))
)
(df f-disp10 "10 bit signed offset" () 4 8 INT
((value pc) (sra WI value (const 2)))
((value pc) (sll WI value (const 2)))
((value pc) (mul WI value (const 4)))
)
(df f-s10 "10 bit signed offset" () 8 8 INT
((value pc) (sra WI value (const 2)))
((value pc) (sll WI value (const 2)))
((value pc) (mul WI value (const 4)))
)
(df f-u10 "10 bit unsigned offset" () 8 8 UINT
((value pc) (srl UWI value (const 2)))
@ -209,7 +209,7 @@
)
(df f-rel9 "9 pc relative signed offset" (PCREL-ADDR) 8 8 INT
((value pc) (sra WI (sub WI value (add WI pc (const 2))) (const 1)))
((value pc) (add WI (sll WI value (const 1)) (add WI pc (const 2))))
((value pc) (add WI (mul WI value (const 2)) (add WI pc (const 2))))
)
(dnf f-dir8 "8 bit direct address" () 8 8)
(df f-dir9 "9 bit direct address" () 8 8 UINT
@ -222,7 +222,7 @@
)
(df f-rel12 "12 bit pc relative signed offset" (PCREL-ADDR) 5 11 INT
((value pc) (sra WI (sub WI value (add WI pc (const 2))) (const 1)))
((value pc) (add WI (sll WI value (const 1)) (add WI pc (const 2))))
((value pc) (add WI (mul WI value (const 2)) (add WI pc (const 2))))
)
(dnf f-reglist_hi_st "8 bit register mask for stm" () 8 8)

4
opcodes/ChangeLog
View File

@ -1,3 +1,7 @@
2020-01-13 Alan Modra <amodra@gmail.com>
* fr30-ibld.c: Regenerate.
2020-01-13 Alan Modra <amodra@gmail.com>
* xgate-dis.c (print_insn): Don't left shift signed value.

10
opcodes/fr30-ibld.c
View File

@ -831,7 +831,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
value = ((value) << (2));
value = ((value) * (4));
fields->f_disp10 = value;
}
break;
@ -842,7 +842,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
value = ((value) << (1));
value = ((value) * (2));
fields->f_disp9 = value;
}
break;
@ -867,7 +867,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, pc, & value);
value = ((((value) << (1))) + (((pc) + (2))));
value = ((((value) * (2))) + (((pc) + (2))));
fields->f_rel12 = value;
}
break;
@ -875,7 +875,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, pc, & value);
value = ((((value) << (1))) + (((pc) + (2))));
value = ((((value) * (2))) + (((pc) + (2))));
fields->f_rel9 = value;
}
break;
@ -905,7 +905,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, pc, & value);
value = ((value) << (2));
value = ((value) * (4));
fields->f_s10 = value;
}
break;