Wed Sep 4 11:24:29 1996 James G. Smith <jsmith@cygnus.co.uk>

* config/tc-mips.c (load_register): Remove unnecessary code that
 	was causing the high 32bits of 64bit constants to be lost.

Fixes PR10503. The compiler was producing the assembler code:
	dli $3,0xfffffffffffff
when constructing the softfloat library. Unfortunately it was being
incorrectly assembled.
This commit is contained in:
Jackie Smith Cashion 1996-09-04 13:15:28 +00:00
parent 8719be26c4
commit 1b68deb599
6 changed files with 92 additions and 13 deletions

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@ -1,3 +1,15 @@
Wed Sep 4 11:24:29 1996 James G. Smith <jsmith@cygnus.co.uk>
* config/tc-mips.c (load_register): Remove unnecessary code that
was causing the high 32bits of 64bit constants to be lost.
start-sanitize-d10v
Tue Sep 3 13:52:56 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* config/tc-d10v.c: Added changes to support function
pointers and "@word" syntax.
end-sanitize-d10v
start-sanitize-v850
Tue Sep 3 11:57:18 1996 Jeffrey A Law (law@cygnus.com)

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@ -1921,19 +1921,6 @@ load_register (counter, reg, ep, dbl)
(int) BFD_RELOC_LO16);
return;
}
else
{
/* 32 bit value with high bit set being loaded into a 64 bit
register. We can't use lui, because that would
incorrectly set the 32 high bits. */
generic_bignum[3] = 0;
generic_bignum[2] = 0;
generic_bignum[1] = (ep->X_add_number >> 16) & 0xffff;
generic_bignum[0] = ep->X_add_number & 0xffff;
tmp.X_op = O_big;
tmp.X_add_number = 4;
ep = &tmp;
}
}
/* The value is larger than 32 bits. */

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@ -1,6 +1,17 @@
Wed Sep 4 11:47:29 1996 James G. Smith <jsmith@cygnus.co.uk>
* gas/mips/mips.exp: Add check for dli macro instruction.
* gas/mips/dli.{s,d}: Added.
start-sanitize-v850
Sat Aug 31 01:25:03 1996 Jeffrey A Law (law@cygnus.com)
* gas/v850/basic.exp (do_mem): Check bit patterns for short
load/store instructions. Remove xfails for short load/store
instructions.
* gas/v850/mem.s: Offsets for short load/store operands
are unsigned.
* gas/v850/basic.exp (do_branch): Check offsets in branch insns.
(do_jumps): Likewise.

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@ -43,6 +43,8 @@ bltu.s
div-ilocks.d
div.d
div.s
dli.d
dli.s
jal-empic.d
jal-svr4pic.d
jal-svr4pic.s

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@ -0,0 +1,48 @@
#objdump: -dr
#name: MIPS dli
#as: -mips3
# Test the dli macro.
.*: +file format .*mips.*
No symbols in .*
Disassembly of section .text:
0+0000 li \$a0,0
0+0004 li \$a0,1
0+0008 li \$a0,-1
0+000c li \$a0,0x8000
0+0010 li \$a0,-32768
0+0014 lui \$a0,0x1
0+0018 lui \$a0,0x1
0+001c ori \$a0,\$a0,0xa5a5
0+0020 li \$a0,0x8000
0+0024 dsll \$a0,\$a0,0x10
0+0028 ori \$a0,\$a0,0x1234
0+002c lui \$a0,0xffff
0+0030 dsrl32 \$a1,\$a0,0x0
0+0034 lui \$a0,0xffff
0+0038 dsrl32 \$a1,\$a0,0x0
0+003c li \$a0,-1
0+0040 lui \$a0,0xf
0+0044 ori \$a0,\$a0,0xffff
0+0048 dsll \$a0,\$a0,0x10
0+004c ori \$a0,\$a0,0xffff
0+0050 dsll \$a0,\$a0,0x10
0+0054 ori \$a0,\$a0,0xffff
0+0058 lui \$a0,0x8000
0+005c ori \$a0,\$a0,0x1234
0+0060 li \$a0,-32768
0+0064 dsll \$a0,\$a0,0x10
0+0068 ori \$a0,\$a0,0x1234
0+006c dsll \$a0,\$a0,0x10
0+0070 ori \$a0,\$a0,0x5678
0+0074 lui \$a0,0x8000
0+0078 ori \$a0,\$a0,0x1234
0+007c dsll \$a0,\$a0,0x10
0+0080 ori \$a0,\$a0,0x5678
0+0084 dsll \$a0,\$a0,0x10
0+0088 li \$a0,-30875
0+008c lui \$a0,0xffff
0+0090 ori \$a0,\$a0,0x4321
...

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@ -0,0 +1,19 @@
# Source file used to test the dli macro.
dli $4,0
dli $4,1
dli $4,-1
dli $4,0x8000
dli $4,-0x8000
dli $4,0x10000
dli $4,0x1a5a5
dli $4,0x80001234
dli $4,0xffffffff
dli $4,0x00000000ffffffff
dli $4,0xffffffffffffffff
dli $4,0x000fffffffffffff
dli $4,0xffffffff80001234
dli $4,0xffff800012345678
dli $4,0x8000123456780000
dli $4,0xffffffffffff8765
dli $4,0xffffffffffff4321