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MIPS/opcodes: Correct mixed MIPS16 and microMIPS disassembly
Mixing MIPS16 and microMIPS code in a single binary isn't usually supported but GAS happily produces such code if requested. However it is not correctly disassembled even if a symbol table is available and function symbols are correctly anotated with the ISA mode. This is because the ELF-header global microMIPS ASE flag takes precedence over MIPS16 function annotation, causing them to be treated as regular MIPS code. Correct the problem by respecting function symbol anotation regardless of the ELF-header flag. binutils/ * testsuite/binutils-all/mips/mixed-mips16-micromips.d: New test. * testsuite/binutils-all/mips/mixed-mips16-micromips.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new test. opcodes/ * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand, replacing references to `micromips_ase' throughout. (_print_insn_mips): Don't use file-level microMIPS annotation to determine the disassembly mode with the symbol table.
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@ -1,3 +1,10 @@
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2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
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* testsuite/binutils-all/mips/mixed-mips16-micromips.d: New test.
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* testsuite/binutils-all/mips/mixed-mips16-micromips.s: New test
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source.
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* testsuite/binutils-all/mips/mips.exp: Run the new test.
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2016-05-18 Nick Clifton <nickc@redhat.com>
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* po/sv.po: Updated Swedish translation.
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@ -22,5 +22,6 @@ if ![istarget mips*-*-*] {
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if [is_elf_format] {
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run_dump_test "mixed-mips16"
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run_dump_test "mixed-micromips"
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run_dump_test "mixed-mips16-micromips"
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run_dump_test "mips16-undecoded"
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}
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@ -0,0 +1,30 @@
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#PROG: objcopy
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#objdump: -drt
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#name: Mixed MIPS16 and microMIPS disassembly
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# Test mixed-mode compressed disassembly.
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.*: +file format .*mips.*
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SYMBOL TABLE:
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#...
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[0-9a-f]+ g +F +\.text 0+00000c 0xf0 foo
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#...
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[0-9a-f]+ g +F +\.text 0+00000c 0x80 bar
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Disassembly of section \.text:
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[0-9a-f]+ <foo>:
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+[0-9a-f]+: b202 lw v0,8 <\.foo\.data>
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+[0-9a-f]+: 9a60 lw v1,0\(v0\)
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+[0-9a-f]+: eb00 jr v1
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+[0-9a-f]+: 653b move t9,v1
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[0-9a-f]+ <\.foo\.data>:
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+[0-9a-f]+: 4040 4040 0000 0000 @@@@\.\.\.\.
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[0-9a-f]+ <bar>:
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+[0-9a-f]+: 41a3 0000 lui v1,0x0
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+[0-9a-f]+: ff23 0000 lw t9,0\(v1\)
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+[0-9a-f]+: 45b9 jrc t9
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+[0-9a-f]+: 0c00 nop
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\.\.\.
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@ -0,0 +1,32 @@
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.align 4, 0
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.set mips16
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.globl foo
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.ent foo
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foo:
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lw $v0, .foo.data
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lw $v1, 0($v0)
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move $t9, $v1
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jr $v1
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.type .foo.data, @object
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.foo.data:
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.word 0x40404040
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.size .foo.data, . - .foo.data
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.end foo
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.set nomips16
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.align 4, 0
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.set micromips
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.globl bar
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.ent bar
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bar:
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lui $v1, 0
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lw $t9, 0($v1)
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jrc $t9
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nop
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.end bar
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.set nomicromips
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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@ -1,3 +1,10 @@
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2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
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* mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
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replacing references to `micromips_ase' throughout.
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(_print_insn_mips): Don't use file-level microMIPS annotation to
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determine the disassembly mode with the symbol table.
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2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
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* ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
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@ -2268,33 +2268,33 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
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}
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/* Return 1 if a symbol associated with the location being disassembled
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indicates a compressed (MIPS16 or microMIPS) mode. We iterate over
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all the symbols at the address being considered assuming if at least
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one of them indicates code compression, then such code has been
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genuinely produced here (other symbols could have been derived from
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function symbols defined elsewhere or could define data). Otherwise,
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return 0. */
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indicates a compressed mode, either MIPS16 or microMIPS, according to
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MICROMIPS_P. We iterate over all the symbols at the address being
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considered assuming if at least one of them indicates code compression,
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then such code has been genuinely produced here (other symbols could
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have been derived from function symbols defined elsewhere or could
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define data). Otherwise, return 0. */
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static bfd_boolean
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is_compressed_mode_p (struct disassemble_info *info)
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is_compressed_mode_p (struct disassemble_info *info, bfd_boolean micromips_p)
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{
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int i;
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int l;
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for (i = info->symtab_pos, l = i + info->num_symbols; i < l; i++)
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if (((info->symtab[i])->flags & BSF_SYNTHETIC) != 0
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&& ((!micromips_ase
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&& ((!micromips_p
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&& ELF_ST_IS_MIPS16 ((*info->symbols)->udata.i))
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|| (micromips_ase
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|| (micromips_p
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&& ELF_ST_IS_MICROMIPS ((*info->symbols)->udata.i))))
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return 1;
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else if (bfd_asymbol_flavour (info->symtab[i]) == bfd_target_elf_flavour
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&& info->symtab[i]->section == info->section)
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{
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elf_symbol_type *symbol = (elf_symbol_type *) info->symtab[i];
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if ((!micromips_ase
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if ((!micromips_p
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&& ELF_ST_IS_MIPS16 (symbol->internal_elf_sym.st_other))
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|| (micromips_ase
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|| (micromips_p
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&& ELF_ST_IS_MICROMIPS (symbol->internal_elf_sym.st_other)))
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return 1;
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}
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@ -2313,7 +2313,6 @@ _print_insn_mips (bfd_vma memaddr,
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struct disassemble_info *info,
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enum bfd_endian endianness)
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{
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int (*print_insn_compr) (bfd_vma, struct disassemble_info *);
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bfd_byte buffer[INSNLEN];
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int status;
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@ -2325,18 +2324,23 @@ _print_insn_mips (bfd_vma memaddr,
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if (info->mach == bfd_mach_mips_micromips)
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return print_insn_micromips (memaddr, info);
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print_insn_compr = !micromips_ase ? print_insn_mips16 : print_insn_micromips;
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#if 1
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/* FIXME: If odd address, this is CLEARLY a compressed instruction. */
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/* Only a few tools will work this way. */
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if (memaddr & 0x01)
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return print_insn_compr (memaddr, info);
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{
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if (micromips_ase)
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return print_insn_micromips (memaddr, info);
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else
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return print_insn_mips16 (memaddr, info);
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}
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#endif
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#if SYMTAB_AVAILABLE
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if (is_compressed_mode_p (info))
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return print_insn_compr (memaddr, info);
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if (is_compressed_mode_p (info, TRUE))
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return print_insn_micromips (memaddr, info);
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if (is_compressed_mode_p (info, FALSE))
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return print_insn_mips16 (memaddr, info);
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#endif
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status = (*info->read_memory_func) (memaddr, buffer, INSNLEN, info);
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