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Use signed data type for R_XTENSA_DIFF* relocation offsets.
R_XTENSA_DIFF relocation offsets are in fact signed. Treat them as such. Add testcase that examines ld behaviour on R_XTENSA_DIFF relocation changing sign during relaxation. 2014-05-02 Volodymyr Arbatov <arbatov@cadence.com> David Weatherford <weath@cadence.com> Max Filippov <jcmvbkbc@gmail.com> bfd/ * elf32-xtensa.c (relax_section): treat R_XTENSA_DIFF* relocations as signed. gas/ * config/tc-xtensa.c (md_apply_fix): mark BFD_RELOC_XTENSA_DIFF* fixups as signed. ld/testsuite/ * ld-xtensa/diff_overflow.exp, * ld-xtensa/diff_overflow1.s, * ld-xtensa/diff_overflow2.s: Add test for DIFF* relocation signedness and overflow checking.
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@ -1,3 +1,10 @@
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2014-05-02 Volodymyr Arbatov <arbatov@cadence.com>
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David Weatherford <weath@cadence.com>
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Max Filippov <jcmvbkbc@gmail.com>
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* elf32-xtensa.c (relax_section): treat R_XTENSA_DIFF* relocations as
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signed.
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2014-05-07 Andreas Tobler <andreast@fgznet.ch>
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* config.bfd: Add proper arm config for *-*-freebsd*.
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@ -222,11 +222,11 @@ static reloc_howto_type elf_howto_table[] =
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FALSE, 0, 0, FALSE),
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/* Relocations for supporting difference of symbols. */
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HOWTO (R_XTENSA_DIFF8, 0, 0, 8, FALSE, 0, complain_overflow_bitfield,
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HOWTO (R_XTENSA_DIFF8, 0, 0, 8, FALSE, 0, complain_overflow_signed,
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bfd_elf_xtensa_reloc, "R_XTENSA_DIFF8", FALSE, 0, 0xff, FALSE),
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HOWTO (R_XTENSA_DIFF16, 0, 1, 16, FALSE, 0, complain_overflow_bitfield,
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HOWTO (R_XTENSA_DIFF16, 0, 1, 16, FALSE, 0, complain_overflow_signed,
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bfd_elf_xtensa_reloc, "R_XTENSA_DIFF16", FALSE, 0, 0xffff, FALSE),
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HOWTO (R_XTENSA_DIFF32, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
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HOWTO (R_XTENSA_DIFF32, 0, 2, 32, FALSE, 0, complain_overflow_signed,
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bfd_elf_xtensa_reloc, "R_XTENSA_DIFF32", FALSE, 0, 0xffffffff, FALSE),
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/* General immediate operand relocations. */
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@ -9013,7 +9013,8 @@ relax_section (bfd *abfd, asection *sec, struct bfd_link_info *link_info)
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|| r_type == R_XTENSA_DIFF16
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|| r_type == R_XTENSA_DIFF32)
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{
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bfd_vma diff_value = 0, new_end_offset, diff_mask = 0;
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bfd_signed_vma diff_value = 0;
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bfd_vma new_end_offset, diff_mask = 0;
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if (bfd_get_section_limit (abfd, sec) < old_source_offset)
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{
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@ -9027,15 +9028,15 @@ relax_section (bfd *abfd, asection *sec, struct bfd_link_info *link_info)
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{
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case R_XTENSA_DIFF8:
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diff_value =
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bfd_get_8 (abfd, &contents[old_source_offset]);
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bfd_get_signed_8 (abfd, &contents[old_source_offset]);
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break;
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case R_XTENSA_DIFF16:
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diff_value =
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bfd_get_16 (abfd, &contents[old_source_offset]);
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bfd_get_signed_16 (abfd, &contents[old_source_offset]);
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break;
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case R_XTENSA_DIFF32:
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diff_value =
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bfd_get_32 (abfd, &contents[old_source_offset]);
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bfd_get_signed_32 (abfd, &contents[old_source_offset]);
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break;
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}
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@ -9047,24 +9048,25 @@ relax_section (bfd *abfd, asection *sec, struct bfd_link_info *link_info)
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switch (r_type)
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{
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case R_XTENSA_DIFF8:
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diff_mask = 0xff;
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bfd_put_8 (abfd, diff_value,
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diff_mask = 0x7f;
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bfd_put_signed_8 (abfd, diff_value,
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&contents[old_source_offset]);
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break;
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case R_XTENSA_DIFF16:
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diff_mask = 0xffff;
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bfd_put_16 (abfd, diff_value,
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diff_mask = 0x7fff;
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bfd_put_signed_16 (abfd, diff_value,
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&contents[old_source_offset]);
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break;
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case R_XTENSA_DIFF32:
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diff_mask = 0xffffffff;
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bfd_put_32 (abfd, diff_value,
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diff_mask = 0x7fffffff;
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bfd_put_signed_32 (abfd, diff_value,
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&contents[old_source_offset]);
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break;
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}
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/* Check for overflow. */
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if ((diff_value & ~diff_mask) != 0)
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/* Check for overflow. Sign bits must be all zeroes or all ones */
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if ((diff_value & ~diff_mask) != 0 &&
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(diff_value & ~diff_mask) != (-1 & ~diff_mask))
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{
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(*link_info->callbacks->reloc_dangerous)
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(link_info, _("overflow after relaxation"),
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@ -1,3 +1,8 @@
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2014-05-02 Max Filippov <jcmvbkbc@gmail.com>
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* config/tc-xtensa.c (md_apply_fix): mark BFD_RELOC_XTENSA_DIFF*
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fixups as signed.
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2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
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* tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3
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@ -5867,12 +5867,15 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
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{
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case BFD_RELOC_8:
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fixP->fx_r_type = BFD_RELOC_XTENSA_DIFF8;
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fixP->fx_signed = 1;
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break;
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case BFD_RELOC_16:
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fixP->fx_r_type = BFD_RELOC_XTENSA_DIFF16;
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fixP->fx_signed = 1;
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break;
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case BFD_RELOC_32:
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fixP->fx_r_type = BFD_RELOC_XTENSA_DIFF32;
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fixP->fx_signed = 1;
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break;
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default:
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break;
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@ -1,3 +1,9 @@
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2014-05-02 Max Filippov <jcmvbkbc@gmail.com>
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* ld-xtensa/diff_overflow.exp, * ld-xtensa/diff_overflow1.s,
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* ld-xtensa/diff_overflow2.s: Add test for DIFF* relocation
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signedness and overflow checking.
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2014-05-01 Hans-Peter Nilsson <hp@bitrange.com>
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* ld-mmix/sec-11.d, ld-mmix/sec-11.ld, ld-mmix/sec-10.s,
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45
ld/testsuite/ld-xtensa/diff_overflow.exp
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45
ld/testsuite/ld-xtensa/diff_overflow.exp
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@ -0,0 +1,45 @@
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# Test DIFF* relocation signedness and overflow checking
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# By Max Filippov, Cadence Design Systems, Inc.
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# Copyright (C) 2014 Free Software Foundation, Inc.
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#
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# This file is part of the GNU Binutils.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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# MA 02110-1301, USA.
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if ![istarget "xtensa*-*-*"] {
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return
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}
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set testname "DIFF_OVERFLOW"
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if ![ld_assemble $as "--text-section-literals $srcdir/$subdir/diff_overflow1.s" tmpdir/diff_overflow1.o] {
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unresolved $testname
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return
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}
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if ![ld_assemble $as "--text-section-literals $srcdir/$subdir/diff_overflow2.s" tmpdir/diff_overflow2.o] {
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unresolved $testname
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return
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}
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set object "tmpdir/diff_overflow"
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if ![ld_simple_link $ld $object "tmpdir/diff_overflow1.o tmpdir/diff_overflow2.o"] {
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verbose -log "failure in ld"
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fail $testname
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return
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}
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pass $testname
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27
ld/testsuite/ld-xtensa/diff_overflow1.s
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27
ld/testsuite/ld-xtensa/diff_overflow1.s
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.section .text.f0,"axG",@progbits,f0,comdat
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.literal_position
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.literal .L0, 0
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.align 4
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f0:
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entry a1, 32
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l32r a2, .L0
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retw
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.section .text
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.literal_position
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.global _start
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_start:
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entry a1, 32
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retw
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.section .text.f1,"axG",@progbits,f1,comdat
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.literal_position
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.literal .L1, 0
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.literal .L2, 0
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.align 4
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.global f1
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f1:
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entry a1, 32
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l32r a2, .L1
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l32r a3, .L2
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retw
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ld/testsuite/ld-xtensa/diff_overflow2.s
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22
ld/testsuite/ld-xtensa/diff_overflow2.s
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@ -0,0 +1,22 @@
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.section .text.f1,"axG",@progbits,f1,comdat
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.literal_position
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.literal .L5, 0
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.align 4
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f4:
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entry a1, 32
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.Lf4:
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l32r a2, .L5
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l32r a2, .L5
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nop
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nop
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retw
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.section .text
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f5:
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entry a1, 32
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.Lf5:
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retw
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.section .debug_frame,"",@progbits
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.byte .Lf4 - f4
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.byte .Lf5 - f5
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