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2001-01-15 Kazu Hirata <kazu@hxi.com>
* config/tc-m68hc11.c: Fix formatting.
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@ -1,3 +1,7 @@
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2001-01-15 Kazu Hirata <kazu@hxi.com>
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* config/tc-m68hc11.c: Fix formatting.
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2001-01-15 Nick Clifton <nickc@redhat.com>
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* symbols.c (colon): Change 'already defined symbol' from a
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@ -61,8 +61,7 @@ const char FLT_CHARS[] = "dD";
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How many bytes this mode will add to the size of the frag.
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Which mode to go to if the offset won't fit in this one. */
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relax_typeS md_relax_table[] =
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{
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relax_typeS md_relax_table[] = {
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{1, 1, 0, 0}, /* First entries aren't used. */
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{1, 1, 0, 0}, /* For no good reason except. */
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{1, 1, 0, 0}, /* that the VAX doesn't either. */
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@ -105,8 +104,7 @@ relax_typeS md_relax_table[] =
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};
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/* 68HC11 and 68HC12 registers. They are numbered according to the 68HC12. */
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typedef enum register_id
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{
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typedef enum register_id {
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REG_NONE = -1,
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REG_A = 0,
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REG_B = 1,
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@ -118,16 +116,14 @@ typedef enum register_id
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REG_PC = 8
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} register_id;
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typedef struct operand
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{
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typedef struct operand {
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expressionS exp;
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register_id reg1;
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register_id reg2;
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int mode;
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} operand;
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struct m68hc11_opcode_def
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{
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struct m68hc11_opcode_def {
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long format;
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int min_operands;
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int max_operands;
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@ -139,15 +135,12 @@ struct m68hc11_opcode_def
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static struct m68hc11_opcode_def *m68hc11_opcode_defs = 0;
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static int m68hc11_nb_opcode_defs = 0;
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typedef struct alias
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{
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typedef struct alias {
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const char *name;
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const char *alias;
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}
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alias;
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} alias;
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static alias alias_opcodes[] =
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{
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static alias alias_opcodes[] = {
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{"cpd", "cmpd"},
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{"cpx", "cmpx"},
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{"cpy", "cmpy"},
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@ -227,8 +220,7 @@ static struct m68hc11_opcode *m68hc11_sorted_opcodes;
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pseudo-op name without dot
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function to call to execute this pseudo-op
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Integer arg to pass to the function. */
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const pseudo_typeS md_pseudo_table[] =
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{
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const pseudo_typeS md_pseudo_table[] = {
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/* The following pseudo-ops are supported for MRI compatibility. */
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{"fcb", cons, 1},
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{"fdb", cons, 2},
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@ -244,8 +236,7 @@ const pseudo_typeS md_pseudo_table[] =
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CONST char *md_shortopts = "Sm:";
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struct option md_longopts[] =
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{
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struct option md_longopts[] = {
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#define OPTION_FORCE_LONG_BRANCH (OPTION_MD_BASE)
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{"force-long-branchs", no_argument, NULL, OPTION_FORCE_LONG_BRANCH},
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@ -1073,8 +1064,8 @@ get_operand (oper, which, opmode)
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if (*p == ',')
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{
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int possible_mode = M6811_OP_NONE;
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char *old_input_line;
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int possible_mode = M6811_OP_NONE;
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char *old_input_line;
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p++;
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/* 68HC12 pre increment or decrement. */
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@ -1092,27 +1083,27 @@ get_operand (oper, which, opmode)
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}
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p = skip_whites (p);
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}
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old_input_line = input_line_pointer;
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old_input_line = input_line_pointer;
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input_line_pointer = p;
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reg = register_name ();
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/* Backtrack if we have a valid constant expression and
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it does not correspond to the offset of the 68HC12 indexed
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addressing mode (as in N,x). */
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if (reg == REG_NONE && mode == M6811_OP_NONE
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&& possible_mode != M6811_OP_NONE)
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{
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oper->mode = M6811_OP_IND16 | M6811_OP_JUMP_REL;
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input_line_pointer = skip_whites (old_input_line);
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return 1;
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}
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/* Backtrack if we have a valid constant expression and
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it does not correspond to the offset of the 68HC12 indexed
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addressing mode (as in N,x). */
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if (reg == REG_NONE && mode == M6811_OP_NONE
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&& possible_mode != M6811_OP_NONE)
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{
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oper->mode = M6811_OP_IND16 | M6811_OP_JUMP_REL;
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input_line_pointer = skip_whites (old_input_line);
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return 1;
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}
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if (possible_mode != M6811_OP_NONE)
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mode = possible_mode;
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if (possible_mode != M6811_OP_NONE)
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mode = possible_mode;
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if ((current_architecture & cpu6811)
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&& possible_mode != M6811_OP_NONE)
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as_bad (_("Pre-increment mode is not valid for 68HC11"));
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if ((current_architecture & cpu6811)
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&& possible_mode != M6811_OP_NONE)
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as_bad (_("Pre-increment mode is not valid for 68HC11"));
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/* Backtrack. */
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if (which == 0 && opmode & M6812_OP_IDX_P2
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&& reg != REG_X && reg != REG_Y
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@ -1717,7 +1708,7 @@ build_indexed_byte (op, format, move_insn)
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if (move_insn && !(val >= -16 && val <= 15))
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{
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as_bad (_("Offset out of 5-bit range for movw/movb insn: %ld."),
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val);
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val);
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return -1;
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}
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@ -1755,25 +1746,25 @@ build_indexed_byte (op, format, move_insn)
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}
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}
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if (op->reg1 != REG_PC)
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{
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byte = (byte << 3) | 0xe2;
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f = frag_more (1);
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number_to_chars_bigendian (f, byte, 1);
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{
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byte = (byte << 3) | 0xe2;
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f = frag_more (1);
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number_to_chars_bigendian (f, byte, 1);
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f = frag_more (2);
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fix_new_exp (frag_now, f - frag_now->fr_literal, 2,
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&op->exp, false, BFD_RELOC_16);
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number_to_chars_bigendian (f, 0, 2);
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}
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f = frag_more (2);
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fix_new_exp (frag_now, f - frag_now->fr_literal, 2,
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&op->exp, false, BFD_RELOC_16);
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number_to_chars_bigendian (f, 0, 2);
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}
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else
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{
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f = frag_more (1);
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number_to_chars_bigendian (f, byte, 1);
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frag_var (rs_machine_dependent, 2, 2,
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ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_UNDF),
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op->exp.X_add_symbol,
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op->exp.X_add_number, f);
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}
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{
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f = frag_more (1);
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number_to_chars_bigendian (f, byte, 1);
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frag_var (rs_machine_dependent, 2, 2,
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ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_UNDF),
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op->exp.X_add_symbol,
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op->exp.X_add_number, f);
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}
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return 3;
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}
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@ -2499,9 +2490,9 @@ md_convert_frag (abfd, sec, fragP)
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case ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_BITS5):
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fragP->fr_opcode[0] = fragP->fr_opcode[0] << 6;
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if ((fragP->fr_opcode[0] & 0x0ff) == 0x0c0)
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fragP->fr_opcode[0] |= disp & 0x1f;
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fragP->fr_opcode[0] |= disp & 0x1f;
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else
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fragP->fr_opcode[0] |= value & 0x1f;
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fragP->fr_opcode[0] |= value & 0x1f;
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break;
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case ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_BITS9):
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@ -2516,17 +2507,17 @@ md_convert_frag (abfd, sec, fragP)
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fragP->fr_opcode[0] = (fragP->fr_opcode[0] << 3);
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fragP->fr_opcode[0] |= 0xe2;
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if ((fragP->fr_opcode[0] & 0x0ff) == 0x0fa)
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{
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fixp = fix_new (fragP, fragP->fr_fix, 2,
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fragP->fr_symbol, fragP->fr_offset,
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1, BFD_RELOC_16_PCREL);
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fixp->fx_pcrel_adjust = 2;
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}
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{
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fixp = fix_new (fragP, fragP->fr_fix, 2,
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fragP->fr_symbol, fragP->fr_offset,
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1, BFD_RELOC_16_PCREL);
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fixp->fx_pcrel_adjust = 2;
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}
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else
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{
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fix_new (fragP, fragP->fr_fix, 2,
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fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_16);
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}
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{
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fix_new (fragP, fragP->fr_fix, 2,
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fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_16);
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}
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fragP->fr_fix += 2;
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break;
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@ -2557,7 +2548,7 @@ md_convert_frag (abfd, sec, fragP)
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at final link time by a non weak symbol. */
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static int
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relaxable_symbol (symbol)
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symbolS* symbol;
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symbolS *symbol;
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{
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return ! S_IS_EXTERNAL (symbol) && ! S_IS_WEAK (symbol);
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}
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@ -2585,7 +2576,7 @@ md_estimate_size_before_relax (fragP, segment)
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/* A relaxable case. */
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if (S_GET_SEGMENT (fragP->fr_symbol) == segment
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&& relaxable_symbol (fragP->fr_symbol))
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&& relaxable_symbol (fragP->fr_symbol))
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{
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fragP->fr_subtype = ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE);
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}
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@ -2612,7 +2603,7 @@ md_estimate_size_before_relax (fragP, segment)
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assert (current_architecture & cpu6811);
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if (S_GET_SEGMENT (fragP->fr_symbol) == segment
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&& relaxable_symbol (fragP->fr_symbol))
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&& relaxable_symbol (fragP->fr_symbol))
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{
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fragP->fr_subtype = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH,
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STATE_BYTE);
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@ -2638,7 +2629,7 @@ md_estimate_size_before_relax (fragP, segment)
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assert (current_architecture & cpu6812);
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if (S_GET_SEGMENT (fragP->fr_symbol) == segment
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&& relaxable_symbol (fragP->fr_symbol))
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&& relaxable_symbol (fragP->fr_symbol))
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{
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fragP->fr_subtype = ENCODE_RELAX (STATE_INDEXED_OFFSET,
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STATE_BITS5);
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@ -2646,8 +2637,8 @@ md_estimate_size_before_relax (fragP, segment)
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else
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{
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/* Switch the indexed operation to 16-bit mode. */
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fragP->fr_opcode[0] = fragP->fr_opcode[0] << 3;
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fragP->fr_opcode[0] |= 0xe2;
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fragP->fr_opcode[0] = fragP->fr_opcode[0] << 3;
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fragP->fr_opcode[0] |= 0xe2;
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fragP->fr_fix++;
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fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
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fragP->fr_offset, 0, BFD_RELOC_16);
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@ -2660,7 +2651,7 @@ md_estimate_size_before_relax (fragP, segment)
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assert (current_architecture & cpu6812);
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if (S_GET_SEGMENT (fragP->fr_symbol) == segment
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&& relaxable_symbol (fragP->fr_symbol))
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&& relaxable_symbol (fragP->fr_symbol))
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{
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fragP->fr_subtype = ENCODE_RELAX (STATE_XBCC_BRANCH, STATE_BYTE);
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}
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@ -2685,7 +2676,7 @@ md_estimate_size_before_relax (fragP, segment)
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assert (current_architecture & cpu6812);
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if (S_GET_SEGMENT (fragP->fr_symbol) == segment
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&& relaxable_symbol (fragP->fr_symbol))
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&& relaxable_symbol (fragP->fr_symbol))
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{
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fragP->fr_subtype = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH_6812,
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STATE_BYTE);
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