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Add (linker) support for CR16C processor

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This commit is contained in:
Nick Clifton 2004-03-30 14:04:32 +00:00
parent baaff79e16
commit 0949843db2
24 changed files with 1663 additions and 25 deletions
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42
bfd/ChangeLog
View File

@ -1,3 +1,45 @@
2004-03-30 Galit Heller <Galit.Heller@nsc.com>
Tomer Levi <Tomer.Levi@nsc.com>
* Makefile.am (ALL_MACHINES): Add cpu-cr16c.lo.
(ALL_MACHINES_CFILES): Add cpu-cr16c.c.
(BFD32_BACKENDS): Add elf32-cr16c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-cr16c.c.
(cpu-cr16c.lo): New target.
(elf32-cr16c.lo): Likewise.
* Makefile.in: Regenerate.
* archures.c (bfd_architecture): Add bfd_{arch,mach}_cr16c.
(bfd_archures_list): Add bfd_cr16c_arch.
* config.bfd: Handle cr16c-*-elf*.
* configure.in: Handle bfd_elf32_cr16c_vec.
* configure: Regenerate.
* reloc.c: Add BFD_RELOC_16C_NUM08, BFD_RELOC_16C_NUM08_C,
BFD_RELOC_16C_NUM16, BFD_RELOC_16C_NUM16_C,
BFD_RELOC_16C_NUM32, BFD_RELOC_16C_NUM32_C,
BFD_RELOC_16C_DISP04, BFD_RELOC_16C_DISP04_C,
BFD_RELOC_16C_DISP08, BFD_RELOC_16C_DISP08_C,
BFD_RELOC_16C_DISP16, BFD_RELOC_16C_DISP16_C,
BFD_RELOC_16C_DISP24, BFD_RELOC_16C_DISP24_C,
BFD_RELOC_16C_DISP24a, BFD_RELOC_16C_DISP24a_C,
BFD_RELOC_16C_REG04, BFD_RELOC_16C_REG04_C,
BFD_RELOC_16C_REG04a, BFD_RELOC_16C_REG04a_C,
BFD_RELOC_16C_REG14, BFD_RELOC_16C_REG14_C,
BFD_RELOC_16C_REG16, BFD_RELOC_16C_REG16_C,
BFD_RELOC_16C_REG20, BFD_RELOC_16C_REG20_C,
BFD_RELOC_16C_ABS20, BFD_RELOC_16C_ABS20_C,
BFD_RELOC_16C_ABS24, BFD_RELOC_16C_ABS24_C,
BFD_RELOC_16C_IMM04, BFD_RELOC_16C_IMM04_C,
BFD_RELOC_16C_IMM16, BFD_RELOC_16C_IMM16_C,
BFD_RELOC_16C_IMM20, BFD_RELOC_16C_IMM20_C,
BFD_RELOC_16C_IMM24, BFD_RELOC_16C_IMM24_C,
BFD_RELOC_16C_IMM32, BFD_RELOC_16C_IMM32_C.
* targets.c (bfd_elf32_cr16c_vec): Declare.
(bfd_target_vector): Add bfd_elf32_cr16c_vec.
* cpu-cr16c.c: New file.
* elf32-cr16c.c: Likewise.
* libbfd.h: Regenerate.
* bfd-in2.h: Likewise.
2004-03-30 Jakub Jelinek <jakub@redhat.com>
* elf.c (map_sections_to_segments): Fix handling of .tbss.

9
bfd/Makefile.am
View File

@ -55,6 +55,7 @@ ALL_MACHINES = \
cpu-arc.lo \
cpu-arm.lo \
cpu-avr.lo \
cpu-cr16c.lo \
cpu-cris.lo \
cpu-d10v.lo \
cpu-d30v.lo \
@ -111,6 +112,7 @@ ALL_MACHINES_CFILES = \
cpu-arm.c \
cpu-avr.c \
cpu-cris.c \
cpu-cr16c.c \
cpu-d10v.c \
cpu-d30v.c \
cpu-dlx.c \
@ -213,6 +215,7 @@ BFD32_BACKENDS = \
elfarm-oabi.lo \
elfarm-nabi.lo \
elf32-avr.lo \
elf32-cr16c.lo \
elf32-cris.lo \
elf32-d10v.lo \
elf32-d30v.lo \
@ -378,6 +381,7 @@ BFD32_BACKENDS_CFILES = \
elfarm-oabi.c \
elfarm-nabi.c \
elf32-avr.c \
elf32-cr16c.c \
elf32-cris.c \
elf32-d10v.c \
elf32-d30v.c \
@ -915,6 +919,7 @@ cpu-alpha.lo: cpu-alpha.c $(INCDIR)/filenames.h
cpu-arc.lo: cpu-arc.c $(INCDIR)/filenames.h
cpu-arm.lo: cpu-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h
cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h
cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h
cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h
cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h
@ -1137,6 +1142,10 @@ elf32-avr.lo: elf32-avr.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/avr.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
elf32-cr16c.lo: elf32-cr16c.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cr16c.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \

13
bfd/Makefile.in
View File

@ -1,4 +1,4 @@
# Makefile.in generated automatically by automake 1.4-p6 from Makefile.am
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
@ -183,6 +183,7 @@ ALL_MACHINES = \
cpu-arc.lo \
cpu-arm.lo \
cpu-avr.lo \
cpu-cr16c.lo \
cpu-cris.lo \
cpu-d10v.lo \
cpu-d30v.lo \
@ -240,6 +241,7 @@ ALL_MACHINES_CFILES = \
cpu-arm.c \
cpu-avr.c \
cpu-cris.c \
cpu-cr16c.c \
cpu-d10v.c \
cpu-d30v.c \
cpu-dlx.c \
@ -343,6 +345,7 @@ BFD32_BACKENDS = \
elfarm-oabi.lo \
elfarm-nabi.lo \
elf32-avr.lo \
elf32-cr16c.lo \
elf32-cris.lo \
elf32-d10v.lo \
elf32-d30v.lo \
@ -509,6 +512,7 @@ BFD32_BACKENDS_CFILES = \
elfarm-oabi.c \
elfarm-nabi.c \
elf32-avr.c \
elf32-cr16c.c \
elf32-cris.c \
elf32-d10v.c \
elf32-d30v.c \
@ -814,7 +818,7 @@ configure.in version.h
DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
TAR = tar
TAR = gtar
GZIP_ENV = --best
SOURCES = $(libbfd_a_SOURCES) $(libbfd_la_SOURCES)
OBJECTS = $(libbfd_a_OBJECTS) $(libbfd_la_OBJECTS)
@ -1452,6 +1456,7 @@ cpu-alpha.lo: cpu-alpha.c $(INCDIR)/filenames.h
cpu-arc.lo: cpu-arc.c $(INCDIR)/filenames.h
cpu-arm.lo: cpu-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h
cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h
cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h
cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h
cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h
@ -1674,6 +1679,10 @@ elf32-avr.lo: elf32-avr.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/avr.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
elf32-cr16c.lo: elf32-cr16c.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cr16c.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \

4
bfd/archures.c
View File

@ -307,6 +307,8 @@ DESCRIPTION
.#define bfd_mach_avr3 3
.#define bfd_mach_avr4 4
.#define bfd_mach_avr5 5
. bfd_arch_cr16c, {* National Semiconductor CompactRISC. *}
.#define bfd_mach_cr16c 1
. bfd_arch_cris, {* Axis CRIS *}
. bfd_arch_s390, {* IBM s390 *}
.#define bfd_mach_s390_31 31
@ -375,6 +377,7 @@ extern const bfd_arch_info_type bfd_alpha_arch;
extern const bfd_arch_info_type bfd_arc_arch;
extern const bfd_arch_info_type bfd_arm_arch;
extern const bfd_arch_info_type bfd_avr_arch;
extern const bfd_arch_info_type bfd_cr16c_arch;
extern const bfd_arch_info_type bfd_cris_arch;
extern const bfd_arch_info_type bfd_d10v_arch;
extern const bfd_arch_info_type bfd_d30v_arch;
@ -435,6 +438,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_arc_arch,
&bfd_arm_arch,
&bfd_avr_arch,
&bfd_cr16c_arch,
&bfd_cris_arch,
&bfd_d10v_arch,
&bfd_d30v_arch,

44
bfd/bfd-in2.h
View File

@ -1705,6 +1705,8 @@ enum bfd_architecture
#define bfd_mach_avr3 3
#define bfd_mach_avr4 4
#define bfd_mach_avr5 5
bfd_arch_cr16c, /* National Semiconductor CompactRISC. */
#define bfd_mach_cr16c 1
bfd_arch_cris, /* Axis CRIS */
bfd_arch_s390, /* IBM s390 */
#define bfd_mach_s390_31 31
@ -3343,6 +3345,48 @@ to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */
This is the 5 bits of a value. */
BFD_RELOC_M68HC12_5B,
/* NS CR16C Relocations. */
BFD_RELOC_16C_NUM08,
BFD_RELOC_16C_NUM08_C,
BFD_RELOC_16C_NUM16,
BFD_RELOC_16C_NUM16_C,
BFD_RELOC_16C_NUM32,
BFD_RELOC_16C_NUM32_C,
BFD_RELOC_16C_DISP04,
BFD_RELOC_16C_DISP04_C,
BFD_RELOC_16C_DISP08,
BFD_RELOC_16C_DISP08_C,
BFD_RELOC_16C_DISP16,
BFD_RELOC_16C_DISP16_C,
BFD_RELOC_16C_DISP24,
BFD_RELOC_16C_DISP24_C,
BFD_RELOC_16C_DISP24a,
BFD_RELOC_16C_DISP24a_C,
BFD_RELOC_16C_REG04,
BFD_RELOC_16C_REG04_C,
BFD_RELOC_16C_REG04a,
BFD_RELOC_16C_REG04a_C,
BFD_RELOC_16C_REG14,
BFD_RELOC_16C_REG14_C,
BFD_RELOC_16C_REG16,
BFD_RELOC_16C_REG16_C,
BFD_RELOC_16C_REG20,
BFD_RELOC_16C_REG20_C,
BFD_RELOC_16C_ABS20,
BFD_RELOC_16C_ABS20_C,
BFD_RELOC_16C_ABS24,
BFD_RELOC_16C_ABS24_C,
BFD_RELOC_16C_IMM04,
BFD_RELOC_16C_IMM04_C,
BFD_RELOC_16C_IMM16,
BFD_RELOC_16C_IMM16_C,
BFD_RELOC_16C_IMM20,
BFD_RELOC_16C_IMM20_C,
BFD_RELOC_16C_IMM24,
BFD_RELOC_16C_IMM24_C,
BFD_RELOC_16C_IMM32,
BFD_RELOC_16C_IMM32_C,
/* These relocs are only used within the CRIS assembler. They are not
(at present) written to any object files. */
BFD_RELOC_CRIS_BDISP8,

5
bfd/config.bfd
View File

@ -306,6 +306,11 @@ case "${targ}" in
targ_underscore=yes
;;
cr16c-*-elf*)
targ_defvec=bfd_elf32_cr16c_vec
targ_underscore=yes
;;
cris-*-*)
targ_defvec=cris_aout_vec
targ_selvecs="bfd_elf32_us_cris_vec bfd_elf32_cris_vec ieee_vec"

43
bfd/configure vendored
View File

@ -6299,6 +6299,7 @@ do
bfd_elf32_bigarm_oabi_vec) tb="$tb elfarm-oabi.lo elf32.lo $elf" ;;
bfd_elf32_bigarm_vec) tb="$tb elfarm-nabi.lo elf32.lo $elf" ;;
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;
@ -6586,10 +6587,10 @@ case ${host64}-${target64}-${want64} in
if test -n "$GCC" ; then
bad_64bit_gcc=no;
echo $ac_n "checking for gcc version with buggy 64-bit support""... $ac_c" 1>&6
echo "configure:6590: checking for gcc version with buggy 64-bit support" >&5
echo "configure:6591: checking for gcc version with buggy 64-bit support" >&5
# Add more tests for gcc versions with non-working 64-bit support here.
cat > conftest.$ac_ext <<EOF
#line 6593 "configure"
#line 6594 "configure"
#include "confdefs.h"
:__GNUC__:__GNUC_MINOR__:__i386__:
EOF
@ -6631,12 +6632,12 @@ esac
for ac_func in ftello ftello64 fseeko fseeko64
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
echo "configure:6635: checking for $ac_func" >&5
echo "configure:6636: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6640 "configure"
#line 6641 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -6659,7 +6660,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:6663: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
if { (eval echo configure:6664: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@ -6685,13 +6686,13 @@ done
if test x"$ac_cv_func_ftello" = xyes -a x"$ac_cv_func_fseeko" = xyes; then
echo $ac_n "checking size of off_t""... $ac_c" 1>&6
echo "configure:6689: checking size of off_t" >&5
echo "configure:6690: checking size of off_t" >&5
if eval "test \"`echo '$''{'ac_cv_sizeof_off_t'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
for ac_size in 4 8 1 2 16 12 ; do # List sizes in rough order of prevalence.
cat > conftest.$ac_ext <<EOF
#line 6695 "configure"
#line 6696 "configure"
#include "confdefs.h"
#include "confdefs.h"
#include <sys/types.h>
@ -6701,7 +6702,7 @@ int main() {
switch (0) case 0: case (sizeof (off_t) == $ac_size):;
; return 0; }
EOF
if { (eval echo configure:6705: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
if { (eval echo configure:6706: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_sizeof_off_t=$ac_size
else
@ -6725,7 +6726,7 @@ EOF
fi
echo $ac_n "checking file_ptr type""... $ac_c" 1>&6
echo "configure:6729: checking file_ptr type" >&5
echo "configure:6730: checking file_ptr type" >&5
bfd_file_ptr="long"
bfd_ufile_ptr="unsigned long"
if test x"$ac_cv_func_ftello64" = xyes -a x"$ac_cv_func_fseeko64" = xyes \
@ -6750,17 +6751,17 @@ for ac_hdr in stdlib.h unistd.h sys/stat.h sys/types.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
echo "configure:6754: checking for $ac_hdr" >&5
echo "configure:6755: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6759 "configure"
#line 6760 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
{ (eval echo configure:6764: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
{ (eval echo configure:6765: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@ -6789,12 +6790,12 @@ done
for ac_func in getpagesize
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
echo "configure:6793: checking for $ac_func" >&5
echo "configure:6794: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6798 "configure"
#line 6799 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -6817,7 +6818,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:6821: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
if { (eval echo configure:6822: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@ -6842,7 +6843,7 @@ fi
done
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
echo "configure:6846: checking for working mmap" >&5
echo "configure:6847: checking for working mmap" >&5
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@ -6850,7 +6851,7 @@ else
ac_cv_func_mmap_fixed_mapped=no
else
cat > conftest.$ac_ext <<EOF
#line 6854 "configure"
#line 6855 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test.
@ -7003,7 +7004,7 @@ main()
}
EOF
if { (eval echo configure:7007: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
if { (eval echo configure:7008: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_func_mmap_fixed_mapped=yes
else
@ -7028,12 +7029,12 @@ fi
for ac_func in madvise mprotect
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
echo "configure:7032: checking for $ac_func" >&5
echo "configure:7033: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 7037 "configure"
#line 7038 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -7056,7 +7057,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:7060: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
if { (eval echo configure:7061: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else

1
bfd/configure.in
View File

@ -608,6 +608,7 @@ do
bfd_elf32_bigarm_oabi_vec) tb="$tb elfarm-oabi.lo elf32.lo $elf" ;;
bfd_elf32_bigarm_vec) tb="$tb elfarm-nabi.lo elf32.lo $elf" ;;
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;

38
bfd/cpu-cr16c.c Normal file
View File

@ -0,0 +1,38 @@
/* BFD support for the CR16C processor.
Copyright 2004 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_cr16c_arch =
{
16, /* 16 bits in a word. */
32, /* 32 bits in an address. */
8, /* 8 bits in a byte. */
bfd_arch_cr16c,
bfd_mach_cr16c,
"cr16c",
"cr16c",
1,
TRUE, /* The one and only. */
bfd_default_compatible,
bfd_default_scan ,
0,
};

4
bfd/doc/Makefile.in
View File

@ -1,4 +1,4 @@
# Makefile.in generated automatically by automake 1.4-p6 from Makefile.am
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
@ -257,7 +257,7 @@ DIST_COMMON = ChangeLog Makefile.am Makefile.in
DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
TAR = tar
TAR = gtar
GZIP_ENV = --best
all: all-redirect
.SUFFIXES:

1015
bfd/elf32-cr16c.c Normal file
View File

File diff suppressed because it is too large Load Diff

40
bfd/libbfd.h
View File

@ -1437,6 +1437,46 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_M68HC11_PAGE",
"BFD_RELOC_M68HC11_24",
"BFD_RELOC_M68HC12_5B",
"BFD_RELOC_16C_NUM08",
"BFD_RELOC_16C_NUM08_C",
"BFD_RELOC_16C_NUM16",
"BFD_RELOC_16C_NUM16_C",
"BFD_RELOC_16C_NUM32",
"BFD_RELOC_16C_NUM32_C",
"BFD_RELOC_16C_DISP04",
"BFD_RELOC_16C_DISP04_C",
"BFD_RELOC_16C_DISP08",
"BFD_RELOC_16C_DISP08_C",
"BFD_RELOC_16C_DISP16",
"BFD_RELOC_16C_DISP16_C",
"BFD_RELOC_16C_DISP24",
"BFD_RELOC_16C_DISP24_C",
"BFD_RELOC_16C_DISP24a",
"BFD_RELOC_16C_DISP24a_C",
"BFD_RELOC_16C_REG04",
"BFD_RELOC_16C_REG04_C",
"BFD_RELOC_16C_REG04a",
"BFD_RELOC_16C_REG04a_C",
"BFD_RELOC_16C_REG14",
"BFD_RELOC_16C_REG14_C",
"BFD_RELOC_16C_REG16",
"BFD_RELOC_16C_REG16_C",
"BFD_RELOC_16C_REG20",
"BFD_RELOC_16C_REG20_C",
"BFD_RELOC_16C_ABS20",
"BFD_RELOC_16C_ABS20_C",
"BFD_RELOC_16C_ABS24",
"BFD_RELOC_16C_ABS24_C",
"BFD_RELOC_16C_IMM04",
"BFD_RELOC_16C_IMM04_C",
"BFD_RELOC_16C_IMM16",
"BFD_RELOC_16C_IMM16_C",
"BFD_RELOC_16C_IMM20",
"BFD_RELOC_16C_IMM20_C",
"BFD_RELOC_16C_IMM24",
"BFD_RELOC_16C_IMM24_C",
"BFD_RELOC_16C_IMM32",
"BFD_RELOC_16C_IMM32_C",
"BFD_RELOC_CRIS_BDISP8",
"BFD_RELOC_CRIS_UNSIGNED_5",
"BFD_RELOC_CRIS_SIGNED_6",

83
bfd/reloc.c
View File

@ -3770,6 +3770,89 @@ ENUMDOC
Motorola 68HC12 reloc.
This is the 5 bits of a value.
ENUM
BFD_RELOC_16C_NUM08
ENUMX
BFD_RELOC_16C_NUM08_C
ENUMX
BFD_RELOC_16C_NUM16
ENUMX
BFD_RELOC_16C_NUM16_C
ENUMX
BFD_RELOC_16C_NUM32
ENUMX
BFD_RELOC_16C_NUM32_C
ENUMX
BFD_RELOC_16C_DISP04
ENUMX
BFD_RELOC_16C_DISP04_C
ENUMX
BFD_RELOC_16C_DISP08
ENUMX
BFD_RELOC_16C_DISP08_C
ENUMX
BFD_RELOC_16C_DISP16
ENUMX
BFD_RELOC_16C_DISP16_C
ENUMX
BFD_RELOC_16C_DISP24
ENUMX
BFD_RELOC_16C_DISP24_C
ENUMX
BFD_RELOC_16C_DISP24a
ENUMX
BFD_RELOC_16C_DISP24a_C
ENUMX
BFD_RELOC_16C_REG04
ENUMX
BFD_RELOC_16C_REG04_C
ENUMX
BFD_RELOC_16C_REG04a
ENUMX
BFD_RELOC_16C_REG04a_C
ENUMX
BFD_RELOC_16C_REG14
ENUMX
BFD_RELOC_16C_REG14_C
ENUMX
BFD_RELOC_16C_REG16
ENUMX
BFD_RELOC_16C_REG16_C
ENUMX
BFD_RELOC_16C_REG20
ENUMX
BFD_RELOC_16C_REG20_C
ENUMX
BFD_RELOC_16C_ABS20
ENUMX
BFD_RELOC_16C_ABS20_C
ENUMX
BFD_RELOC_16C_ABS24
ENUMX
BFD_RELOC_16C_ABS24_C
ENUMX
BFD_RELOC_16C_IMM04
ENUMX
BFD_RELOC_16C_IMM04_C
ENUMX
BFD_RELOC_16C_IMM16
ENUMX
BFD_RELOC_16C_IMM16_C
ENUMX
BFD_RELOC_16C_IMM20
ENUMX
BFD_RELOC_16C_IMM20_C
ENUMX
BFD_RELOC_16C_IMM24
ENUMX
BFD_RELOC_16C_IMM24_C
ENUMX
BFD_RELOC_16C_IMM32
ENUMX
BFD_RELOC_16C_IMM32_C
ENUMDOC
NS CR16C Relocations.
ENUM
BFD_RELOC_CRIS_BDISP8
ENUMX

2
bfd/targets.c
View File

@ -517,6 +517,7 @@ extern const bfd_target bfd_elf32_bigarc_vec;
extern const bfd_target bfd_elf32_bigarm_oabi_vec;
extern const bfd_target bfd_elf32_bigarm_vec;
extern const bfd_target bfd_elf32_bigmips_vec;
extern const bfd_target bfd_elf32_cr16c_vec;
extern const bfd_target bfd_elf32_cris_vec;
extern const bfd_target bfd_elf32_d10v_vec;
extern const bfd_target bfd_elf32_d30v_vec;
@ -807,6 +808,7 @@ static const bfd_target * const _bfd_target_vector[] = {
&bfd_elf32_bigarm_oabi_vec,
&bfd_elf32_bigarm_vec,
&bfd_elf32_bigmips_vec,
&bfd_elf32_cr16c_vec,
&bfd_elf32_cris_vec,
&bfd_elf32_d10v_vec,
&bfd_elf32_d30v_vec,

6
include/elf/ChangeLog
View File

@ -1,3 +1,9 @@
2004-30-30 Galit Heller <Galit.Heller@nsc.com>
Tomer Levi <Tomer.Levi@nsc.com>
* common.h (EM_CR): Define.
* cr16c.h: New file.
2004-03-23 Paul Brook <paul@codesourcery.com>
* arm.h (EF_ERM_BE8, EF_ARM_LE8, EF_ARM_EABI_VER3): Add.

1
include/elf/common.h
View File

@ -180,6 +180,7 @@
#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */
#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
#define EM_IP2K 101 /* Ubicom IP2022 micro controller */
#define EM_CR 103 /* National Semiconductor CompactRISC */
#define EM_MSP430 105 /* TI msp430 micro controller */
/* If it is necessary to assign new unofficial EM_* values, please pick large

258
include/elf/cr16c.h Normal file
View File

@ -0,0 +1,258 @@
/* CR16C ELF support for BFD.
Copyright 2004 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation,
Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef _ELF_CR16C_H
#define _ELF_CR16C_H
#include "bfd.h"
#include "elf/reloc-macros.h"
/* Creating indices for reloc_map_index array. */
START_RELOC_NUMBERS (elf_cr16c_reloc_type)
RELOC_NUMBER (RINDEX_16C_NUM08, 0)
RELOC_NUMBER (RINDEX_16C_NUM08_C, 1)
RELOC_NUMBER (RINDEX_16C_NUM16, 2)
RELOC_NUMBER (RINDEX_16C_NUM16_C, 3)
RELOC_NUMBER (RINDEX_16C_NUM32, 4)
RELOC_NUMBER (RINDEX_16C_NUM32_C, 5)
RELOC_NUMBER (RINDEX_16C_DISP04, 6)
RELOC_NUMBER (RINDEX_16C_DISP04_C, 7)
RELOC_NUMBER (RINDEX_16C_DISP08, 8)
RELOC_NUMBER (RINDEX_16C_DISP08_C, 9)
RELOC_NUMBER (RINDEX_16C_DISP16, 10)
RELOC_NUMBER (RINDEX_16C_DISP16_C, 11)
RELOC_NUMBER (RINDEX_16C_DISP24, 12)
RELOC_NUMBER (RINDEX_16C_DISP24_C, 13)
RELOC_NUMBER (RINDEX_16C_DISP24a, 14)
RELOC_NUMBER (RINDEX_16C_DISP24a_C, 15)
RELOC_NUMBER (RINDEX_16C_REG04, 16)
RELOC_NUMBER (RINDEX_16C_REG04_C, 17)
RELOC_NUMBER (RINDEX_16C_REG04a, 18)
RELOC_NUMBER (RINDEX_16C_REG04a_C, 19)
RELOC_NUMBER (RINDEX_16C_REG14, 20)
RELOC_NUMBER (RINDEX_16C_REG14_C, 21)
RELOC_NUMBER (RINDEX_16C_REG16, 22)
RELOC_NUMBER (RINDEX_16C_REG16_C, 23)
RELOC_NUMBER (RINDEX_16C_REG20, 24)
RELOC_NUMBER (RINDEX_16C_REG20_C, 25)
RELOC_NUMBER (RINDEX_16C_ABS20, 26)
RELOC_NUMBER (RINDEX_16C_ABS20_C, 27)
RELOC_NUMBER (RINDEX_16C_ABS24, 28)
RELOC_NUMBER (RINDEX_16C_ABS24_C, 29)
RELOC_NUMBER (RINDEX_16C_IMM04, 30)
RELOC_NUMBER (RINDEX_16C_IMM04_C, 31)
RELOC_NUMBER (RINDEX_16C_IMM16, 32)
RELOC_NUMBER (RINDEX_16C_IMM16_C, 33)
RELOC_NUMBER (RINDEX_16C_IMM20, 34)
RELOC_NUMBER (RINDEX_16C_IMM20_C, 35)
RELOC_NUMBER (RINDEX_16C_IMM24, 36)
RELOC_NUMBER (RINDEX_16C_IMM24_C, 37)
RELOC_NUMBER (RINDEX_16C_IMM32, 38)
RELOC_NUMBER (RINDEX_16C_IMM32_C, 39)
END_RELOC_NUMBERS (RINDEX_16C_MAX)
/* CR16C Relocation Types ('cr_reloc_type' entry in the reloc_map structure).
The relocation constant name is determined as follows :
R_16C_<format><size>[_C]
Where :
<format> is one of the following:
NUM - R_NUMBER mnemonic,
DISP - R_16C_DISPL mnemonic,
REG - R_16C_REGREL mnemonic,
ABS - R_16C_ABS mnemonic,
IMM - R_16C_IMMED mnemonic,
<size> stands for R_S_16C_<size>
_C means 'code label' and is only added when R_ADDRTYPE subfield
is of type R_CODE_ADDR. */
/* The table below shows what the hex digits in the definition of the
relocation type constants correspond to.
------------------------------------------------------------------
R_SIZESP R_FORMAT R_RELTO R_ADDRTYPE
------------------------------------------------------------------ */
/* R_S_16C_08 R_NUMBER R_ABS R_ADDRESS */
#define R_16C_NUM08 0X0001
/* R_S_16C_08 R_NUMBER R_ABS R_CODE_ADDR */
#define R_16C_NUM08_C 0X0006
/* R_S_16C_16 R_NUMBER R_ABS R_ADDRESS */
#define R_16C_NUM16 0X1001
/* R_S_16C_16 R_NUMBER R_ABS R_CODE_ADDR */
#define R_16C_NUM16_C 0X1006
/* R_S_16C_32 R_NUMBER R_ABS R_ADDRESS */
#define R_16C_NUM32 0X2001
/* R_S_16C_32 R_NUMBER R_ABS R_CODE_ADDR */
#define R_16C_NUM32_C 0X2006
/* R_S_16C_04 R_16C_DISPL R_PCREL R_ADDRESS */
#define R_16C_DISP04 0X5411
/* R_S_16C_04 R_16C_DISPL R_PCREL R_CODE_ADDR */
#define R_16C_DISP04_C 0X5416
/* R_S_16C_08 R_16C_DISPL R_PCREL R_ADDRESS */
#define R_16C_DISP08 0X0411
/* R_S_16C_08 R_16C_DISPL R_PCREL R_CODE_ADDR */
#define R_16C_DISP08_C 0X0416
/* R_S_16C_16 R_16C_DISPL R_PCREL R_ADDRESS */
#define R_16C_DISP16 0X1411
/* R_S_16C_16 R_16C_DISPL R_PCREL R_CODE_ADDR */
#define R_16C_DISP16_C 0X1416
/* R_S_16C_24 R_16C_DISPL R_PCREL R_ADDRESS */
#define R_16C_DISP24 0X7411
/* R_S_16C_24 R_16C_DISPL R_PCREL R_CODE_ADDR */
#define R_16C_DISP24_C 0X7416
/* R_S_16C_24a R_16C_DISPL R_PCREL R_ADDRESS */
#define R_16C_DISP24a 0X6411
/* R_S_16C_24a R_16C_DISPL R_PCREL R_CODE_ADDR */
#define R_16C_DISP24a_C 0X6416
/* R_S_16C_04 R_16C_REGREL R_ABS R_ADDRESS */
#define R_16C_REG04 0X5201
/* R_S_16C_04 R_16C_REGREL R_ABS R_CODE_ADDR */
#define R_16C_REG04_C 0X5206
/* R_S_16C_04_a R_16C_REGREL R_ABS R_ADDRESS */
#define R_16C_REG04a 0X4201
/* R_S_16C_04_a R_16C_REGREL R_ABS R_CODE_ADDR */
#define R_16C_REG04a_C 0X4206
/* R_S_16C_14 R_16C_REGREL R_ABS R_ADDRESS */
#define R_16C_REG14 0X3201
/* R_S_16C_14 R_16C_REGREL R_ABS R_CODE_ADDR */
#define R_16C_REG14_C 0X3206
/* R_S_16C_16 R_16C_REGREL R_ABS R_ADDRESS */
#define R_16C_REG16 0X1201
/* R_S_16C_16 R_16C_REGREL R_ABS R_CODE_ADDR */
#define R_16C_REG16_C 0X1206
/* R_S_16C_20 R_16C_REGREL R_ABS R_ADDRESS */
#define R_16C_REG20 0X8201
/* R_S_16C_20 R_16C_REGREL R_ABS R_CODE_ADDR */
#define R_16C_REG20_C 0X8206
/* R_S_16C_20 R_16C_ABS R_ABS R_ADDRESS */
#define R_16C_ABS20 0X8101
/* R_S_16C_20 R_16C_ABS R_ABS R_CODE_ADDR */
#define R_16C_ABS20_C 0X8106
/* R_S_16C_24 R_16C_ABS R_ABS R_ADDRESS */
#define R_16C_ABS24 0X7101
/* R_S_16C_24 R_16C_ABS R_ABS R_CODE_ADDR */
#define R_16C_ABS24_C 0X7106
/* R_S_16C_04 R_16C_IMMED R_ABS R_ADDRESS */
#define R_16C_IMM04 0X5301
/* R_S_16C_04 R_16C_IMMED R_ABS R_CODE_ADDR */
#define R_16C_IMM04_C 0X5306
/* R_S_16C_16 R_16C_IMMED R_ABS R_ADDRESS */
#define R_16C_IMM16 0X1301
/* R_S_16C_16 R_16C_IMMED R_ABS R_CODE_ADDR */
#define R_16C_IMM16_C 0X1306
/* R_S_16C_20 R_16C_IMMED R_ABS R_ADDRESS */
#define R_16C_IMM20 0X8301
/* R_S_16C_20 R_16C_IMMED R_ABS R_CODE_ADDR */
#define R_16C_IMM20_C 0X8306
/* R_S_16C_24 R_16C_IMMED R_ABS R_ADDRESS */
#define R_16C_IMM24 0X7301
/* R_S_16C_24 R_16C_IMMED R_ABS R_CODE_ADDR */
#define R_16C_IMM24_C 0X7306
/* R_S_16C_32 R_16C_IMMED R_ABS R_ADDRESS */
#define R_16C_IMM32 0X2301
/* R_S_16C_32 R_16C_IMMED R_ABS R_CODE_ADDR */
#define R_16C_IMM32_C 0X2306
/* Relocation item type. */
#define R_ADDRTYPE 0x000f
#define R_ADDRESS 0x0001 /* Take address of symbol. */
#define R_CODE_ADDR 0x0006 /* Take address of symbol divided by 2. */
/* Relocation action. */
#define R_RELTO 0x00f0
#define R_ABS 0x0000 /* Keep symbol's address as such. */
#define R_PCREL 0x0010 /* Subtract the pc address of hole. */
/* Relocation item data format. */
#define R_FORMAT 0x0f00
#define R_NUMBER 0x0000 /* Retain as two's complement value. */
#define R_16C_DISPL 0x0400 /* CR16C displacement type. */
#define R_16C_ABS 0x0100 /* CR16C absolute type. */
#define R_16C_REGREL 0x0200 /* CR16C register-relative type. */
#define R_16C_IMMED 0x0300 /* CR16C immediate type. */
/* Relocation item size. */
#define R_SIZESP 0xf000
#define R_S_16C_04 0x5000
#define R_S_16C_04_a 0x4000
#define R_S_16C_08 0x0000
#define R_S_16C_14 0x3000
#define R_S_16C_16 0x1000
#define R_S_16C_20 0x8000
#define R_S_16C_24_a 0x6000
#define R_S_16C_24 0x7000
#define R_S_16C_32 0x2000
/* Processor specific section indices. These sections do not actually
exist. Symbols with a st_shndx field corresponding to one of these
values have a special meaning. */
/* Far common symbol. */
#define SHN_CR16C_FCOMMON 0xff00
#define SHN_CR16C_NCOMMON 0xff01
typedef struct reloc_map
{
unsigned short cr_reloc_type; /* CR relocation type. */
bfd_reloc_code_real_type bfd_reloc_enum; /* BFD relocation enum. */
} RELOC_MAP;
#endif /* _ELF_CR16C_H */

10
ld/ChangeLog
View File

@ -1,3 +1,13 @@
2004-03-30 Galit Heller <Galit.Heller@nsc.com>
* Makefile.am (ALL_EMULATIONS): Add eelf32cr16c.o.
(eelf32cr16c.c): New target.
* Makefile.in: Regenerate.
* configure.tgt: Handle cr16c-*-elf*.
* emulparams/elf32cr16c.sh: New file.
* scripttempl/elfcr16c.sc: Likewise
* NEWS: Mention support for new target.
2004-03-30 Nick Clifton <nickc@redhat.com>
* po/sv.po: Updated Swedish translation.

5
ld/Makefile.am
View File

@ -149,6 +149,7 @@ ALL_EMULATIONS = \
eelf32_i860.o \
eelf32_sparc.o \
eelf32b4300.o \
eelf32cr16c.o \
eelf32bmip.o \
eelf32bmipn32.o \
eelf32btsmip.o \
@ -629,6 +630,10 @@ eelf32b4300.c: $(srcdir)/emulparams/elf32b4300.sh \
$(srcdir)/emulparams/elf32bmip.sh $(srcdir)/emultempl/mipself.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32b4300 "$(tdir_elf32b4300)"
eelf32cr16c.c: $(srcdir)/emulparams/elf32cr16c.sh \
$(srcdir)/emultempl/elf32.em \
$(srcdir)/scripttempl/elf32cr16c.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32cr16c "$(tdir_elf32cr16c)"
eelf32bmip.c: $(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/mipself.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}

5
ld/Makefile.in
View File

@ -263,6 +263,7 @@ ALL_EMULATIONS = \
eelf32_i860.o \
eelf32_sparc.o \
eelf32b4300.o \
eelf32cr16c.o \
eelf32bmip.o \
eelf32bmipn32.o \
eelf32btsmip.o \
@ -1355,6 +1356,10 @@ eelf32b4300.c: $(srcdir)/emulparams/elf32b4300.sh \
$(srcdir)/emulparams/elf32bmip.sh $(srcdir)/emultempl/mipself.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32b4300 "$(tdir_elf32b4300)"
eelf32cr16c.c: $(srcdir)/emulparams/elf32cr16c.sh \
$(srcdir)/emultempl/elf32.em \
$(srcdir)/scripttempl/elf32cr16c.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32cr16c "$(tdir_elf32cr16c)"
eelf32bmip.c: $(srcdir)/emulparams/elf32bmip.sh \
$(srcdir)/emultempl/mipself.em \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}

2
ld/NEWS
View File

@ -1,5 +1,7 @@
-*- text -*-
* cr16c support added by NSC.
* m32r Linux (ELF) support added by Renesas.
* Improved linker's handling of unresolved symbols. The switch

1
ld/configure.tgt
View File

@ -26,6 +26,7 @@ arm-*-pe) targ_emul=armpe ;
arc-*-elf*) targ_emul=arcelf ;;
avr-*-*) targ_emul=avr2
targ_extra_emuls="avr1 avr3 avr4 avr5" ;;
cr16c-*-elf*) targ_emul=elf32cr16c ;;
cris-*-*aout*) targ_emul=crisaout
targ_extra_emuls="criself crislinux"
targ_extra_libpath=$targ_extra_emuls ;;

5
ld/emulparams/elf32cr16c.sh Normal file
View File

@ -0,0 +1,5 @@
SCRIPT_NAME=elf32cr16c
TEMPLATE_NAME=elf32
OUTPUT_FORMAT="elf32-cr16c"
ARCH=cr16c
ENTRY=_start

52
ld/scripttempl/elf32cr16c.sc Normal file
View File

@ -0,0 +1,52 @@
# Linker Script for National Semiconductor's CR16C-ELF32.
test -z "$ENTRY" && ENTRY=_start
cat <<EOF
/* Example Linker Script for linking NS CR16C or CR16CPlus
elf32 files, which were compiled with either the near data
model or the default data model. */
/* Force the entry point to be entered in the output file as
an undefined symbol. This is needed in case the entry point
(which is not called explicitly) is in an archive (which is
the usual case). */
EXTERN(${ENTRY})
ENTRY(${ENTRY})
MEMORY
{
near_rom : ORIGIN = 0x4, LENGTH = 512K - 4
near_ram : ORIGIN = 512K, LENGTH = 512K - 64K
rom : ORIGIN = 1M, LENGTH = 3M
ram : ORIGIN = 4M, LENGTH = 10M
}
SECTIONS
{
/* The heap is located in near memory, to suit both the near and
default data models. The heap and stack are aligned to the bus
width, as a speed optimization for accessing data located
there. The alignment to 4 bytes is compatible for both the CR16C
bus width (2 bytes) and CR16CPlus bus width (4 bytes). */
.text : { __TEXT_START = .; *(.text) __TEXT_END = .; } > rom
.rdata : { __RDATA_START = .; *(.rdata_4) *(.rdata_2) *(.rdata_1) __RDATA_END = .; } > near_rom
.ctor ALIGN(4) : { __CTOR_LIST = .; *(.ctors) __CTOR_END = .; } > near_rom
.dtor ALIGN(4) : { __DTOR_LIST = .; *(.dtors) __DTOR_END = .; } > near_rom
.data : { __DATA_START = .; *(.data_4) *(.data_2) *(.data_1) *(.data) __DATA_END = .; } > ram AT > rom
.bss (NOLOAD) : { __BSS_START = .; *(.bss_4) *(.bss_2) *(.bss_1) *(.bss) *(COMMON) __BSS_END = .; } > ram
.nrdata : { __NRDATA_START = .; *(.nrdat_4) *(.nrdat_2) *(.nrdat_1) __NRDATA_END = .; } > near_rom
.ndata : { __NDATA_START = .; *(.ndata_4) *(.ndata_2) *(.ndata_1) __NDATA_END = .; } > near_ram AT > rom
.nbss (NOLOAD) : { __NBSS_START = .; *(.nbss_4) *(.nbss_2) *(.nbss_1) *(.ncommon) __NBSS_END = .; } > near_ram
.heap : { . = ALIGN(4); __HEAP_START = .; . += 0x2000; __HEAP_MAX = .; } > near_ram
.stack : { . = ALIGN(4); . += 0x6000; __STACK_START = .; } > ram
.istack : { . = ALIGN(2); . += 0x100; __ISTACK_START = .; } > ram
}
__DATA_IMAGE_START = LOADADDR(.data);
__NDATA_IMAGE_START = LOADADDR(.ndata);
EOF