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sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd])
* sim/common/ChangeLog: 2017-12-12 Peter Gavin <pgavin@gmail.com> Stafford Horne <shorne@gmail.com> * cgen-accfp.c (remsf, remdf): New function. (cgen_init_accurate_fpu): Add remsf and remdf. * cgen-fpu.h (cgen_fp_ops): Add remsf, remdf, remxf and remtf. * sim-fpu.c (sim_fpu_rem): New function. * sim-fpu.h (sim_fpu_status_invalid_irx): New enum. (sim_fpu_rem): New function. (sim_fpu_print_status): Add case for sim_fpu_status_invalid_irx.
This commit is contained in:
Peter Gavin
Stafford Horne
parent
638d913757
commit
07b95864f3
@ -1,3 +1,14 @@
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2017-12-12 Peter Gavin <pgavin@gmail.com>
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Stafford Horne <shorne@gmail.com>
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* cgen-accfp.c (remsf, remdf): New function.
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(cgen_init_accurate_fpu): Add remsf and remdf.
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* cgen-fpu.h (cgen_fp_ops): Add remsf, remdf, remxf and remtf.
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* sim-fpu.c (sim_fpu_rem): New function.
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* sim-fpu.h (sim_fpu_status_invalid_irx): New enum.
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(sim_fpu_rem): New function.
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(sim_fpu_print_status): Add case for sim_fpu_status_invalid_irx.
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2017-09-06 John Baldwin <jhb@FreeBSD.org>
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* acinclude.m4 (SIM_AC_COMMON): Honor existing CC_FOR_BUILD in
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@ -92,6 +92,25 @@ divsf (CGEN_FPU* fpu, SF x, SF y)
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return res;
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}
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static SF
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remsf (CGEN_FPU* fpu, SF x, SF y)
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{
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sim_fpu op1;
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sim_fpu op2;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_status status;
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sim_fpu_32to (&op1, x);
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sim_fpu_32to (&op2, y);
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status = sim_fpu_rem (&ans, &op1, &op2);
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if (status != 0)
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(*fpu->ops->error) (fpu, status);
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sim_fpu_to32 (&res, &ans);
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return res;
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}
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static SF
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negsf (CGEN_FPU* fpu, SF x)
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{
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@ -452,6 +471,25 @@ divdf (CGEN_FPU* fpu, DF x, DF y)
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return res;
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}
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static DF
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remdf (CGEN_FPU* fpu, DF x, DF y)
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{
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sim_fpu op1;
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sim_fpu op2;
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sim_fpu ans;
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unsigned64 res;
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sim_fpu_status status;
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sim_fpu_64to (&op1, x);
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sim_fpu_64to (&op2, y);
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status = sim_fpu_rem (&ans, &op1, &op2);
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if (status != 0)
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(*fpu->ops->error) (fpu, status);
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sim_fpu_to64(&res, &ans);
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return res;
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}
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static DF
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negdf (CGEN_FPU* fpu, DF x)
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{
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@ -664,6 +702,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
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o->subsf = subsf;
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o->mulsf = mulsf;
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o->divsf = divsf;
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o->remsf = remsf;
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o->negsf = negsf;
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o->abssf = abssf;
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o->sqrtsf = sqrtsf;
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@ -682,6 +721,7 @@ cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
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o->subdf = subdf;
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o->muldf = muldf;
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o->divdf = divdf;
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o->remdf = remdf;
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o->negdf = negdf;
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o->absdf = absdf;
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o->sqrtdf = sqrtdf;
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@ -69,6 +69,7 @@ struct cgen_fp_ops {
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SF (*subsf) (CGEN_FPU*, SF, SF);
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SF (*mulsf) (CGEN_FPU*, SF, SF);
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SF (*divsf) (CGEN_FPU*, SF, SF);
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SF (*remsf) (CGEN_FPU*, SF, SF);
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SF (*negsf) (CGEN_FPU*, SF);
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SF (*abssf) (CGEN_FPU*, SF);
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SF (*sqrtsf) (CGEN_FPU*, SF);
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@ -93,6 +94,7 @@ struct cgen_fp_ops {
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DF (*subdf) (CGEN_FPU*, DF, DF);
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DF (*muldf) (CGEN_FPU*, DF, DF);
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DF (*divdf) (CGEN_FPU*, DF, DF);
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DF (*remdf) (CGEN_FPU*, DF, DF);
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DF (*negdf) (CGEN_FPU*, DF);
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DF (*absdf) (CGEN_FPU*, DF);
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DF (*sqrtdf) (CGEN_FPU*, DF);
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@ -142,6 +144,7 @@ struct cgen_fp_ops {
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XF (*subxf) (CGEN_FPU*, XF, XF);
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XF (*mulxf) (CGEN_FPU*, XF, XF);
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XF (*divxf) (CGEN_FPU*, XF, XF);
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XF (*remxf) (CGEN_FPU*, XF, XF);
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XF (*negxf) (CGEN_FPU*, XF);
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XF (*absxf) (CGEN_FPU*, XF);
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XF (*sqrtxf) (CGEN_FPU*, XF);
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@ -180,6 +183,7 @@ struct cgen_fp_ops {
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TF (*subtf) (CGEN_FPU*, TF, TF);
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TF (*multf) (CGEN_FPU*, TF, TF);
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TF (*divtf) (CGEN_FPU*, TF, TF);
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TF (*remtf) (CGEN_FPU*, TF, TF);
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TF (*negtf) (CGEN_FPU*, TF);
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TF (*abstf) (CGEN_FPU*, TF);
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TF (*sqrttf) (CGEN_FPU*, TF);
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@ -1550,6 +1550,89 @@ sim_fpu_div (sim_fpu *f,
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}
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INLINE_SIM_FPU (int)
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sim_fpu_rem (sim_fpu *f,
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const sim_fpu *l,
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const sim_fpu *r)
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{
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if (sim_fpu_is_snan (l))
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{
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*f = *l;
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f->class = sim_fpu_class_qnan;
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return sim_fpu_status_invalid_snan;
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}
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if (sim_fpu_is_snan (r))
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{
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*f = *r;
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f->class = sim_fpu_class_qnan;
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return sim_fpu_status_invalid_snan;
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}
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if (sim_fpu_is_qnan (l))
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{
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*f = *l;
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f->class = sim_fpu_class_qnan;
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return 0;
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}
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if (sim_fpu_is_qnan (r))
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{
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*f = *r;
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f->class = sim_fpu_class_qnan;
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return 0;
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}
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if (sim_fpu_is_infinity (l))
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{
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*f = sim_fpu_qnan;
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return sim_fpu_status_invalid_irx;
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}
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if (sim_fpu_is_zero (r))
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{
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*f = sim_fpu_qnan;
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return sim_fpu_status_invalid_div0;
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}
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if (sim_fpu_is_zero (l))
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{
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*f = *l;
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return 0;
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}
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if (sim_fpu_is_infinity (r))
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{
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*f = *l;
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return 0;
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}
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{
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sim_fpu n, tmp;
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/* Remainder is calculated as l-n*r, where n is l/r rounded to the
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nearest integer. The variable n is rounded half even. */
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sim_fpu_div (&n, l, r);
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sim_fpu_round_64 (&n, 0, 0);
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if (n.normal_exp < -1) /* If n looks like zero just return l. */
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{
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*f = *l;
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return 0;
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}
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else if (n.class == sim_fpu_class_number
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&& n.normal_exp <= (NR_FRAC_GUARD)) /* If not too large round. */
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do_normal_round (&n, (NR_FRAC_GUARD) - n.normal_exp, sim_fpu_round_near);
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/* Mark 0's as zero so multiply can detect zero. */
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if (n.fraction == 0)
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n.class = sim_fpu_class_zero;
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/* Calculate n*r. */
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sim_fpu_mul (&tmp, &n, r);
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sim_fpu_round_64 (&tmp, 0, 0);
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/* Finally calculate l-n*r. */
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sim_fpu_sub (f, l, &tmp);
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return 0;
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}
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}
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INLINE_SIM_FPU (int)
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sim_fpu_max (sim_fpu *f,
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const sim_fpu *l,
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@ -2533,6 +2616,9 @@ sim_fpu_print_status (int status,
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case sim_fpu_status_invalid_sqrt:
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print (arg, "%sSQRT", prefix);
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break;
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case sim_fpu_status_invalid_irx:
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print (arg, "%sIRX", prefix);
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break;
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case sim_fpu_status_inexact:
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print (arg, "%sX", prefix);
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break;
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@ -146,11 +146,12 @@ typedef enum
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sim_fpu_status_invalid_div0 = 128, /* (X / 0) */
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sim_fpu_status_invalid_cmp = 256, /* compare */
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sim_fpu_status_invalid_sqrt = 512,
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sim_fpu_status_rounded = 1024,
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sim_fpu_status_inexact = 2048,
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sim_fpu_status_overflow = 4096,
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sim_fpu_status_underflow = 8192,
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sim_fpu_status_denorm = 16384,
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sim_fpu_status_invalid_irx = 1024, /* (inf % X) */
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sim_fpu_status_rounded = 2048,
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sim_fpu_status_inexact = 4096,
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sim_fpu_status_overflow = 8192,
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sim_fpu_status_underflow = 16384,
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sim_fpu_status_denorm = 32768,
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} sim_fpu_status;
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@ -230,6 +231,8 @@ INLINE_SIM_FPU (int) sim_fpu_mul (sim_fpu *f,
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const sim_fpu *l, const sim_fpu *r);
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INLINE_SIM_FPU (int) sim_fpu_div (sim_fpu *f,
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const sim_fpu *l, const sim_fpu *r);
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INLINE_SIM_FPU (int) sim_fpu_rem (sim_fpu *f,
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const sim_fpu *l, const sim_fpu *r);
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INLINE_SIM_FPU (int) sim_fpu_max (sim_fpu *f,
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const sim_fpu *l, const sim_fpu *r);
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INLINE_SIM_FPU (int) sim_fpu_min (sim_fpu *f,
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