diff --git a/gas/ChangeLog b/gas/ChangeLog
index 56b7bab053d..110f35b8b04 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2007-04-18  Paul Brook  <paul@codesourcery.com>
+
+	* config/tc-arm.c (do_t_rsb): Use 16-bit encoding when possible.
+
 2007-04-16  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 
 	* config/tc-sh.c (sh_handle_align):  Call as_bad_where instead
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 9b8db7ab36f..b20803f84d8 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -9956,8 +9956,37 @@ do_t_rsb (void)
   inst.instruction |= Rs << 16;
   if (!inst.operands[2].isreg)
     {
-      inst.instruction = (inst.instruction & 0xe1ffffff) | 0x10000000;
-      inst.reloc.type = BFD_RELOC_ARM_T32_IMMEDIATE;
+      bfd_boolean narrow;
+
+      if ((inst.instruction & 0x00100000) != 0)
+	narrow = (current_it_mask == 0);
+      else
+	narrow = (current_it_mask != 0);
+
+      if (Rd > 7 || Rs > 7)
+	narrow = FALSE;
+
+      if (inst.size_req == 4 || !unified_syntax)
+	narrow = FALSE;
+
+      if (inst.reloc.exp.X_op != O_constant
+	  || inst.reloc.exp.X_add_number != 0)
+	narrow = FALSE;
+
+      /* Turn rsb #0 into 16-bit neg.  We should probably do this via
+         relaxation, but it doesn't seem worth the hassle.  */
+      if (narrow)
+	{
+	  inst.reloc.type = BFD_RELOC_UNUSED;
+	  inst.instruction = THUMB_OP16 (T_MNEM_negs);
+	  inst.instruction |= Rs << 3;
+	  inst.instruction |= Rd;
+	}
+      else
+	{
+	  inst.instruction = (inst.instruction & 0xe1ffffff) | 0x10000000;
+	  inst.reloc.type = BFD_RELOC_ARM_T32_IMMEDIATE;
+	}
     }
   else
     encode_thumb32_shifted_operand (2);
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 39459e80d7e..8f6a3907e1c 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2007-04-18  Paul Brook  <paul@codesourcery.com>
+
+	* gas/arm/thumb2_add.s: Add rsb #0 test.
+	* gas/arm/thumb2_add.d: Update expected output.
+
 2007-04-04  Paul Brook  <paul@codesourcery.com>
 
 	* gas/arm/neon-cov.s: Add new vext test.
diff --git a/gas/testsuite/gas/arm/thumb2_add.d b/gas/testsuite/gas/arm/thumb2_add.d
index 2d975258e58..5100bb691a7 100644
--- a/gas/testsuite/gas/arm/thumb2_add.d
+++ b/gas/testsuite/gas/arm/thumb2_add.d
@@ -27,4 +27,4 @@ Disassembly of section .text:
 0+04c <[^>]+> a840      	add	r0, sp, #256
 0+04e <[^>]+> f50d 6580 	add.w	r5, sp, #1024	; 0x400
 0+052 <[^>]+> f20d 1901 	addw	r9, sp, #257	; 0x101
-0+056 <[^>]+> bf00      	nop
+0+056 <[^>]+> 4271      	negs	r1, r6
diff --git a/gas/testsuite/gas/arm/thumb2_add.s b/gas/testsuite/gas/arm/thumb2_add.s
index 3dcd3138fea..a3b178a0529 100644
--- a/gas/testsuite/gas/arm/thumb2_add.s
+++ b/gas/testsuite/gas/arm/thumb2_add.s
@@ -28,4 +28,4 @@ thumb2_add:
 	add r0, sp, #0x100
 	add r5, sp, #0x400
 	add r9, sp, #0x101
-	nop
+	rsbs r1, r6, #0