bfd:
Add ms2.
* archures.c (bfd_mach_ms2): Define.
* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
(ms1_elf_merge_private_bfd_data): Remove unused variables. Add
correct merging logic, with workaround.
(ms1_elf_print_private_bfd_data): Add ms2 case.
* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
cpu:
Add ms2
* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
model.
(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
f-cb2incr, f-rc3): New fields.
(LOOP): New instruction.
(JAL-HAZARD): New hazard.
(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
New operands.
(mul, muli, dbnz, iflush): Enable for ms2
(jal, reti): Has JAL-HAZARD.
(ldctxt, ldfb, stfb): Only ms1.
(fbcb): Only ms1,ms1-003.
(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
fbcbincrs, mfbcbincrs): Enable for ms2.
(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
* ms1.opc (parse_loopsize): New.
(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
(print_pcrel): New.
gas:
Add ms2.
* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
(ms1_architectures): Add ms2.
(md_parse_option): Add ms2.
(md_show_usage): Add ms2.
(md_assemble): Add JAL_HAZARD detection logic.
(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
* doc/c-ms1.texi: New.
* doc/all.texi: Add MS1.
* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
* doc/Makefile.in: Rebuilt.
* doc/Makefile: Rebuilt.
gas/testsuite:
Add ms2.
* gas/ms1/allinsn.d: Adjust pcrel disassembly.
* gas/ms1/errors.exp: Fix target triplet.
* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
* gas/ms1/ms1-16-003.s: Tweak label.
* gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test.
* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
* gas/ms1/relocs.d: Adjust expected machine name and pcrel
disassembly.
* gas/ms1/relocs.exp: Adjust target triplet.
include:
Add ms2.
* elf/ms1.h (EF_MS1_CPU_MS2): New.
opcodes:
Add ms2.
* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
ms1-opc.c, ms1-opc.h: Regenerated.
2005-11-08 19:15:13 +08:00
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2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
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Add ms2
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* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
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model.
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(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
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f-cb2incr, f-rc3): New fields.
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(LOOP): New instruction.
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(JAL-HAZARD): New hazard.
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(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
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New operands.
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(mul, muli, dbnz, iflush): Enable for ms2
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(jal, reti): Has JAL-HAZARD.
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(ldctxt, ldfb, stfb): Only ms1.
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(fbcb): Only ms1,ms1-003.
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(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
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fbcbincrs, mfbcbincrs): Enable for ms2.
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(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
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* ms1.opc (parse_loopsize): New.
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(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
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(print_pcrel): New.
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2005-10-29 03:33:06 +08:00
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2005-10-28 Dave Brolley <brolley@redhat.com>
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Contribute the following change:
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2003-09-24 Dave Brolley <brolley@redhat.com>
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* frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
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CGEN_ATTR_VALUE_TYPE.
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* m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
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Use cgen_bitset_intersect_p.
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* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
imm operand is needed.
(adjnz, sbjnz): Pass the right operands.
(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
unary-insn): Add -g variants for opcodes that need to support :G.
(not.BW:G, push.BW:G): Call it.
(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
stzx16-imm8-imm8-abs16): Fix operand typos.
* m32c.opc (m32c_asm_hash): Support bnCND.
(parse_signed4n, print_signed4n): New.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
2005-10-28 07:54:17 +08:00
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2005-10-27 DJ Delorie <dj@redhat.com>
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* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
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(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
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arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
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imm operand is needed.
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(adjnz, sbjnz): Pass the right operands.
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(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
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unary-insn): Add -g variants for opcodes that need to support :G.
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(not.BW:G, push.BW:G): Call it.
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(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
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stzx16-imm8-imm8-abs16): Fix operand typos.
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* m32c.opc (m32c_asm_hash): Support bnCND.
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(parse_signed4n, print_signed4n): New.
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2005-10-26 22:59:12 +08:00
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2005-10-26 DJ Delorie <dj@redhat.com>
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* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
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(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
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mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
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dsp8[sp] is signed.
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(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
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(mov.BW:S r0,r1): Fix typo r1l->r1.
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(tst): Allow :G suffix.
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* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
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2005-10-26 15:49:05 +08:00
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2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
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* m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
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2005-10-26 02:52:02 +08:00
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2005-10-25 DJ Delorie <dj@redhat.com>
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* m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
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making one a macro of the other.
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[cpu]
* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
indexld, indexls): .w variants have `1' bit.
(rot32.b): QI, not SI.
(rot32.w): HI, not SI.
(xchg16): HI for .w variant.
[opcodes]
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
2005-10-22 08:03:13 +08:00
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2005-10-21 DJ Delorie <dj@redhat.com>
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* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
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(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
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indexld, indexls): .w variants have `1' bit.
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(rot32.b): QI, not SI.
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(rot32.w): HI, not SI.
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(xchg16): HI for .w variant.
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2005-10-19 22:44:17 +08:00
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2005-10-19 Nick Clifton <nickc@redhat.com>
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* m32r.opc (parse_slo16): Fix bad application of previous patch.
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2005-10-18 15:53:17 +08:00
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2005-10-18 Andreas Schwab <schwab@suse.de>
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* m32r.opc (parse_slo16): Better version of previous patch.
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2005-10-14 16:33:27 +08:00
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2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
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* cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
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size.
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2005-07-26 11:21:53 +08:00
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2005-07-25 DJ Delorie <dj@redhat.com>
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* m32c.opc (parse_unsigned8): Add %dsp8().
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(parse_signed8): Add %hi8().
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(parse_unsigned16): Add %dsp16().
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(parse_signed16): Add %lo16() and %hi16().
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(parse_lab_5_3): Make valuep a bfd_vma *.
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2005-07-19 18:01:32 +08:00
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2005-07-18 Nick Clifton <nickc@redhat.com>
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* m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
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components.
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(f-lab32-jmp-s): Fix insertion sequence.
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(Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
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(Dsp-40-s8): Make parameter be signed.
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(Dsp-40-s16): Likewise.
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(Dsp-48-s8): Likewise.
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(Dsp-48-s16): Likewise.
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(Imm-13-u3): Likewise. (Despite its name!)
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(BitBase16-16-s8): Make the parameter be unsigned.
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(BitBase16-8-u11-S): Likewise.
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(Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
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jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
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relaxation.
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* m32c.opc: Fix formatting.
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Use safe-ctype.h instead of ctype.h
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Move duplicated code sequences into a macro.
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Fix compile time warnings about signedness mismatches.
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Remove dead code.
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(parse_lab_5_3): New parser function.
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2005-07-17 02:43:55 +08:00
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2005-07-16 Jim Blandy <jimb@redhat.com>
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* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
|
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to represent isa sets.
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2005-07-16 04:31:17 +08:00
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2005-07-15 Jim Blandy <jimb@redhat.com>
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* m32c.cpu, m32c.opc: Fix copyright.
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ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
2005-07-15 06:52:28 +08:00
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2005-07-14 Jim Blandy <jimb@redhat.com>
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* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
|
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|
2005-07-14 21:59:51 +08:00
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|
2005-07-14 Alan Modra <amodra@bigpond.net.au>
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|
|
|
* ms1.opc (print_dollarhex): Correct format string.
|
|
|
|
|
|
|
2005-07-06 16:18:52 +08:00
|
|
|
|
2005-07-06 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* iq2000.cpu: Include from binutils cpu dir.
|
|
|
|
|
|
|
2005-07-05 23:07:46 +08:00
|
|
|
|
2005-07-05 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
|
|
|
|
|
|
unsigned in order to avoid compile time warnings about sign
|
|
|
|
|
|
conflicts.
|
|
|
|
|
|
|
|
|
|
|
|
* ms1.opc (parse_*): Likewise.
|
|
|
|
|
|
(parse_imm16): Use a "void *" as it is passed both signed and
|
|
|
|
|
|
unsigned arguments.
|
|
|
|
|
|
|
2005-07-01 19:16:33 +08:00
|
|
|
|
2005-07-01 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.opc: Update to ISO C90 function declaration style.
|
|
|
|
|
|
* iq2000.opc: Likewise.
|
|
|
|
|
|
* m32r.opc: Likewise.
|
|
|
|
|
|
* sh.opc: Likewise.
|
|
|
|
|
|
|
2005-06-15 23:33:07 +08:00
|
|
|
|
2005-06-15 Dave Brolley <brolley@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
Contributed by Red Hat.
|
|
|
|
|
|
* ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
|
|
|
|
|
|
* ms1.opc: New file. Written by Stan Cox.
|
|
|
|
|
|
|
2005-05-10 18:21:13 +08:00
|
|
|
|
2005-05-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Update the address and phone number of the FSF organization in
|
|
|
|
|
|
the GPL notices in the following files:
|
|
|
|
|
|
cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
|
|
|
|
|
|
m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
|
|
|
|
|
|
sh64-media.cpu, simplify.inc
|
|
|
|
|
|
|
2005-02-24 21:36:46 +08:00
|
|
|
|
2005-02-24 Alan Modra <amodra@bigpond.net.au>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.opc (parse_A): Warning fix.
|
|
|
|
|
|
|
2005-02-24 00:04:40 +08:00
|
|
|
|
2005-02-23 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.opc: Fixed compile time warnings about differing signed'ness
|
|
|
|
|
|
of pointers passed to functions.
|
|
|
|
|
|
* m32r.opc: Likewise.
|
|
|
|
|
|
|
2005-02-12 00:09:30 +08:00
|
|
|
|
2005-02-11 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* iq2000.opc (parse_jtargq10): Change type of valuep argument to
|
|
|
|
|
|
'bfd_vma *' in order avoid compile time warning message.
|
|
|
|
|
|
|
2005-01-28 09:50:18 +08:00
|
|
|
|
2005-01-28 Hans-Peter Nilsson <hp@axis.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cris.cpu (mstep): Add missing insn.
|
|
|
|
|
|
|
2005-01-26 04:22:41 +08:00
|
|
|
|
2005-01-25 Alexandre Oliva <aoliva@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
2004-11-10 Alexandre Oliva <aoliva@redhat.com>
|
|
|
|
|
|
* frv.cpu: Add support for TLS annotations in loads and calll.
|
|
|
|
|
|
* frv.opc (parse_symbolic_address): New.
|
|
|
|
|
|
(parse_ldd_annotation): New.
|
|
|
|
|
|
(parse_call_annotation): New.
|
|
|
|
|
|
(parse_ld_annotation): New.
|
|
|
|
|
|
(parse_ulo16, parse_uslo16): Use parse_symbolic_address.
|
|
|
|
|
|
Introduce TLS relocations.
|
|
|
|
|
|
(parse_d12, parse_s12, parse_u12): Likewise.
|
|
|
|
|
|
(parse_uhi16): Likewise. Fix constant checking on 64-bit host.
|
|
|
|
|
|
(parse_call_label, print_at): New.
|
|
|
|
|
|
|
2004-12-21 12:37:58 +08:00
|
|
|
|
2004-12-21 Mikael Starvik <starvik@axis.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cris.cpu (cris-set-mem): Correct integral write semantics.
|
|
|
|
|
|
|
2004-11-29 19:52:11 +08:00
|
|
|
|
2004-11-29 Hans-Peter Nilsson <hp@axis.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cris.cpu: New file.
|
|
|
|
|
|
|
2004-11-15 22:30:12 +08:00
|
|
|
|
2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* iq2000.cpu: Added quotes around macro arguments so that they
|
|
|
|
|
|
will work with newer versions of guile.
|
|
|
|
|
|
|
2004-10-27 17:30:09 +08:00
|
|
|
|
2004-10-27 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
|
|
|
|
|
|
wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
|
|
|
|
|
|
operand.
|
|
|
|
|
|
* iq2000.cpu (dnop index): Rename to _index to avoid complications
|
|
|
|
|
|
with guile.
|
|
|
|
|
|
|
2004-08-27 17:32:02 +08:00
|
|
|
|
2004-08-27 Richard Sandiford <rsandifo@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (cfmovs): Change UNIT attribute to FMALL.
|
|
|
|
|
|
|
2004-05-15 21:10:30 +08:00
|
|
|
|
2004-05-15 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
|
|
|
|
|
|
|
2004-03-30 17:29:19 +08:00
|
|
|
|
2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
|
|
|
|
|
|
|
|
|
|
|
* m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
|
|
|
|
|
|
|
2004-03-01 18:11:46 +08:00
|
|
|
|
2004-03-01 Richard Sandiford <rsandifo@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (define-arch frv): Add fr450 mach.
|
|
|
|
|
|
(define-mach fr450): New.
|
|
|
|
|
|
(define-model fr450): New. Add profile units to every fr450 insn.
|
|
|
|
|
|
(define-attr UNIT): Add MDCUTSSI.
|
|
|
|
|
|
(define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
|
|
|
|
|
|
(define-attr AUDIO): New boolean.
|
|
|
|
|
|
(f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
|
|
|
|
|
|
(f-LRA-null, f-TLBPR-null): New fields.
|
|
|
|
|
|
(scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
|
|
|
|
|
|
(tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
|
|
|
|
|
|
(LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
|
|
|
|
|
|
(LRA-null, TLBPR-null): New macros.
|
|
|
|
|
|
(iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
|
|
|
|
|
|
(load-real-address): New macro.
|
|
|
|
|
|
(lrai, lrad, tlbpr): New instructions.
|
|
|
|
|
|
(media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
|
|
|
|
|
|
(mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
|
|
|
|
|
|
(mdcutssi): Change UNIT attribute to MDCUTSSI.
|
|
|
|
|
|
(media-low-clear-semantics, media-scope-limit-semantics)
|
|
|
|
|
|
(media-quad-limit, media-quad-shift): New macros.
|
|
|
|
|
|
(mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
|
|
|
|
|
|
* frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
|
|
|
|
|
|
(frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
|
|
|
|
|
|
(frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
|
|
|
|
|
|
(fr450_unit_mapping): New array.
|
|
|
|
|
|
(fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
|
|
|
|
|
|
for new MDCUTSSI unit.
|
|
|
|
|
|
(fr450_check_insn_major_constraints): New function.
|
|
|
|
|
|
(check_insn_major_constraints): Use it.
|
|
|
|
|
|
|
2004-03-01 17:42:33 +08:00
|
|
|
|
2004-03-01 Richard Sandiford <rsandifo@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
|
|
|
|
|
|
(scutss): Change unit to I0.
|
|
|
|
|
|
(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
|
|
|
|
|
|
(mqsaths): Fix FR400-MAJOR categorization.
|
|
|
|
|
|
(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
|
|
|
|
|
|
(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
|
|
|
|
|
|
* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
|
|
|
|
|
|
combinations.
|
|
|
|
|
|
|
cpu/
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
(rstb, rsth, rst, rstd, rstq): Delete.
(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
gas/testsuite/
* gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops.
(rstbf, rsthf, rstf, rstdf, rstqf): Likewise.
* gas/frv/allinsn.d: Update accordingly.
opcodes/
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
sim/frv/
* decode.c, decode.h, model.c, sem.c: Regenerate.
sim/testsuite/
* sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
* sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
2004-03-01 17:26:33 +08:00
|
|
|
|
2004-03-01 Richard Sandiford <rsandifo@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
|
|
|
|
|
|
(rstb, rsth, rst, rstd, rstq): Delete.
|
|
|
|
|
|
(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
|
|
|
|
|
|
|
2004-02-24 00:46:46 +08:00
|
|
|
|
2004-02-23 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Apply these patches from Renesas:
|
|
|
|
|
|
|
|
|
|
|
|
2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cpu/m32r.opc (my_print_insn): Fixed incorrect output when
|
|
|
|
|
|
disassembling codes for 0x*2 addresses.
|
|
|
|
|
|
|
|
|
|
|
|
2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
|
|
|
|
|
|
|
|
|
|
|
|
2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cpu/m32r.cpu : Add new model m32r2.
|
|
|
|
|
|
Add new instructions.
|
|
|
|
|
|
Replace occurrances of 'Mitsubishi' with 'Renesas'.
|
|
|
|
|
|
Changed PIPE attr of push from O to OS.
|
|
|
|
|
|
Care for Little-endian of M32R.
|
|
|
|
|
|
* cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
|
|
|
|
|
|
Care for Little-endian of M32R.
|
|
|
|
|
|
(parse_slo16): signed extension for value.
|
|
|
|
|
|
|
2004-02-21 00:23:01 +08:00
|
|
|
|
2004-02-20 Andrew Cagney <cagney@redhat.com>
|
|
|
|
|
|
|
2004-02-21 00:26:45 +08:00
|
|
|
|
* m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
|
|
|
|
|
|
Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
|
|
|
|
|
|
|
2004-02-21 00:23:01 +08:00
|
|
|
|
* sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
|
|
|
|
|
|
written by Ben Elliston.
|
|
|
|
|
|
|
2004-01-14 18:05:00 +08:00
|
|
|
|
2004-01-14 Richard Sandiford <rsandifo@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (UNIT): Add IACC.
|
|
|
|
|
|
(iacc-multiply-r-r): Use it.
|
|
|
|
|
|
* frv.opc (fr400_unit_mapping): Add entry for IACC.
|
|
|
|
|
|
(fr500_unit_mapping, fr550_unit_mapping): Likewise.
|
|
|
|
|
|
|
2004-01-07 03:18:37 +08:00
|
|
|
|
2004-01-06 Alexandre Oliva <aoliva@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
2003-12-19 Alexandre Oliva <aoliva@redhat.com>
|
|
|
|
|
|
* frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
|
|
|
|
|
|
cut&paste errors in shifting/truncating numerical operands.
|
|
|
|
|
|
2003-08-08 Alexandre Oliva <aoliva@redhat.com>
|
|
|
|
|
|
* frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
|
|
|
|
|
|
(parse_uslo16): Likewise.
|
|
|
|
|
|
(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
|
|
|
|
|
|
(parse_d12): Parse gotoff12 and gotofffuncdesc12.
|
|
|
|
|
|
(parse_s12): Likewise.
|
|
|
|
|
|
2003-08-04 Alexandre Oliva <aoliva@redhat.com>
|
|
|
|
|
|
* frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
|
|
|
|
|
|
(parse_uslo16): Likewise.
|
|
|
|
|
|
(parse_uhi16): Parse gothi and gotfuncdeschi.
|
|
|
|
|
|
(parse_d12): Parse got12 and gotfuncdesc12.
|
|
|
|
|
|
(parse_s12): Likewise.
|
|
|
|
|
|
|
2003-10-11 03:29:38 +08:00
|
|
|
|
2003-10-10 Dave Brolley <brolley@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (dnpmop): New p-macro.
|
|
|
|
|
|
(GRdoublek): Use dnpmop.
|
|
|
|
|
|
(CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
|
|
|
|
|
|
(store-double-r-r): Use (.sym regtype doublek).
|
|
|
|
|
|
(r-store-double): Ditto.
|
|
|
|
|
|
(store-double-r-r-u): Ditto.
|
|
|
|
|
|
(conditional-store-double): Ditto.
|
|
|
|
|
|
(conditional-store-double-u): Ditto.
|
|
|
|
|
|
(store-double-r-simm): Ditto.
|
|
|
|
|
|
(fmovs): Assign to UNIT FMALL.
|
|
|
|
|
|
|
2003-10-09 01:53:40 +08:00
|
|
|
|
2003-10-06 Dave Brolley <brolley@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu, frv.opc: Add support for fr550.
|
|
|
|
|
|
|
2003-09-25 03:04:54 +08:00
|
|
|
|
2003-09-24 Dave Brolley <brolley@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (u-commit): New modelling unit for fr500.
|
|
|
|
|
|
(mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
|
|
|
|
|
|
(commit-r): Use u-commit model for fr500.
|
|
|
|
|
|
(commit): Ditto.
|
|
|
|
|
|
(conditional-float-binary-op): Take profiling data as an argument.
|
|
|
|
|
|
Update callers.
|
|
|
|
|
|
(ne-float-binary-op): Ditto.
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2003-09-20 02:59:13 +08:00
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2003-09-19 Michael Snyder <msnyder@redhat.com>
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* frv.cpu (nldqi): Delete unimplemented instruction.
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2003-09-13 06:04:22 +08:00
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2003-09-12 Dave Brolley <brolley@redhat.com>
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* frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
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(clear-ne-flag-r): Pass insn profiling in as an argument. Call
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frv_ref_SI to get input register referenced for profiling.
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(clear-ne-flag-all): Pass insn profiling in as an argument.
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(clrgr,clrfr,clrga,clrfa): Add profiling information.
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2003-09-12 04:53:33 +08:00
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2003-09-11 Michael Snyder <msnyder@redhat.com>
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* frv.cpu: Typographical corrections.
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2003-09-10 06:27:28 +08:00
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2003-09-09 Dave Brolley <brolley@redhat.com>
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* frv.cpu (media-dual-complex): Change UNIT to FMALL.
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(conditional-media-dual-complex, media-quad-complex): Likewise.
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2003-09-05 06:46:10 +08:00
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2003-09-04 Dave Brolley <brolley@redhat.com>
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* frv.cpu (register-transfer): Pass in all attributes in on argument.
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Update all callers.
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(conditional-register-transfer): Ditto.
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(cache-preload): Ditto.
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(floating-point-conversion): Ditto.
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(floating-point-neg): Ditto.
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(float-abs): Ditto.
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(float-binary-op-s): Ditto.
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(conditional-float-binary-op): Ditto.
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(ne-float-binary-op): Ditto.
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(float-dual-arith): Ditto.
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(ne-float-dual-arith): Ditto.
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2003-09-03 Dave Brolley <brolley@redhat.com>
* frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
* frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
MCLRACC-1.
(A): Removed operand.
(A0,A1): New operands replace operand A.
(mnop): Now a real insn
(mclracc): Removed insn.
(mclracc-0, mclracc-1): New insns replace mclracc.
(all insns): Use new UNIT attributes.
2003-09-04 07:03:45 +08:00
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2003-09-03 Dave Brolley <brolley@redhat.com>
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* frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
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* frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
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MCLRACC-1.
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(A): Removed operand.
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(A0,A1): New operands replace operand A.
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(mnop): Now a real insn
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(mclracc): Removed insn.
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(mclracc-0, mclracc-1): New insns replace mclracc.
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(all insns): Use new UNIT attributes.
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2003-08-21 21:37:01 +08:00
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2003-08-21 Nick Clifton <nickc@redhat.com>
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* frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
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and u-media-dual-btoh with output parameter.
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(cmbtoh): Add profiling hack.
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2003-08-20 23:40:02 +08:00
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2003-08-19 Michael Snyder <msnyder@redhat.com>
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* frv.cpu: Fix typo, Frintkeven -> FRintkeven
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2003-06-11 05:24:48 +08:00
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2003-06-10 Doug Evans <dje@sebabeach.org>
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* frv.cpu: Add IDOC attribute.
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2003-06-07 05:49:30 +08:00
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2003-06-06 Andrew Cagney <cagney@redhat.com>
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Contributed by Red Hat.
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* iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
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Stan Cox, and Frank Ch. Eigler.
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* iq2000.opc: New file. Written by Ben Elliston, Frank
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Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
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* iq2000m.cpu: New file. Written by Jeff Johnston.
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* iq10.cpu: New file. Written by Jeff Johnston.
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2003-06-06 00:04:20 +08:00
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2003-06-05 Nick Clifton <nickc@redhat.com>
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* frv.cpu (FRintieven): New operand. An even-numbered only
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version of the FRinti operand.
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(FRintjeven): Likewise for FRintj.
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(FRintkeven): Likewise for FRintk.
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|
(mdcutssi, media-dual-word-rotate-r-r, mqsaths,
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|
media-quad-arith-sat-semantics, media-quad-arith-sat,
|
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|
conditional-media-quad-arith-sat, mdunpackh,
|
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|
media-quad-multiply-semantics, media-quad-multiply,
|
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|
conditional-media-quad-multiply, media-quad-complex-i,
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|
media-quad-multiply-acc-semantics, media-quad-multiply-acc,
|
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|
conditional-media-quad-multiply-acc, munpackh,
|
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|
media-quad-multiply-cross-acc-semantics, mdpackh,
|
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|
media-quad-multiply-cross-acc, mbtoh-semantics,
|
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|
media-quad-cross-multiply-cross-acc-semantics,
|
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|
media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
|
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|
media-quad-cross-multiply-acc-semantics, cmbtoh,
|
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|
media-quad-cross-multiply-acc, media-quad-complex, mhtob,
|
|
|
|
|
|
media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
|
|
|
|
|
|
cmhtob): Use new operands.
|
|
|
|
|
|
* frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
|
2005-07-14 21:59:51 +08:00
|
|
|
|
(parse_even_register): New function.
|
2003-06-06 00:04:20 +08:00
|
|
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|
|
2003-06-04 01:15:25 +08:00
|
|
|
|
2003-06-03 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
|
|
|
|
|
|
immediate value not unsigned.
|
|
|
|
|
|
|
2003-06-03 23:41:12 +08:00
|
|
|
|
2003-06-03 Andrew Cagney <cagney@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
Contributed by Red Hat.
|
|
|
|
|
|
* frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
|
|
|
|
|
|
and Eric Christopher.
|
|
|
|
|
|
* frv.opc: New file. Written by Catherine Moore, and Dave
|
|
|
|
|
|
Brolley.
|
|
|
|
|
|
* simplify.inc: New file. Written by Doug Evans.
|
|
|
|
|
|
|
2003-05-03 08:44:23 +08:00
|
|
|
|
2003-05-02 Andrew Cagney <cagney@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* New file.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Local Variables:
|
|
|
|
|
|
mode: change-log
|
|
|
|
|
|
left-margin: 8
|
|
|
|
|
|
fill-column: 74
|
|
|
|
|
|
version-control: never
|
|
|
|
|
|
End:
|
