bfd/
* configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo.
(bfd_elf32_bigarm_symbian_vec): Likewise.
(bfd_elf32_bigarm_vxworks_vec): Likewise.
(bfd_elf32_littlearm_vec): Likewise.
(bfd_elf32_littlearm_symbian_vec): Likewise.
(bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerate.
* elf32-arm.c: Include libiberty.h and elf-vxworks.h.
(RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros.
(elf32_arm_vxworks_bed): Add forward declaration.
(elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12.
(elf32_arm_vxworks_exec_plt0_entry): New table.
(elf32_arm_vxworks_exec_plt_entry): Likewise.
(elf32_arm_vxworks_shared_plt_entry): Likewise.
(elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields.
(reloc_section_p): New function.
(create_got_section): Use RELOC_SECTION.
(elf32_arm_create_dynamic_sections): Likewise. Call
elf_vxworks_create_dynamic_sections for VxWorks targets.
Choose between the two possible values of plt_header_size
and plt_entry_size.
(elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2.
(elf32_arm_abs12_reloc): New function.
(elf32_arm_final_link_relocate): Call it. Allow the creation of
dynamic R_ARM_ABS12 relocs on VxWorks. Use reloc_section_p,
RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION. Initialize the
r_addend fields of relocs. On rela targets, skip any code that
adjusts in-place addends. When using _bfd_link_final_relocate
to perform a final relocation, pass rel->r_addend as the addend
argument.
(elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks
object, ignore flags that are not standard on VxWorks.
(elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12
relocs on VxWorks. Use reloc_section_p.
(elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE.
(allocate_dynrelocs): Use RELOC_SIZE. Account for the size of
.rela.plt.unloaded relocs on VxWorks targets.
(elf32_arm_size_dynamic_sections): Use RELOC_SIZE. Check for
.rela.plt.unloaded as well as .rel(a).plt. Add DT_RELA* tags
instead of DT_REL* tags on RELA targets.
(elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE
and SWAP_RELOC_OUT. Initialize r_addend fields. Handle VxWorks
PLT entries. Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
(elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE
and SWAP_RELOC_OUT. Initialize r_addend fields. Handle DT_RELASZ
like DT_RELSZ. Handle the VxWorks form of initial PLT entry.
Correct the .rela.plt.unreloaded symbol indexes.
(elf32_arm_output_symbol_hook): Call the VxWorks version of this
hook on VxWorks targets.
(elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true.
Minor formatting tweak.
(elf32_arm_vxworks_final_write_processing): New function.
(elf_backend_add_symbol_hook): Override for VxWorks and reset
for Symbian.
(elf_backend_final_write_processing): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_want_plt_sym): Likewise.
(ELF_MAXPAGESIZE): Likewise.
(elf_backend_may_use_rel_p): Minor formatting tweak.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
(elf_backend_rela_normal): Likewise.
* Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h.
gas/
* config/tc-arm.c (md_apply_fix): Install a value of zero into a
BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
R_ARM_ABS12 reloc.
(tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
gas/testsuite/
* gas/arm/abs12.s, gas/arm/abs12.d: New test.
* gas/arm/pic.d: Skip for *-*-vxworks*...
* gas/arm/pic_vxworks.d: ...use this version instead.
* gas/arm/unwind_vxworks.d: Fix expected output.
ld/
* emulparams/armelf_vxworks.sh: Include vxworks.sh.
(MAXPAGESIZE): Define.
* emulparams/vxworks.sh: Undefine.
* Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd,
* ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd,
* ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s,
* ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd,
* ld-arm/vxworks2-static.sd: New tests.
* ld-arm/arm-elf.exp: Run them.
2006-03-07 16:39:21 +08:00
|
|
|
|
2006-03-07 Richard Sandiford <richard@codesourcery.com>
|
|
|
|
|
|
Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
Zack Weinberg <zack@codesourcery.com>
|
|
|
|
|
|
Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
Ricardo Anguiano <anguiano@codesourcery.com>
|
|
|
|
|
|
Phil Edwards <phil@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (md_apply_fix): Install a value of zero into a
|
|
|
|
|
|
BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
|
|
|
|
|
|
R_ARM_ABS12 reloc.
|
|
|
|
|
|
(tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
|
|
|
|
|
|
relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
|
|
|
|
|
|
relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
|
|
|
|
|
|
|
2006-03-07 02:02:06 +08:00
|
|
|
|
2006-03-06 Bob Wilson <bob.wilson@acm.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
|
|
|
|
|
|
even when using the text-section-literals option.
|
|
|
|
|
|
|
2006-03-06 21:42:05 +08:00
|
|
|
|
2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
|
|
|
|
|
|
and cf.
|
|
|
|
|
|
(m68k_ip): <case 'J'> Check we have some control regs.
|
|
|
|
|
|
(md_parse_option): Allow raw arch switch.
|
|
|
|
|
|
(m68k_init_arch): Better detection of arch/cpu mismatch. Detect
|
|
|
|
|
|
whether 68881 or cfloat was meant by -mfloat.
|
|
|
|
|
|
(md_show_usage): Adjust extension display.
|
|
|
|
|
|
(m68k_elf_final_processing): Adjust.
|
|
|
|
|
|
|
2006-03-03 23:25:31 +08:00
|
|
|
|
2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (avr_mod_hash_value): New function.
|
|
|
|
|
|
(md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
|
|
|
|
|
|
BFD_RELOC_MS8_LDI for hlo8() and hhi8()
|
|
|
|
|
|
(md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
|
|
|
|
|
|
instead of int avr_ldi_expression: use avr_mod_hash_value instead
|
|
|
|
|
|
of (int).
|
|
|
|
|
|
(tc_gen_reloc): Handle substractions of symbols, if possible do
|
|
|
|
|
|
fixups, abort otherwise.
|
|
|
|
|
|
* config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
|
|
|
|
|
|
tc_fix_adjustable): Define.
|
|
|
|
|
|
|
2006-03-03 09:10:42 +08:00
|
|
|
|
2006-03-02 James E Wilson <wilson@specifix.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
|
|
|
|
|
|
change the template, then clear md.slot[curr].end_of_insn_group.
|
|
|
|
|
|
|
2006-02-28 15:57:09 +08:00
|
|
|
|
2006-02-28 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
* macro.c (get_any_string): Don't insert quotes for <>-quoted input.
|
|
|
|
|
|
|
2006-02-28 15:55:36 +08:00
|
|
|
|
2006-02-28 Jan Beulich <jbeulich@novell.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR/1070
|
|
|
|
|
|
* macro.c (getstring): Don't treat parentheses special anymore.
|
|
|
|
|
|
(get_any_string): Don't consider '(' and ')' as quoting anymore.
|
|
|
|
|
|
Special-case '(', ')', '[', and ']' when dealing with non-quoting
|
|
|
|
|
|
characters.
|
|
|
|
|
|
|
2006-02-28 08:38:19 +08:00
|
|
|
|
2006-02-28 Mat <mat@csail.mit.edu>
|
|
|
|
|
|
|
|
|
|
|
|
* dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
|
|
|
|
|
|
|
2006-02-28 07:07:06 +08:00
|
|
|
|
2006-02-27 Jakub Jelinek <jakub@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
|
|
|
|
|
|
field.
|
|
|
|
|
|
(CFI_signal_frame): Define.
|
|
|
|
|
|
(cfi_pseudo_table): Add .cfi_signal_frame.
|
|
|
|
|
|
(dot_cfi): Handle CFI_signal_frame.
|
|
|
|
|
|
(output_cie): Handle cie->signal_frame.
|
|
|
|
|
|
(select_cie_for_fde): Don't share CIE if signal_frame flag is
|
|
|
|
|
|
different. Copy signal_frame from FDE to newly created CIE.
|
|
|
|
|
|
* doc/as.texinfo: Document .cfi_signal_frame.
|
|
|
|
|
|
|
2006-02-28 00:26:26 +08:00
|
|
|
|
2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/Makefile.am: Add html target.
|
|
|
|
|
|
* doc/Makefile.in: Regenerate.
|
|
|
|
|
|
* po/Make-in: Add html target.
|
|
|
|
|
|
|
2006-02-27 23:35:37 +08:00
|
|
|
|
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
2006-02-28 07:21:41 +08:00
|
|
|
|
* config/tc-i386.c (output_insn): Support Intel Merom New
|
2006-02-27 23:35:37 +08:00
|
|
|
|
Instructions.
|
|
|
|
|
|
|
2006-02-28 07:21:41 +08:00
|
|
|
|
* config/tc-i386.h (CpuMNI): New.
|
2006-02-27 23:35:37 +08:00
|
|
|
|
(CpuUnknownFlags): Add CpuMNI.
|
|
|
|
|
|
|
2006-02-25 09:34:09 +08:00
|
|
|
|
2006-02-24 David S. Miller <davem@sunset.davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c (priv_reg_table): Add entry for "gl".
|
|
|
|
|
|
(hpriv_reg_table): New table for hyperprivileged registers.
|
|
|
|
|
|
(sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
|
|
|
|
|
|
register encoding.
|
|
|
|
|
|
|
[include/elf]
* m32c.h: Add relax relocs.
[cpu]
* m32c.cpu (RL_TYPE): New attribute, with macros.
(Lab-8-24): Add RELAX.
(unary-insn-defn-g, binary-arith-imm-dst-defn,
binary-arith-imm4-dst-defn): Add 1ADDR attribute.
(binary-arith-src-dst-defn): Add 2ADDR attribute.
(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
attribute.
(jsri16, jsri32): Add 1ADDR attribute.
(jsr32.w, jsr32.a): Add JUMP attribute.
[opcodes]
* m32c-desc.c: Regenerate with linker relaxation attributes.
* m32c-desc.h: Likewise.
* m32c-dis.c: Likewise.
* m32c-opc.c: Likewise.
[gas]
* config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
(tc_gen_reloc): Don't define.
* config/tc-m32c.c (rl_for, relaxable): New convenience macros.
(OPTION_LINKRELAX): New.
(md_longopts): Add it.
(m32c_relax): New.
(md_parse_options): Set it.
(md_assemble): Emit relaxation relocs as needed.
(md_convert_frag): Emit relaxation relocs as needed.
(md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
(m32c_apply_fix): New.
(tc_gen_reloc): New.
(m32c_force_relocation): Force out jump relocs when relaxing.
(m32c_fix_adjustable): Return false if relaxing.
[bfd]
* elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs.
(m32c_elf_relocate_section): Don't relocate them.
(compare_reloc): New.
(relax_reloc): Remove.
(m32c_offset_for_reloc): New.
(m16c_addr_encodings): New.
(m16c_jmpaddr_encodings): New.
(m32c_addr_encodings): New.
(m32c_elf_relax_section): Relax jumps and address displacements.
(m32c_elf_relax_delete_bytes): Adjust for internal syms. Fix up
short jumps.
* reloc.c: Add m32c relax relocs.
* libbfd.h: Regenerate.
2006-02-25 06:10:36 +08:00
|
|
|
|
2006-02-24 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
|
|
|
|
|
|
(tc_gen_reloc): Don't define.
|
|
|
|
|
|
* config/tc-m32c.c (rl_for, relaxable): New convenience macros.
|
|
|
|
|
|
(OPTION_LINKRELAX): New.
|
|
|
|
|
|
(md_longopts): Add it.
|
|
|
|
|
|
(m32c_relax): New.
|
|
|
|
|
|
(md_parse_options): Set it.
|
|
|
|
|
|
(md_assemble): Emit relaxation relocs as needed.
|
|
|
|
|
|
(md_convert_frag): Emit relaxation relocs as needed.
|
|
|
|
|
|
(md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
|
|
|
|
|
|
(m32c_apply_fix): New.
|
|
|
|
|
|
(tc_gen_reloc): New.
|
|
|
|
|
|
(m32c_force_relocation): Force out jump relocs when relaxing.
|
|
|
|
|
|
(m32c_fix_adjustable): Return false if relaxing.
|
|
|
|
|
|
|
2006-02-24 Paul Brook <paul@codesourcery.com>
gas/
* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
(struct asm_barrier_opt): Define.
(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
(parse_psr): Accept V7M psr names.
(parse_barrier): New function.
(enum operand_parse_code): Add OP_oBARRIER.
(parse_operands): Implement OP_oBARRIER.
(do_barrier): New function.
(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
(do_t_cpsi): Add V7M restrictions.
(do_t_mrs, do_t_msr): Validate V7M variants.
(md_assemble): Check for NULL variants.
(v7m_psrs, barrier_opt_names): New tables.
(insns): Add V7 instructions. Mark V6 instructions absent from V7M.
(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
(struct cpu_arch_ver_table): Define.
(cpu_arch_ver): New.
(aeabi_set_public_attributes): Use cpu_arch_ver. Set
Tag_CPU_arch_profile.
* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
* gas/arm/thumb32.d: Fix expected msr and mrs output.
* gas/arm/arch7.d: New test.
* gas/arm/arch7.s: New test.
* gas/arm/arch7m-bad.l: New test.
* gas/arm/arch7m-bad.d: New test.
* gas/arm/arch7m-bad.s: New test.
include/opcode/
* arm.h: Add V7 feature bits.
opcodes/
* arm-dis.c (arm_opcodes): Add V7 instructions.
(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
(print_arm_address): New function.
(print_insn_arm): Use it. Add 'P' and 'U' cases.
(psr_name): New function.
(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
2006-02-24 23:36:36 +08:00
|
|
|
|
2006-02-24 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
|
|
|
|
|
|
arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
|
|
|
|
|
|
(struct asm_barrier_opt): Define.
|
|
|
|
|
|
(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
|
|
|
|
|
|
(parse_psr): Accept V7M psr names.
|
|
|
|
|
|
(parse_barrier): New function.
|
|
|
|
|
|
(enum operand_parse_code): Add OP_oBARRIER.
|
|
|
|
|
|
(parse_operands): Implement OP_oBARRIER.
|
|
|
|
|
|
(do_barrier): New function.
|
|
|
|
|
|
(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
|
|
|
|
|
|
(do_t_cpsi): Add V7M restrictions.
|
|
|
|
|
|
(do_t_mrs, do_t_msr): Validate V7M variants.
|
|
|
|
|
|
(md_assemble): Check for NULL variants.
|
|
|
|
|
|
(v7m_psrs, barrier_opt_names): New tables.
|
|
|
|
|
|
(insns): Add V7 instructions. Mark V6 instructions absent from V7M.
|
|
|
|
|
|
(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
|
|
|
|
|
|
(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
|
|
|
|
|
|
(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
|
|
|
|
|
|
(struct cpu_arch_ver_table): Define.
|
|
|
|
|
|
(cpu_arch_ver): New.
|
|
|
|
|
|
(aeabi_set_public_attributes): Use cpu_arch_ver. Set
|
|
|
|
|
|
Tag_CPU_arch_profile.
|
|
|
|
|
|
* doc/c-arm.texi: Document new cpu and arch options.
|
|
|
|
|
|
|
2006-02-24 05:36:18 +08:00
|
|
|
|
2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
|
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|
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|
|
2006-02-23 22:49:32 +08:00
|
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|
2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
|
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|
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* config/tc-ia64.c: Update copyright years.
|
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|
2006-02-23 08:17:24 +08:00
|
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|
2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
|
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* config/tc-ia64.c (specify_resource): Add the rule 17 from
|
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SDM 2.2.
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2006-02-22 23:03:30 +08:00
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2005-02-22 Paul Brook <paul@codesourcery.com>
|
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|
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* config/tc-arm.c (do_pld): Remove incorrect write to
|
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|
|
inst.instruction.
|
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(encode_thumb32_addr_mode): Use correct operand.
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2006-02-21 23:13:54 +08:00
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|
2006-02-21 Paul Brook <paul@codesourcery.com>
|
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* config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
|
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|
2006-02-17 22:36:28 +08:00
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2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
|
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|
Anil Paranjape <anilp1@kpitcummins.com>
|
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|
Shilin Shakti <shilins@kpitcummins.com>
|
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* Makefile.am: Add xc16x related entry.
|
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* Makefile.in: Regenerate.
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* configure.in: Added xc16x related entry.
|
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* configure: Regenerate.
|
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|
|
* config/tc-xc16x.h: New file
|
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* config/tc-xc16x.c: New file
|
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* doc/c-xc16x.texi: New file for xc16x
|
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|
* doc/all.texi: Entry for xc16x
|
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|
* doc/Makefile.texi: Added c-xc16x.texi
|
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|
|
* NEWS: Announce the support for the new target.
|
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|
2006-02-16 16:05:02 +08:00
|
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|
2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
|
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* configure.tgt: set emulation for mips-*-netbsd*
|
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|
2006-02-14 16:59:10 +08:00
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|
2006-02-14 Jakub Jelinek <jakub@redhat.com>
|
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* config.in: Rebuilt.
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2006-02-14 08:58:05 +08:00
|
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|
2006-02-13 Bob Wilson <bob.wilson@acm.org>
|
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* config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
|
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|
|
from 1, not 0, in error messages.
|
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|
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|
|
(md_assemble): Simplify special-case check for ENTRY instructions.
|
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|
|
(tinsn_has_invalid_symbolic_operands): Do not include opcode and
|
|
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|
|
|
operand in error message.
|
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|
2006-02-13 23:08:43 +08:00
|
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|
2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
|
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|
* configure.tgt (arm-*-linux-gnueabi*): Change to
|
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|
|
arm-*-linux-*eabi*.
|
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|
|
2006-02-10 20:10:21 +08:00
|
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|
|
2006-02-10 Nick Clifton <nickc@redhat.com>
|
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|
2006-02-10 20:21:43 +08:00
|
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* config/tc-crx.c (check_range): Ensure that the sign bit of a
|
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|
|
32-bit value is propagated into the upper bits of a 64-bit long.
|
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|
2006-02-10 20:10:21 +08:00
|
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|
* config/tc-arc.c (init_opcode_tables): Fix cast.
|
|
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|
|
(arc_extoper, md_operand): Likewise.
|
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|
2006-02-10 09:02:12 +08:00
|
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|
|
2006-02-09 David Heine <dlheine@tensilica.com>
|
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|
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* config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
|
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|
|
each relaxation step.
|
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|
2006-02-10 02:43:50 +08:00
|
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|
2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
|
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|
|
* configure.in (CHECK_DECLS): Add vsnprintf.
|
|
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|
|
* configure: Regenerate.
|
|
|
|
|
|
* messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
|
|
|
|
|
|
include/declare here, but...
|
|
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|
|
|
* as.h: Move code detecting VARARGS idiom to the top.
|
|
|
|
|
|
(errno.h, stdarg.h, varargs.h, va_list): ...here.
|
|
|
|
|
|
(vsnprintf): Declare if not already declared.
|
|
|
|
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|
|
2006-02-09 08:07:41 +08:00
|
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|
|
2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
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|
|
|
|
|
|
|
|
|
* as.c (close_output_file): New.
|
|
|
|
|
|
(main): Register close_output_file with xatexit before
|
|
|
|
|
|
dump_statistics. Don't call output_file_close.
|
|
|
|
|
|
|
* bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
(bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
bfd_mach_mcf_isa_b_usp_float_emac): New.
(bfd_default_scan): Update coldfire mapping.
* bfd/bfd-in.h (bfd_m68k_mach_to_features,
bfd_m68k_features_to_mach): Declare.
* bfd/bfd-in2.h: Rebuilt.
* bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines,
adjust legacy names.
(m68k_arch_features): New.
(bfd_m68k_mach_to_features,
bfd_m68k_features_to_mach): Define.
* bfd/elf32-m68k.c (elf32_m68k_object_p): New.
(elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
(elf32_m68k_print_private_bfd_data): Print the CF EF flags.
(elf_backend_object_p): Define.
* bfd/ieee.c (ieee_write_processor): Update coldfire machines.
* bfd/libbfd.h: Rebuilt.
* gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
mcf5329_control_regs): New.
(not_current_architecture, selected_arch, selected_cpu): New.
(m68k_archs, m68k_extensions): New.
(archs): Renamed to ...
(m68k_cpus): ... here. Adjust.
(n_arches): Remove.
(md_pseudo_table): Add arch and cpu directives.
(find_cf_chip, m68k_ip): Adjust table scanning.
(no_68851, no_68881): Remove.
(md_assemble): Lazily initialize.
(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
(md_init_after_args): Move functionality to m68k_init_arch.
(mri_chip): Adjust table scanning.
(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
options with saner parsing.
(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
m68k_init_arch): New.
(s_m68k_cpu, s_m68k_arch): New.
(md_show_usage): Adjust.
(m68k_elf_final_processing): Set CF EF flags.
* gas/config/tc-m68k.h (m68k_init_after_args): Remove.
(tc_init_after_args): Remove.
* gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
(M68k-Directives): Document .arch and .cpu directives.
* gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
* gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New.
* include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
(EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
(EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.
* include/opcode/m68k.h (m68008, m68ec030, m68882): Remove.
(m68k_mask): New.
(cpu_m68k, cpu_cf): New.
(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.
* opcodes/m68k-dis.c (print_insn_m68k): Use
bfd_m68k_mach_to_features.
* binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
2006-02-08 03:01:10 +08:00
|
|
|
|
2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
|
|
|
|
|
|
mcf5329_control_regs): New.
|
|
|
|
|
|
(not_current_architecture, selected_arch, selected_cpu): New.
|
|
|
|
|
|
(m68k_archs, m68k_extensions): New.
|
|
|
|
|
|
(archs): Renamed to ...
|
|
|
|
|
|
(m68k_cpus): ... here. Adjust.
|
|
|
|
|
|
(n_arches): Remove.
|
|
|
|
|
|
(md_pseudo_table): Add arch and cpu directives.
|
|
|
|
|
|
(find_cf_chip, m68k_ip): Adjust table scanning.
|
|
|
|
|
|
(no_68851, no_68881): Remove.
|
|
|
|
|
|
(md_assemble): Lazily initialize.
|
|
|
|
|
|
(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
|
|
|
|
|
|
(md_init_after_args): Move functionality to m68k_init_arch.
|
|
|
|
|
|
(mri_chip): Adjust table scanning.
|
|
|
|
|
|
(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
|
|
|
|
|
|
options with saner parsing.
|
|
|
|
|
|
(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
|
|
|
|
|
|
m68k_init_arch): New.
|
|
|
|
|
|
(s_m68k_cpu, s_m68k_arch): New.
|
|
|
|
|
|
(md_show_usage): Adjust.
|
|
|
|
|
|
(m68k_elf_final_processing): Set CF EF flags.
|
|
|
|
|
|
* config/tc-m68k.h (m68k_init_after_args): Remove.
|
|
|
|
|
|
(tc_init_after_args): Remove.
|
|
|
|
|
|
* doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
|
|
|
|
|
|
(M68k-Directives): Document .arch and .cpu directives.
|
|
|
|
|
|
|
2006-02-05 19:57:35 +08:00
|
|
|
|
2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
|
|
|
|
|
|
synonyms for equ and defl.
|
|
|
|
|
|
(z80_cons_fix_new): New function.
|
|
|
|
|
|
(emit_byte): Disallow relative jumps to absolute locations.
|
|
|
|
|
|
(emit_data): Only handle defb, prototype changed, because defb is
|
|
|
|
|
|
now handled as pseudo-op rather than an instruction.
|
|
|
|
|
|
(instab): Entries for defb,defw,db,dw moved from here...
|
|
|
|
|
|
(md_pseudo_table): ... to here, use generic cons() for defw,dw.
|
|
|
|
|
|
Add entries for def24,def32,d24,d32.
|
|
|
|
|
|
(md_assemble): Improved error handling.
|
|
|
|
|
|
(md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
|
|
|
|
|
|
* config/tc-z80.h (TC_CONS_FIX_NEW): Define.
|
|
|
|
|
|
(z80_cons_fix_new): Declare.
|
|
|
|
|
|
* doc/c-z80.texi (defb, db): Mention warning on overflow.
|
|
|
|
|
|
(def24,d24,def32,d32): New pseudo-ops.
|
|
|
|
|
|
|
2006-02-03 04:19:56 +08:00
|
|
|
|
2006-02-02 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
|
|
|
|
|
|
|
2005-02-02 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
T2_OPCODE_RSB): Define.
(thumb32_negate_data_op): New function.
(md_apply_fix): Use it.
gas/testsuite/
* gas/arm/thumb2_invert.d: New test.
* gas/arm/thumb2_invert.s: New test.
2006-02-02 21:34:17 +08:00
|
|
|
|
2005-02-02 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
|
|
|
|
|
|
T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
|
|
|
|
|
|
T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
|
|
|
|
|
|
T2_OPCODE_RSB): Define.
|
|
|
|
|
|
(thumb32_negate_data_op): New function.
|
|
|
|
|
|
(md_apply_fix): Use it.
|
|
|
|
|
|
|
2006-02-01 03:36:57 +08:00
|
|
|
|
2006-01-31 Bob Wilson <bob.wilson@acm.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
|
|
|
|
|
|
fields.
|
|
|
|
|
|
* config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
|
|
|
|
|
|
* config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
|
|
|
|
|
|
subtracted symbols.
|
|
|
|
|
|
(relaxation_requirements): Add pfinish_frag argument and use it to
|
|
|
|
|
|
replace setting tinsn->record_fix fields.
|
|
|
|
|
|
(xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
|
|
|
|
|
|
and vinsn_to_insnbuf. Remove references to record_fix and
|
|
|
|
|
|
slot_sub_symbols fields.
|
|
|
|
|
|
(xtensa_mark_narrow_branches): Delete unused code.
|
|
|
|
|
|
(is_narrow_branch_guaranteed_in_range): Handle expr that is not just
|
|
|
|
|
|
a symbol.
|
|
|
|
|
|
(convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
|
|
|
|
|
|
record_fix fields.
|
|
|
|
|
|
(tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
|
|
|
|
|
|
(vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
|
|
|
|
|
|
of the record_fix field. Simplify error messages for unexpected
|
|
|
|
|
|
symbolic operands.
|
|
|
|
|
|
(set_expr_symbol_offset_diff): Delete.
|
|
|
|
|
|
|
2006-02-01 00:19:41 +08:00
|
|
|
|
2006-01-31 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
|
|
|
|
|
|
|
2006-01-31 Paul Brook <paul@codesourcery.com>
Richard Earnshaw <rearnsha@arm.com>
* gas/config/tc-arm.c: Use arm_feature_set.
(arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
New variables.
(insns): Use them.
(md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
feature flags.
(arm_legacy_option_table, arm_option_cpu_value_table): New types.
(arm_opts): Move old cpu/arch options from here...
(arm_legacy_opts): ... to here.
(md_parse_option): Search arm_legacy_opts.
(arm_cpus, arm_archs, arm_extensions, arm_fpus)
(arm_float_abis, arm_eabis): Make const.
* include/opcode/arm.h: Use ARM_CPU_FEATURE.
(ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New.
(arm_feature_set): Change to a structure.
(ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE,
ARM_FEATURE): New macros.
2006-01-31 22:11:13 +08:00
|
|
|
|
2006-01-31 Paul Brook <paul@codesourcery.com>
|
|
|
|
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Richard Earnshaw <rearnsha@arm.com>
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* config/tc-arm.c: Use arm_feature_set.
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(arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
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arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
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fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
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New variables.
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(insns): Use them.
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(md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
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md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
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arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
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s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
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feature flags.
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(arm_legacy_option_table, arm_option_cpu_value_table): New types.
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(arm_opts): Move old cpu/arch options from here...
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(arm_legacy_opts): ... to here.
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(md_parse_option): Search arm_legacy_opts.
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(arm_cpus, arm_archs, arm_extensions, arm_fpus)
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(arm_float_abis, arm_eabis): Make const.
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2006-01-26 13:21:43 +08:00
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2006-01-25 Bob Wilson <bob.wilson@acm.org>
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* config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
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2006-01-21 01:22:50 +08:00
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2006-01-21 Jie Zhang <jie.zhang@analog.com>
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* config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
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in load immediate intruction.
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2006-01-21 00:57:09 +08:00
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2006-01-21 Jie Zhang <jie.zhang@analog.com>
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* config/bfin-parse.y (value_match): Use correct conversion
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specifications in template string for __FILE__ and __LINE__.
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(binary): Ditto.
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(unary): Ditto.
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include/elf/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* common.h (DT_TLSDESC_GOT, DT_TLSDESC_PLT): New.
* i386.h (R_386_TLS_GOTDESC, R_386_TLS_DESC_CALL, R_386_TLS_DESC):
New.
* x86-64.h (R_X86_64_GOTPC32_TLSDESC, R_X86_64_TLSDESC_CALL,
R_X86_64_TLSDESC): New.
bfd/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* reloc.c (BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC,
BFD_RELOC_386_TLS_DESC_CALL, BFD_RELOC_X86_64_GOTPC32_TLSDESC,
BFD_RELOC_X86_64_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL): New.
* libbfd.h, bfd-in2.h: Rebuilt.
* elf32-i386.c (elf_howto_table): New relocations.
(R_386_tls): Adjust.
(elf_i386_reloc_type_lookup): Map new relocations.
(GOT_TLS_GDESC, GOT_TLS_GD_BOTH_P): New macros.
(GOT_TLS_GD_P, GOT_TLS_GDESC_P, GOT_TLS_GD_ANY_P): New macros.
(struct elf_i386_link_hash_entry): Add tlsdesc_got field.
(struct elf_i386_obj_tdata): Add local_tlsdesc_gotent field.
(elf_i386_local_tlsdesc_gotent): New macro.
(struct elf_i386_link_hash_table): Add sgotplt_jump_table_size.
(elf_i386_compute_jump_table_size): New macro.
(link_hash_newfunc): Initialize tlsdesc_got.
(elf_i386_link_hash_table_create): Set sgotplt_jump_table_size.
(elf_i386_tls_transition): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(elf_i386_check_relocs): Likewise. Allocate space for
local_tlsdesc_gotent.
(elf_i386_gc_sweep_hook): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(allocate_dynrelocs): Count function PLT relocations. Reserve
space for TLS descriptors and relocations.
(elf_i386_size_dynamic_sections): Reserve space for TLS
descriptors and relocations. Set up sgotplt_jump_table_size.
Don't zero reloc_count in srelplt.
(elf_i386_always_size_sections): New. Set up _TLS_MODULE_BASE_.
(elf_i386_relocate_section): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(elf_i386_finish_dynamic_symbol): Use GOT_TLS_GD_ANY_P.
(elf_backend_always_size_sections): Define.
* elf64-x86-64.c (x86_64_elf_howto): Add R_X86_64_GOTPC32_TLSDESC,
R_X86_64_TLSDESC, R_X86_64_TLSDESC_CALL.
(R_X86_64_standard): Adjust.
(x86_64_reloc_map): Map new relocs.
(elf64_x86_64_rtype_to_howto): New, split out of...
(elf64_x86_64_info_to_howto): ... this function, and...
(elf64_x86_64_reloc_type_lookup): ... use it to map elf_reloc_val.
(GOT_TLS_GDESC, GOT_TLS_GD_BOTH_P): New macros.
(GOT_TLS_GD_P, GOT_TLS_GDESC_P, GOT_TLS_GD_ANY_P): New macros.
(struct elf64_x86_64_link_hash_entry): Add tlsdesc_got field.
(struct elf64_x86_64_obj_tdata): Add local_tlsdesc_gotent field.
(elf64_x86_64_local_tlsdesc_gotent): New macro.
(struct elf64_x86_64_link_hash_table): Add tlsdesc_plt,
tlsdesc_got and sgotplt_jump_table_size fields.
(elf64_x86_64_compute_jump_table_size): New macro.
(link_hash_newfunc): Initialize tlsdesc_got.
(elf64_x86_64_link_hash_table_create): Initialize new fields.
(elf64_x86_64_tls_transition): Handle R_X86_64_GOTPC32_TLSDESC and
R_X86_64_TLSDESC_CALL.
(elf64_x86_64_check_relocs): Likewise. Allocate space for
local_tlsdesc_gotent.
(elf64_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPC32_TLSDESC and
R_X86_64_TLSDESC_CALL.
(allocate_dynrelocs): Count function PLT relocations. Reserve
space for TLS descriptors and relocations.
(elf64_x86_64_size_dynamic_sections): Reserve space for TLS
descriptors and relocations. Set up sgotplt_jump_table_size,
tlsdesc_plt and tlsdesc_got. Make room for them. Don't zero
reloc_count in srelplt. Add dynamic entries for DT_TLSDESC_PLT
and DT_TLSDESC_GOT.
(elf64_x86_64_always_size_sections): New. Set up
_TLS_MODULE_BASE_.
(elf64_x86_64_relocate_section): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(elf64_x86_64_finish_dynamic_symbol): Use GOT_TLS_GD_ANY_P.
(elf64_x86_64_finish_dynamic_sections): Set DT_TLSDESC_PLT and
DT_TLSDESC_GOT. Set up TLS descriptor lazy resolver PLT entry.
(elf_backend_always_size_sections): Define.
binutils/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* readelf.c (get_dynamic_type): Handle DT_TLSDESC_GOT and
DT_TLSDESC_PLT.
gas/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
(optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
displacement bits.
(build_modrm_byte): Set up zero modrm for TLS desc calls.
(lex_got): Handle @tlsdesc and @tlscall.
(md_apply_fix, tc_gen_reloc): Handle the new relocations.
ld/testsuite/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* ld-i386/i386.exp: Run on x86_64-*-linux* and amd64-*-linux*.
Add new tests.
* ld-i386/pcrel16.d: Add -melf_i386.
* ld-i386/pcrel8.d: Likewise.
* ld-i386/tlsbindesc.dd: New.
* ld-i386/tlsbindesc.rd: New.
* ld-i386/tlsbindesc.s: New.
* ld-i386/tlsbindesc.sd: New.
* ld-i386/tlsbindesc.td: New.
* ld-i386/tlsdesc.dd: New.
* ld-i386/tlsdesc.rd: New.
* ld-i386/tlsdesc.s: New.
* ld-i386/tlsdesc.sd: New.
* ld-i386/tlsdesc.td: New.
* ld-i386/tlsgdesc.dd: New.
* ld-i386/tlsgdesc.rd: New.
* ld-i386/tlsgdesc.s: New.
* ld-x86-64/x86-64.exp: Run new tests.
* ld-x86-64/tlsbindesc.dd: New.
* ld-x86-64/tlsbindesc.rd: New.
* ld-x86-64/tlsbindesc.s: New.
* ld-x86-64/tlsbindesc.sd: New.
* ld-x86-64/tlsbindesc.td: New.
* ld-x86-64/tlsdesc.dd: New.
* ld-x86-64/tlsdesc.pd: New.
* ld-x86-64/tlsdesc.rd: New.
* ld-x86-64/tlsdesc.s: New.
* ld-x86-64/tlsdesc.sd: New.
* ld-x86-64/tlsdesc.td: New.
* ld-x86-64/tlsgdesc.dd: New.
* ld-x86-64/tlsgdesc.rd: New.
* ld-x86-64/tlsgdesc.s: New.
2006-01-19 05:07:51 +08:00
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2006-01-18 Alexandre Oliva <aoliva@redhat.com>
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Introduce TLS descriptors for i386 and x86_64.
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* config/tc-i386.c (tc_i386_fix_adjustable): Handle
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BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
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BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
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(optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
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BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
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displacement bits.
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(build_modrm_byte): Set up zero modrm for TLS desc calls.
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(lex_got): Handle @tlsdesc and @tlscall.
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(md_apply_fix, tc_gen_reloc): Handle the new relocations.
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2006-01-12 01:39:50 +08:00
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2006-01-11 Nick Clifton <nickc@redhat.com>
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Fixes for building on 64-bit hosts:
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|
* config/tc-avr.c (mod_index): New union to allow conversion
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between pointers and integers.
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(md_begin, avr_ldi_expression): Use it.
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* config/tc-i370.c (md_assemble): Add cast for argument to print
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statement.
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* config/tc-tic54x.c (subsym_substitute): Likewise.
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* config/tc-mn10200.c (md_assemble): Use a union to convert the
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opindex field of fr_cgen structure into a pointer so that it can
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be stored in a frag.
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* config/tc-mn10300.c (md_assemble): Likewise.
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* config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
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types.
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* config/tc-v850.c: Replace uses of (int) casts with correct
|
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types.
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2006-01-10 01:14:40 +08:00
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2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/2117
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* symbols.c (snapshot_symbol): Don't change a defined symbol.
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2006-01-03 13:56:15 +08:00
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|
2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
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PR gas/2101
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* config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
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a local-label reference.
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2006-01-17 07:15:07 +08:00
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For older changes see ChangeLog-2005
|
2002-01-07 20:12:47 +08:00
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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