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binutils-gdb/opcodes/i386-dis-evex-prefix.h

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i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
/* PREFIX_EVEX_0F10 */
{
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D} Just like their AVX counterparts they can utilize XMVexScalar / EXdVexScalarS / EXqVexScalarS taking care of dropping the middle operand for their memory forms.
2019-07-01 14:23:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F10_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D} Just like their AVX counterparts they can utilize XMVexScalar / EXdVexScalarS / EXqVexScalarS taking care of dropping the middle operand for their memory forms.
2019-07-01 14:23:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F10_P_3) },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
/* PREFIX_EVEX_0F11 */
{
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D} Just like their AVX counterparts they can utilize XMVexScalar / EXdVexScalarS / EXqVexScalarS taking care of dropping the middle operand for their memory forms.
2019-07-01 14:23:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F11_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D} Just like their AVX counterparts they can utilize XMVexScalar / EXdVexScalarS / EXqVexScalarS taking care of dropping the middle operand for their memory forms.
2019-07-01 14:23:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F11_P_3) },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
/* PREFIX_EVEX_0F12 */
{
{ MOD_TABLE (MOD_EVEX_0F12_PREFIX_0) },
{ VEX_W_TABLE (EVEX_W_0F12_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ MOD_TABLE (MOD_EVEX_0F12_PREFIX_2) },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F12_P_3) },
},
/* PREFIX_EVEX_0F16 */
{
{ MOD_TABLE (MOD_EVEX_0F16_PREFIX_0) },
{ VEX_W_TABLE (EVEX_W_0F16_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ MOD_TABLE (MOD_EVEX_0F16_PREFIX_2) },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
/* PREFIX_EVEX_0F2A */
{
{ Bad_Opcode },
x86-64: fix {,V}PCMPESTR{I,M} disassembly in Intel mode The operands don't allow disambiguating the insn in 64-bit mode, and hence suffixes need to be emitted not just in AT&T mode. Achieve this by re-using %LQ while dropping PCMPESTR_Fixup().
2020-07-14 16:28:12 +08:00
{ "vcvtsi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F2A_P_3) },
},
/* PREFIX_EVEX_0F51 */
{
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F51_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F51_P_3) },
},
/* PREFIX_EVEX_0F58 */
{
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F58_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F58_P_3) },
},
/* PREFIX_EVEX_0F59 */
{
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F59_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F59_P_3) },
},
/* PREFIX_EVEX_0F5A */
{
{ VEX_W_TABLE (EVEX_W_0F5A_P_0) },
{ VEX_W_TABLE (EVEX_W_0F5A_P_1) },
{ VEX_W_TABLE (EVEX_W_0F5A_P_2) },
{ VEX_W_TABLE (EVEX_W_0F5A_P_3) },
},
/* PREFIX_EVEX_0F5B */
{
{ VEX_W_TABLE (EVEX_W_0F5B_P_0) },
{ VEX_W_TABLE (EVEX_W_0F5B_P_1) },
{ VEX_W_TABLE (EVEX_W_0F5B_P_2) },
},
/* PREFIX_EVEX_0F5C */
{
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F5C_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F5C_P_3) },
},
/* PREFIX_EVEX_0F5D */
{
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F5D_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F5D_P_3) },
},
/* PREFIX_EVEX_0F5E */
{
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F5E_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F5E_P_3) },
},
/* PREFIX_EVEX_0F5F */
{
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F5F_P_1) },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{ "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F5F_P_3) },
},
/* PREFIX_EVEX_0F6F */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F6F_P_1) },
{ VEX_W_TABLE (EVEX_W_0F6F_P_2) },
{ VEX_W_TABLE (EVEX_W_0F6F_P_3) },
},
/* PREFIX_EVEX_0F70 */
{
{ Bad_Opcode },
{ "vpshufhw", { XM, EXx, Ib }, 0 },
{ VEX_W_TABLE (EVEX_W_0F70_P_2) },
{ "vpshuflw", { XM, EXx, Ib }, 0 },
},
/* PREFIX_EVEX_0F78 */
{
{ VEX_W_TABLE (EVEX_W_0F78_P_0) },
{ "vcvttss2usi", { Gdq, EXxmm_md, EXxEVexS }, 0 },
{ VEX_W_TABLE (EVEX_W_0F78_P_2) },
{ "vcvttsd2usi", { Gdq, EXxmm_mq, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_0F79 */
{
{ VEX_W_TABLE (EVEX_W_0F79_P_0) },
{ "vcvtss2usi", { Gdq, EXxmm_md, EXxEVexR }, 0 },
{ VEX_W_TABLE (EVEX_W_0F79_P_2) },
{ "vcvtsd2usi", { Gdq, EXxmm_mq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_0F7A */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F7A_P_1) },
{ VEX_W_TABLE (EVEX_W_0F7A_P_2) },
{ VEX_W_TABLE (EVEX_W_0F7A_P_3) },
},
/* PREFIX_EVEX_0F7B */
{
{ Bad_Opcode },
x86-64: fix {,V}PCMPESTR{I,M} disassembly in Intel mode The operands don't allow disambiguating the insn in 64-bit mode, and hence suffixes need to be emitted not just in AT&T mode. Achieve this by re-using %LQ while dropping PCMPESTR_Fixup().
2020-07-14 16:28:12 +08:00
{ "vcvtusi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F7B_P_2) },
{ VEX_W_TABLE (EVEX_W_0F7B_P_3) },
},
/* PREFIX_EVEX_0F7E */
{
{ Bad_Opcode },
{ EVEX_LEN_TABLE (EVEX_LEN_0F7E_P_1) },
{ EVEX_LEN_TABLE (EVEX_LEN_0F7E_P_2) },
},
/* PREFIX_EVEX_0F7F */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F7F_P_1) },
{ VEX_W_TABLE (EVEX_W_0F7F_P_2) },
{ VEX_W_TABLE (EVEX_W_0F7F_P_3) },
},
/* PREFIX_EVEX_0FC2 */
{
x86: fold VCMP_Fixup() into CMP_Fixup() There's no reason to have two functions and two tables, when the AVX functionality here is a proper superset of the SSE one.
2020-07-14 16:27:32 +08:00
{ "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0FC2_P_1) },
x86: fold VCMP_Fixup() into CMP_Fixup() There's no reason to have two functions and two tables, when the AVX functionality here is a proper superset of the SSE one.
2020-07-14 16:27:32 +08:00
{ "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0FC2_P_3) },
},
/* PREFIX_EVEX_0FE6 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0FE6_P_1) },
{ VEX_W_TABLE (EVEX_W_0FE6_P_2) },
{ VEX_W_TABLE (EVEX_W_0FE6_P_3) },
},
/* PREFIX_EVEX_0F3810 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3810_P_1) },
{ VEX_W_TABLE (EVEX_W_0F3810_P_2) },
},
/* PREFIX_EVEX_0F3811 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3811_P_1) },
{ VEX_W_TABLE (EVEX_W_0F3811_P_2) },
},
/* PREFIX_EVEX_0F3812 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3812_P_1) },
{ VEX_W_TABLE (EVEX_W_0F3812_P_2) },
},
/* PREFIX_EVEX_0F3813 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3813_P_1) },
{ VEX_W_TABLE (EVEX_W_0F3813_P_2) },
},
/* PREFIX_EVEX_0F3814 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3814_P_1) },
x86: replace %LW by %DQ This makes more visible what the two alternatives will be that result from this macro.
2020-07-14 16:30:26 +08:00
{ "vprorv%DQ", { XM, Vex, EXx }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
/* PREFIX_EVEX_0F3815 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3815_P_1) },
x86: replace %LW by %DQ This makes more visible what the two alternatives will be that result from this macro.
2020-07-14 16:30:26 +08:00
{ "vprolv%DQ", { XM, Vex, EXx }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
/* PREFIX_EVEX_0F3820 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3820_P_1) },
{ "vpmovsxbw", { XM, EXxmmq }, 0 },
},
/* PREFIX_EVEX_0F3821 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3821_P_1) },
{ "vpmovsxbd", { XM, EXxmmqd }, 0 },
},
/* PREFIX_EVEX_0F3822 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3822_P_1) },
{ "vpmovsxbq", { XM, EXxmmdw }, 0 },
},
/* PREFIX_EVEX_0F3823 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3823_P_1) },
{ "vpmovsxwd", { XM, EXxmmq }, 0 },
},
/* PREFIX_EVEX_0F3824 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3824_P_1) },
{ "vpmovsxwq", { XM, EXxmmqd }, 0 },
},
/* PREFIX_EVEX_0F3825 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3825_P_1) },
{ VEX_W_TABLE (EVEX_W_0F3825_P_2) },
},
/* PREFIX_EVEX_0F3826 */
{
{ Bad_Opcode },
x86: introduce %BW to avoid going through vex_w_table[] This parallels %LW and %XW.
2020-07-07 14:08:09 +08:00
{ "vptestnm%BW", { XMask, Vex, EXx }, 0 },
{ "vptestm%BW", { XMask, Vex, EXx }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
/* PREFIX_EVEX_0F3827 */
{
{ Bad_Opcode },
x86: replace %LW by %DQ This makes more visible what the two alternatives will be that result from this macro.
2020-07-14 16:30:26 +08:00
{ "vptestnm%DQ", { XMask, Vex, EXx }, 0 },
{ "vptestm%DQ", { XMask, Vex, EXx }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
/* PREFIX_EVEX_0F3828 */
{
{ Bad_Opcode },
x86: drop Rdq, Rd, and MaskR Rdq, Rd, and MaskR can be replaced by Edq, Ed / Rm, and MaskE respectively, as OP_R() doesn't enforce ModRM.mod == 3, and hence where MOD matters but hasn't been decoded yet it needs to be anyway. (The case of converting to Rm is temporary until a subsequent change.)
2020-07-14 16:42:33 +08:00
{ MOD_TABLE (MOD_EVEX_0F3828_P_1) },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F3828_P_2) },
},
/* PREFIX_EVEX_0F3829 */
{
{ Bad_Opcode },
x86: introduce %BW to avoid going through vex_w_table[] This parallels %LW and %XW.
2020-07-07 14:08:09 +08:00
{ "vpmov%BW2m", { XMask, EXx }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F3829_P_2) },
},
/* PREFIX_EVEX_0F382A */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F382A_P_1) },
{ VEX_W_TABLE (EVEX_W_0F382A_P_2) },
},
/* PREFIX_EVEX_0F3830 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3830_P_1) },
{ "vpmovzxbw", { XM, EXxmmq }, 0 },
},
/* PREFIX_EVEX_0F3831 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3831_P_1) },
{ "vpmovzxbd", { XM, EXxmmqd }, 0 },
},
/* PREFIX_EVEX_0F3832 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3832_P_1) },
{ "vpmovzxbq", { XM, EXxmmdw }, 0 },
},
/* PREFIX_EVEX_0F3833 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3833_P_1) },
{ "vpmovzxwd", { XM, EXxmmq }, 0 },
},
/* PREFIX_EVEX_0F3834 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3834_P_1) },
{ "vpmovzxwq", { XM, EXxmmqd }, 0 },
},
/* PREFIX_EVEX_0F3835 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3835_P_1) },
{ VEX_W_TABLE (EVEX_W_0F3835_P_2) },
},
/* PREFIX_EVEX_0F3838 */
{
{ Bad_Opcode },
x86: drop Rdq, Rd, and MaskR Rdq, Rd, and MaskR can be replaced by Edq, Ed / Rm, and MaskE respectively, as OP_R() doesn't enforce ModRM.mod == 3, and hence where MOD matters but hasn't been decoded yet it needs to be anyway. (The case of converting to Rm is temporary until a subsequent change.)
2020-07-14 16:42:33 +08:00
{ MOD_TABLE (MOD_EVEX_0F3838_P_1) },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ "vpminsb", { XM, Vex, EXx }, 0 },
},
/* PREFIX_EVEX_0F3839 */
{
{ Bad_Opcode },
x86: replace %LW by %DQ This makes more visible what the two alternatives will be that result from this macro.
2020-07-14 16:30:26 +08:00
{ "vpmov%DQ2m", { XMask, EXx }, 0 },
{ "vpmins%DQ", { XM, Vex, EXx }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
/* PREFIX_EVEX_0F383A */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F383A_P_1) },
{ "vpminuw", { XM, Vex, EXx }, 0 },
},
/* PREFIX_EVEX_0F3852 */
{
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3852_P_1) },
{ "vpdpwssd", { XM, Vex, EXx }, 0 },
{ "vp4dpwssd", { XM, Vex, EXxmm }, 0 },
},
/* PREFIX_EVEX_0F3853 */
{
{ Bad_Opcode },
{ Bad_Opcode },
{ "vpdpwssds", { XM, Vex, EXx }, 0 },
{ "vp4dpwssds", { XM, Vex, EXxmm }, 0 },
},
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
/* PREFIX_EVEX_0F3868 */
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
{ "vp2intersect%DQ", { XMask, Vex, EXx, EXxEVexS }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
/* PREFIX_EVEX_0F3872 */
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{
{ Bad_Opcode },
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
{ VEX_W_TABLE (EVEX_W_0F3872_P_1) },
{ VEX_W_TABLE (EVEX_W_0F3872_P_2) },
{ VEX_W_TABLE (EVEX_W_0F3872_P_3) },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
/* PREFIX_EVEX_0F389A */
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{
{ Bad_Opcode },
{ Bad_Opcode },
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
{ "vfmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
{ "v4fmaddps", { XM, Vex, Mxmm }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
/* PREFIX_EVEX_0F389B */
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{
{ Bad_Opcode },
{ Bad_Opcode },
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
{ "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
{ "v4fmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
/* PREFIX_EVEX_0F38AA */
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{
{ Bad_Opcode },
{ Bad_Opcode },
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
{ "vfmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
{ "v4fnmaddps", { XM, Vex, Mxmm }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
x86: simplify decode of opcodes valid with (embedded) 66 prefix only The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-14 16:33:40 +08:00
/* PREFIX_EVEX_0F38AB */
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{
{ Bad_Opcode },
{ Bad_Opcode },
x86: replace EXxmm_mdq by EXVexWdqScalar There's no need to have two operand specifiers / enumerators for the same purpose. This then renders xmm_mdq_mode unused.
2020-01-31 21:29:18 +08:00
{ "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ "v4fnmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
},
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