2012-05-18 08:39:28 +08:00
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2012-05-17 James Lemke <jwlemke@codesourcery.com>
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* ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
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2012-05-18 08:30:47 +08:00
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2012-05-17 James Lemke <jwlemke@codesourcery.com>
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* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
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2012-05-17 23:13:28 +08:00
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2012-05-17 Daniel Richard G. <skunk@iskunk.org>
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Nick Clifton <nickc@redhat.com>
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PR 14072
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* configure.in: Add check that sysdep.h has been included before
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any system header files.
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* configure: Regenerate.
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* config.in: Regenerate.
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* sysdep.h: Generate an error if included before config.h.
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* alpha-opc.c: Include sysdep.h before any other header file.
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* alpha-dis.c: Likewise.
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* avr-dis.c: Likewise.
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* cgen-opc.c: Likewise.
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* cr16-dis.c: Likewise.
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* cris-dis.c: Likewise.
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* crx-dis.c: Likewise.
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* d10v-dis.c: Likewise.
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* d10v-opc.c: Likewise.
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* d30v-dis.c: Likewise.
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* d30v-opc.c: Likewise.
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* h8500-dis.c: Likewise.
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* i370-dis.c: Likewise.
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* i370-opc.c: Likewise.
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* m10200-dis.c: Likewise.
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* m10300-dis.c: Likewise.
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* micromips-opc.c: Likewise.
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* mips-opc.c: Likewise.
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* mips61-opc.c: Likewise.
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* moxie-dis.c: Likewise.
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* or32-opc.c: Likewise.
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* pj-dis.c: Likewise.
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* ppc-dis.c: Likewise.
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* ppc-opc.c: Likewise.
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* s390-dis.c: Likewise.
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* sh-dis.c: Likewise.
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* sh64-dis.c: Likewise.
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* sparc-dis.c: Likewise.
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* sparc-opc.c: Likewise.
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* spu-dis.c: Likewise.
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* tic30-dis.c: Likewise.
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* tic54x-dis.c: Likewise.
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* tic80-dis.c: Likewise.
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* tic80-opc.c: Likewise.
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* tilegx-dis.c: Likewise.
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* tilepro-dis.c: Likewise.
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* v850-dis.c: Likewise.
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* v850-opc.c: Likewise.
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* vax-dis.c: Likewise.
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* w65-dis.c: Likewise.
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* xgate-dis.c: Likewise.
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* xtensa-dis.c: Likewise.
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* rl78-decode.opc: Likewise.
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* rl78-decode.c: Regenerate.
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* rx-decode.opc: Likewise.
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* rx-decode.c: Regenerate.
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2012-05-17 10:24:50 +08:00
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2012-05-17 Alan Modra <amodra@gmail.com>
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* ppc_dis.c: Don't include elf/ppc.h.
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2012-05-16 18:53:49 +08:00
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2012-05-16 Meador Inge <meadori@codesourcery.com>
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* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
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to PUSH/POP {reg}.
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2012-05-15 20:55:51 +08:00
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2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
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Stephane Carrez <stcarrez@nerim.fr>
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* configure.in: Add S12X and XGATE co-processor support to m68hc11
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target.
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* disassemble.c: Likewise.
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* configure: Regenerate.
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* m68hc11-dis.c: Make objdump output more consistent, use hex
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instead of decimal and use 0x prefix for hex.
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* m68hc11-opc.c: Add S12X and XGATE opcodes.
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Add support for PowerPC VLE.
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-15 03:45:30 +08:00
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2012-05-14 James Lemke <jwlemke@codesourcery.com>
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* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
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(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
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(vle_opcd_indices): New array.
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(lookup_vle): New function.
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|
|
|
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
|
|
|
|
|
|
(print_insn_powerpc): Likewise.
|
|
|
|
|
|
* ppc-opc.c: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
2012-05-14 Catherine Moore <clm@codesourcery.com>
|
|
|
|
|
|
Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
Rhonda Wittels <rhonda@codesourcery.com>
|
|
|
|
|
|
Nathan Froyd <froydnj@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-opc.c (insert_arx, extract_arx): New functions.
|
|
|
|
|
|
(insert_ary, extract_ary): New functions.
|
|
|
|
|
|
(insert_li20, extract_li20): New functions.
|
|
|
|
|
|
(insert_rx, extract_rx): New functions.
|
|
|
|
|
|
(insert_ry, extract_ry): New functions.
|
|
|
|
|
|
(insert_sci8, extract_sci8): New functions.
|
|
|
|
|
|
(insert_sci8n, extract_sci8n): New functions.
|
|
|
|
|
|
(insert_sd4h, extract_sd4h): New functions.
|
|
|
|
|
|
(insert_sd4w, extract_sd4w): New functions.
|
|
|
|
|
|
(insert_vlesi, extract_vlesi): New functions.
|
|
|
|
|
|
(insert_vlensi, extract_vlensi): New functions.
|
|
|
|
|
|
(insert_vleui, extract_vleui): New functions.
|
|
|
|
|
|
(insert_vleil, extract_vleil): New functions.
|
|
|
|
|
|
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
|
|
|
|
|
|
(BI16, BI32, BO32, B8): New.
|
|
|
|
|
|
(B15, B24, CRD32, CRS): New.
|
|
|
|
|
|
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
|
|
|
|
|
|
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
|
|
|
|
|
|
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
|
|
|
|
|
|
(SH6_MASK): Use PPC_OPSHIFT_INV.
|
|
|
|
|
|
(SI8, UI5, OIMM5, UI7, BO16): New.
|
|
|
|
|
|
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
|
|
|
|
|
|
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
|
|
|
|
|
|
(ALLOW8_SPRG): New.
|
|
|
|
|
|
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
|
|
|
|
|
|
(OPVUP, OPVUP_MASK OPVUP): New
|
|
|
|
|
|
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
|
|
|
|
|
|
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
|
|
|
|
|
|
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
|
|
|
|
|
|
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
|
|
|
|
|
|
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
|
|
|
|
|
|
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
|
|
|
|
|
|
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
|
|
|
|
|
|
(SE_IM5, SE_IM5_MASK): New.
|
|
|
|
|
|
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
|
|
|
|
|
|
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
|
|
|
|
|
|
(BO32DNZ, BO32DZ): New.
|
|
|
|
|
|
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
|
|
|
|
|
|
(PPCVLE): New.
|
|
|
|
|
|
(powerpc_opcodes): Add new VLE instructions. Update existing
|
|
|
|
|
|
instruction to include PPCVLE if supported.
|
|
|
|
|
|
* ppc-dis.c (ppc_opts): Add vle entry.
|
|
|
|
|
|
(get_powerpc_dialect): New function.
|
|
|
|
|
|
(powerpc_init_dialect): VLE support.
|
|
|
|
|
|
(print_insn_big_powerpc): Call get_powerpc_dialect.
|
|
|
|
|
|
(print_insn_little_powerpc): Likewise.
|
|
|
|
|
|
(operand_value_powerpc): Handle negative shift counts.
|
|
|
|
|
|
(print_insn_powerpc): Handle 2-byte instruction lengths.
|
|
|
|
|
|
|
2012-05-11 22:25:30 +08:00
|
|
|
|
2012-05-11 Daniel Richard G. <skunk@iskunk.org>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/14028
|
|
|
|
|
|
* configure.in: Invoke ACX_HEADER_STRING.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* config.in: Regenerate.
|
|
|
|
|
|
* sysdep.h: If STRINGS_WITH_STRING is defined then include both
|
|
|
|
|
|
string.h and strings.h.
|
|
|
|
|
|
|
2012-05-11 17:41:21 +08:00
|
|
|
|
2012-05-11 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/14006
|
|
|
|
|
|
* arm-dis.c (print_insn): Fix detection of instruction mode in
|
|
|
|
|
|
files containing multiple executable sections.
|
|
|
|
|
|
|
2012-05-03 21:12:08 +08:00
|
|
|
|
2012-05-03 Sean Keys <skeys@ipdatasys.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.in, configure: regenerate
|
|
|
|
|
|
* disassemble.c (disassembler): Recognize ARCH_XGATE.
|
|
|
|
|
|
* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
|
|
|
|
|
|
New functions.
|
|
|
|
|
|
* configure.in: Recognize xgate.
|
|
|
|
|
|
* xgate-dis.c, xgate-opc.c: New files for support of xgate
|
|
|
|
|
|
* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
|
|
|
|
|
|
and opcode generation for xgate.
|
|
|
|
|
|
|
2012-05-01 06:04:22 +08:00
|
|
|
|
2012-04-30 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* rx-decode.opc (MOV): Do not sign-extend immediates which are
|
|
|
|
|
|
already the maximum bit size.
|
|
|
|
|
|
* rx-decode.c: Regenerate.
|
|
|
|
|
|
|
Move sparc opcode hwcaps out of sparc_opcode flags field.
include/opcode/
* sparc.h (struct sparc_opcode): New field 'hwcaps'.
F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete.
(HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC,
HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF,
HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU,
HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES,
HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1,
HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
HWCAP_CBCOND, HWCAP_CRC32): New defines.
opcodes/
* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
gas/
* config/tc-sparc.c (sparc_arch_table): Rework to use HWCAP_*
masks.
(sparc_md_end): No longer need to translate hwcap_seen values into
ELF hwcap bits, they now match exactly.
(get_hwcap_name): Use HWCAP_* and handle new values.
(sparc_ip): Fetch hwcaps from insn->hwcaps instead of insn->flags.
2012-04-28 02:01:35 +08:00
|
|
|
|
2012-04-27 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
2012-04-28 04:43:35 +08:00
|
|
|
|
* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
|
|
|
|
|
|
* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
|
|
|
|
|
|
|
2012-04-28 02:04:00 +08:00
|
|
|
|
* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
|
|
|
|
|
|
* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
|
|
|
|
|
|
|
2012-04-28 02:03:13 +08:00
|
|
|
|
* sparc-opc.c (CBCOND): New define.
|
|
|
|
|
|
(CBCOND_XCC): Likewise.
|
|
|
|
|
|
(cbcond): New helper macro.
|
|
|
|
|
|
(sparc_opcodes): Add compare-and-branch instructions.
|
|
|
|
|
|
|
2012-04-28 02:02:35 +08:00
|
|
|
|
* sparc-dis.c (print_insn_sparc): Handle ')'.
|
|
|
|
|
|
* sparc-opc.c (sparc_opcodes): Add crypto instructions.
|
|
|
|
|
|
|
Move sparc opcode hwcaps out of sparc_opcode flags field.
include/opcode/
* sparc.h (struct sparc_opcode): New field 'hwcaps'.
F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete.
(HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC,
HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF,
HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU,
HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES,
HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1,
HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
HWCAP_CBCOND, HWCAP_CRC32): New defines.
opcodes/
* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
gas/
* config/tc-sparc.c (sparc_arch_table): Rework to use HWCAP_*
masks.
(sparc_md_end): No longer need to translate hwcap_seen values into
ELF hwcap bits, they now match exactly.
(get_hwcap_name): Use HWCAP_* and handle new values.
(sparc_ip): Fetch hwcaps from insn->hwcaps instead of insn->flags.
2012-04-28 02:01:35 +08:00
|
|
|
|
* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
|
|
|
|
|
|
into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
|
|
|
|
|
|
|
2012-04-13 00:26:06 +08:00
|
|
|
|
2012-04-12 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* sparc-dis.c (X_DISP10): Define.
|
|
|
|
|
|
(print_insn_sparc): Handle '='.
|
|
|
|
|
|
|
2012-04-01 12:15:43 +08:00
|
|
|
|
2012-04-01 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* bfin-dis.c (fmtconst): Replace decimal handling with a single
|
|
|
|
|
|
sprintf call and the '*' field width.
|
|
|
|
|
|
|
2012-03-24 09:09:28 +08:00
|
|
|
|
2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
|
|
|
|
|
|
|
2012-03-16 20:14:32 +08:00
|
|
|
|
2012-03-16 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
|
|
|
|
|
|
(powerpc_opcd_indices): Bump array size.
|
|
|
|
|
|
(disassemble_init_powerpc): Set powerpc_opcd_indices entries
|
|
|
|
|
|
corresponding to unused opcodes to following entry.
|
|
|
|
|
|
(lookup_powerpc): New function, extracted and optimised from..
|
|
|
|
|
|
(print_insn_powerpc): ..here.
|
|
|
|
|
|
|
2012-03-15 20:58:48 +08:00
|
|
|
|
2012-03-15 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
James Lemke <jwlemke@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* disassemble.c (disassemble_init_for_target): Handle ppc init.
|
|
|
|
|
|
* ppc-dis.c (private): New var.
|
|
|
|
|
|
(powerpc_init_dialect): Don't return calloc failure, instead use
|
|
|
|
|
|
private.
|
|
|
|
|
|
(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
|
|
|
|
|
|
(powerpc_opcd_indices): New array.
|
|
|
|
|
|
(disassemble_init_powerpc): New function.
|
|
|
|
|
|
(print_insn_big_powerpc): Don't init dialect here.
|
|
|
|
|
|
(print_insn_little_powerpc): Likewise.
|
|
|
|
|
|
(print_insn_powerpc): Start search using powerpc_opcd_indices.
|
|
|
|
|
|
|
include/opcode/
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
(PPCVEC2, PPCTMR, E6500): New short names.
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
optional operands on sync instruction for E6500 target.
bfd/
* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
(ppc_handle_align): Add termination nop opcode for e500mc family.
* doc/as.texinfo: Document options -me5500 and -me6500.
* doc/c-ppc.texi: Likewise.
gas/testsuite/
* gas/ppc/e500mc64_nop.s: New test case for e500mc family
termination nops.
* gas/ppc/e500mc64_nop.d: Likewise.
* gas/ppc/e5500_nop.s: Likewise.
* gas/ppc/e5500_nop.d: Likewise.
* gas/ppc/e6500_nop.s: Likewise.
* gas/ppc/e6500_nop.d: Likewise.
* gas/ppc/e6500.s: New.
* gas/ppc/e6500.d: Likewise.
* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
2012-03-10 07:39:06 +08:00
|
|
|
|
2012-03-10 Edmar Wienskoski <edmar@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
|
|
|
|
|
|
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
|
|
|
|
|
|
(PPCVEC2, PPCTMR, E6500): New short names.
|
|
|
|
|
|
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
|
|
|
|
|
|
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
|
|
|
|
|
|
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
|
|
|
|
|
|
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
|
|
|
|
|
|
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
|
|
|
|
|
|
optional operands on sync instruction for E6500 target.
|
|
|
|
|
|
|
2012-03-09 01:22:18 +08:00
|
|
|
|
2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
|
|
|
|
|
|
|
2012-02-27 14:57:57 +08:00
|
|
|
|
2012-02-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mt-dis.c: Regenerate.
|
|
|
|
|
|
|
2012-02-27 14:55:39 +08:00
|
|
|
|
2012-02-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* v850-opc.c (extract_v8): Rearrange to make it obvious this
|
|
|
|
|
|
is the inverse of corresponding insert function.
|
|
|
|
|
|
(extract_d22, extract_u9, extract_r4): Likewise.
|
|
|
|
|
|
(extract_d9): Correct sign extension.
|
|
|
|
|
|
(extract_d16_15): Don't assume "long" is 32 bits, and don't
|
|
|
|
|
|
rely on implementation defined behaviour for shift right of
|
|
|
|
|
|
signed types.
|
|
|
|
|
|
(extract_d16_16, extract_d17_16, extract_i9): Likewise.
|
|
|
|
|
|
(extract_d23): Likewise, and correct mask.
|
|
|
|
|
|
|
2012-02-27 14:37:40 +08:00
|
|
|
|
2012-02-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* crx-dis.c (print_arg): Mask constant to 32 bits.
|
|
|
|
|
|
* crx-opc.c (cst4_map): Use int array.
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2012-02-27 14:31:57 +08:00
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2012-02-27 Alan Modra <amodra@gmail.com>
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* arc-dis.c (BITS): Don't use shifts to mask off bits.
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(FIELDD): Sign extend with xor,sub.
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Improve TLS support on TILE-Gx/TILEPro:
- Add support for TLS LE references.
- Support linker optimization of TLS references.
- Delete relocations of GOT/tp relative offsets beyond 32-bits.
This brings binutils in line with the support expected in gcc 4.7, for
TILE-Gx/TILEPro.
bfd/
* reloc.c: Add BFD_RELOC_TILEPRO_TLS_GD_CALL,
BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_TLS_IE_LOAD, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA,
BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_TLS_GD_CALL, BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEGX_TLS_IE_LOAD,
BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD.
Delete BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE.
* elf32-tilepro.c (tilepro_elf_howto_table): Update tilepro
relocations.
(tilepro_reloc_map): Ditto.
(tilepro_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilepro_tls_translate_to_le): New.
(tilepro_tls_translate_to_ie): New.
(tilepro_elf_tls_transition): New.
(tilepro_elf_check_relocs): Handle new tls relocations.
(tilepro_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilepro_elf_relocate_section): Ditto.
(tilepro_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New
(insn_mask_X1_no_dest_no_srca): New
(insn_mask_Y0_no_dest_no_srca): New
(insn_mask_Y1_no_dest_no_srca): New
(srca_mask_X0): New
(srca_mask_X1): New
(insn_tls_le_move_X1): New
(insn_tls_le_move_zero_X0X1): New
(insn_tls_ie_lw_X1): New
(insn_tls_ie_add_X0X1): New
(insn_tls_ie_add_Y0Y1): New
(insn_tls_gd_add_X0X1): New
(insn_tls_gd_add_Y0Y1): New
* elfxx-tilegx.c (tilegx_elf_howto_table): Update tilegx
relocations.
(tilegx_reloc_map): Ditto.
(tilegx_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_link_hash_table): New field disable_le_transition.
(tilegx_tls_translate_to_le): New.
(tilegx_tls_translate_to_ie): New.
(tilegx_elf_tls_transition): New.
(tilegx_elf_check_relocs): Handle new tls relocations.
(tilegx_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilegx_elf_relocate_section): Ditto.
(tilegx_copy_bits): New.
(tilegx_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New.
(insn_mask_X1_no_dest_no_srca): New.
(insn_mask_Y0_no_dest_no_srca): New.
(insn_mask_Y1_no_dest_no_srca): New.
(insn_mask_X0_no_operand): New.
(insn_mask_X1_no_operand): New.
(insn_mask_Y0_no_operand): New.
(insn_mask_Y1_no_operand): New.
(insn_tls_ie_ld_X1): New.
(insn_tls_ie_ld4s_X1): New.
(insn_tls_ie_add_X0X1): New.
(insn_tls_ie_add_Y0Y1): New.
(insn_tls_ie_addx_X0X1): New.
(insn_tls_ie_addx_Y0Y1): New.
(insn_tls_gd_add_X0X1): New.
(insn_tls_gd_add_Y0Y1): New.
(insn_move_X0X1): New.
(insn_move_Y0Y1): New.
(insn_add_X0X1): New.
(insn_add_Y0Y1): New.
(insn_addx_X0X1): New.
(insn_addx_Y0Y1): New.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* tc-tilepro.c (O_tls_le): Define operator.
(O_tls_le_lo16): Ditto.
(O_tls_le_hi16): Ditto.
(O_tls_le_ha16): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilepro_instruction): Ditto.
(md_apply_fix): Ditto.
* tc-tilegx.c (O_hw1_got): Delete operator.
(O_hw2_got): Ditto.
(O_hw3_got): Ditto.
(O_hw2_last_got): Ditto.
(O_hw1_tls_gd): Ditto.
(O_hw2_tls_gd): Ditto.
(O_hw3_tls_gd): Ditto.
(O_hw2_last_tls_gd): Ditto.
(O_hw1_tls_ie): Ditto.
(O_hw2_tls_ie): Ditto.
(O_hw3_tls_ie): Ditto.
(O_hw2_last_tls_ie): Ditto.
(O_hw0_tls_le): Define operator.
(O_hw0_last_tls_le): Ditto.
(O_hw1_last_tls_le): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(O_tls_add): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Delete old operators; document new operators.
* doc/c-tilepro.texi: Ditto.
include/elf/
* tilegx.h (R_TILEGX_IMM16_X0_HW1_GOT): Delete.
(R_TILEGX_IMM16_X1_HW1_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW0_TLS_LE): New relocation.
(R_TILEGX_IMM16_X1_HW0_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_TLS_GD_CALL): Ditto.
(R_TILEGX_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEGX_TLS_IE_LOAD): Ditto.
(R_TILEGX_IMM8_X0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_ADD): Ditto.
* tilepro.h (R_TILEPRO_TLS_GD_CALL): New relocation.
(R_TILEPRO_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEPRO_TLS_IE_LOAD): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HA): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HA): Ditto.
include/opcode/
* tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS,
TILEGX_OPC_LD_TLS.
* tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS,
TILEPRO_OPC_LW_TLS_SN.
opcodes/
* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
TILEPRO_OPC_LW_TLS_SN.
2012-02-26 06:24:21 +08:00
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2012-02-25 Walter Lee <walt@tilera.com>
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* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
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* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
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TILEPRO_OPC_LW_TLS_SN.
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2012-02-22 02:09:48 +08:00
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2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.h (HLEPrefixNone): New.
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(HLEPrefixLock): Likewise.
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(HLEPrefixAny): Likewise.
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(HLEPrefixRelease): Likewise.
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Implement Intel Transactional Synchronization Extensions
gas/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (HLE_PREFIX): New.
(check_hle): Likewise.
(_i386_insn): Add have_hle.
(cpu_arch): Add .hle and .rtm.
(md_assemble): Call check_hle if i.have_hle isn't zero.
(parse_insn): Set i.have_hle to 1 for HLE prefix.
(output_jump): Support up to 2 byte opcode.
* doc/c-i386.texi: Document hle/.hle and rtm/.rtm.
gas/testsuite/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/hle-intel.d: New.
* gas/i386/hle.d: Likewise.
* gas/i386/hle.s: Likewise.
* gas/i386/hlebad.l: Likewise.
* gas/i386/hlebad.s: Likewise.
* gas/i386/rtm-intel.d: Likewise.
* gas/i386/rtm.d: Likewise.
* gas/i386/rtm.s: Likewise.
* gas/i386/x86-64-hle-intel.d: Likewise.
* gas/i386/x86-64-hle.d: Likewise.
* gas/i386/x86-64-hle.s: Likewise.
* gas/i386/x86-64-hlebad.l: Likewise.
* gas/i386/x86-64-hlebad.s: Likewise.
* gas/i386/x86-64-rtm-intel.d: Likewise.
* gas/i386/x86-64-rtm.d: Likewise.
* gas/i386/x86-64-rtm.s: Likewise.
* gas/i386/i386.exp: Run hle, hle-intel, hlebad x86-64-hle, rtm,
rtm-intel, x86-64-hle-intel, x86-64-hlebad, x86-64-rtm and
x86-64-rtm-intel.
include/opcode/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (XACQUIRE_PREFIX_OPCODE): New.
(XRELEASE_PREFIX_OPCODE): Likewise.
opcodes/
2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (HLE_Fixup1): New.
(HLE_Fixup2): Likewise.
(HLE_Fixup3): Likewise.
(Ebh1): Likewise.
(Evh1): Likewise.
(Ebh2): Likewise.
(Evh2): Likewise.
(Ebh3): Likewise.
(Evh3): Likewise.
(MOD_C6_REG_7): Likewise.
(MOD_C7_REG_7): Likewise.
(RM_C6_REG_7): Likewise.
(RM_C7_REG_7): Likewise.
(XACQUIRE_PREFIX): Likewise.
(XRELEASE_PREFIX): Likewise.
(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
MOD_C6_REG_7 and MOD_C7_REG_7.
(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
xtest.
(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
CPU_RTM_FLAGS.
(cpu_flags): Add CpuHLE and CpuRTM.
(opcode_modifiers): Add HLEPrefixOk.
* i386-opc.h (CpuHLE): New.
(CpuRTM): Likewise.
(HLEPrefixOk): Likewise.
(i386_cpu_flags): Add cpuhle and cpurtm.
(i386_opcode_modifier): Add hleprefixok.
* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
operand. Add xacquire, xrelease, xabort, xbegin, xend and
xtest.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-02-09 02:20:41 +08:00
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2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (HLE_Fixup1): New.
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(HLE_Fixup2): Likewise.
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(HLE_Fixup3): Likewise.
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(Ebh1): Likewise.
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(Evh1): Likewise.
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(Ebh2): Likewise.
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(Evh2): Likewise.
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(Ebh3): Likewise.
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(Evh3): Likewise.
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(MOD_C6_REG_7): Likewise.
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(MOD_C7_REG_7): Likewise.
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(RM_C6_REG_7): Likewise.
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(RM_C7_REG_7): Likewise.
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(XACQUIRE_PREFIX): Likewise.
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(XRELEASE_PREFIX): Likewise.
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(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
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cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
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Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
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(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
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not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
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MOD_C6_REG_7 and MOD_C7_REG_7.
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(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
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(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
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xtest.
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(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
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(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
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* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
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CPU_RTM_FLAGS.
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(cpu_flags): Add CpuHLE and CpuRTM.
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(opcode_modifiers): Add HLEPrefixOk.
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* i386-opc.h (CpuHLE): New.
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(CpuRTM): Likewise.
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(HLEPrefixOk): Likewise.
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(i386_cpu_flags): Add cpuhle and cpurtm.
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(i386_opcode_modifier): Add hleprefixok.
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* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
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add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
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sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
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operand. Add xacquire, xrelease, xabort, xbegin, xend and
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xtest.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2012-01-25 09:40:11 +08:00
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2012-01-24 DJ Delorie <dj@redhat.com>
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* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
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* rl78-decode.c: Regenerate.
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2012-01-17 07:51:35 +08:00
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2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
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PR binutils/10173
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* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
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2012-01-17 07:19:20 +08:00
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2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
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* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
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register and move them after pmove with PSR/PCSR register.
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2012-01-14 06:19:32 +08:00
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2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (mod_table): Add vmfunc.
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* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
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(cpu_flags): CpuVMFUNC.
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* i386-opc.h (CpuVMFUNC): New.
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(i386_cpu_flags): Add cpuvmfunc.
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* i386-opc.tbl: Add vmfunc.
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* i386-init.h: Regenerated.
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|
* i386-tbl.h: Likewise.
|
2011-12-15 18:21:51 +08:00
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|
2012-01-05 18:09:39 +08:00
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|
For older changes see ChangeLog-2011
|
1999-05-03 15:29:11 +08:00
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|
|
Local Variables:
|
2001-01-12 03:01:42 +08:00
|
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|
|
mode: change-log
|
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|
|
left-margin: 8
|
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|
fill-column: 74
|
1999-05-03 15:29:11 +08:00
|
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|
version-control: never
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End:
|
