2018-07-25 17:43:22 +08:00
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/* Target-dependent code for GNU/Linux on CSKY.
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2023-01-01 20:49:04 +08:00
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Copyright (C) 2012-2023 Free Software Foundation, Inc.
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2018-07-25 17:43:22 +08:00
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Contributed by C-SKY Microsystems and Mentor Graphics.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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2019-04-07 03:38:10 +08:00
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#include "osabi.h"
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2018-07-25 17:43:22 +08:00
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#include "glibc-tdep.h"
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#include "linux-tdep.h"
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2019-04-07 03:38:10 +08:00
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#include "gdbarch.h"
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2019-04-03 10:04:24 +08:00
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#include "solib-svr4.h"
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2019-04-07 03:38:10 +08:00
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#include "regset.h"
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2018-07-25 17:43:22 +08:00
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#include "trad-frame.h"
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#include "tramp-frame.h"
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2019-04-07 03:38:10 +08:00
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#include "csky-tdep.h"
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2018-07-25 17:43:22 +08:00
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/* Functions, definitions, and data structures for C-Sky core file debug. */
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/* General regset pc, r1, r0, psr, r2-r31 for CK810. */
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#define SIZEOF_CSKY_GREGSET 34*4
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/* Float regset fesr fsr fr0-fr31 for CK810. */
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#define SIZEOF_CSKY_FREGSET 34*4
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2022-08-08 11:15:30 +08:00
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/* Float regset vr0~vr15 fr15~fr31, reserved for CK810 when kernel 4.x. */
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#define SIZEOF_CSKY_FREGSET_K4X 400
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2018-07-25 17:43:22 +08:00
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/* Offset mapping table from core_section to regcache of general
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registers for ck810. */
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static const int csky_gregset_offset[] =
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{
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72, 1, 0, 89, 2, /* pc, r1, r0, psr, r2. */
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3, 4, 5, 6, 7, /* r3 ~ r32. */
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8, 9, 10, 11, 12,
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13, 14, 15, 16, 17,
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18, 19, 20, 21, 22,
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23, 24, 25, 26, 27,
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28, 29, 30, 31
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};
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/* Offset mapping table from core_section to regcache of float
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registers for ck810. */
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static const int csky_fregset_offset[] =
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{
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122, 123, 40, 41, 42, /* fcr, fesr, fr0 ~ fr2. */
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43, 44, 45, 46, 47, /* fr3 ~ fr15. */
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48, 49, 50, 51, 52,
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53, 54, 55
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};
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/* Implement the supply_regset hook for GP registers in core files. */
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static void
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csky_supply_gregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *regs, size_t len)
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{
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int i, gregset_num;
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const gdb_byte *gregs = (const gdb_byte *) regs ;
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gdb_assert (len >= SIZEOF_CSKY_GREGSET);
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gregset_num = ARRAY_SIZE (csky_gregset_offset);
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for (i = 0; i < gregset_num; i++)
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{
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if ((regnum == csky_gregset_offset[i] || regnum == -1)
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&& csky_gregset_offset[i] != -1)
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regcache->raw_supply (csky_gregset_offset[i], gregs + 4 * i);
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}
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}
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/* Implement the collect_regset hook for GP registers in core files. */
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static void
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csky_collect_gregset (const struct regset *regset,
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const struct regcache *regcache,
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int regnum, void *gregs_buf, size_t len)
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{
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int regno, gregset_num;
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gdb_byte *gregs = (gdb_byte *) gregs_buf ;
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gdb_assert (len >= SIZEOF_CSKY_GREGSET);
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gregset_num = ARRAY_SIZE (csky_gregset_offset);
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for (regno = 0; regno < gregset_num; regno++)
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{
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if ((regnum == csky_gregset_offset[regno] || regnum == -1)
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&& csky_gregset_offset[regno] != -1)
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regcache->raw_collect (regno,
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gregs + 4 + csky_gregset_offset[regno]);
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}
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}
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/* Implement the supply_regset hook for FP registers in core files. */
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2019-11-27 01:12:01 +08:00
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static void
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2018-07-25 17:43:22 +08:00
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csky_supply_fregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *regs, size_t len)
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{
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int i;
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int offset = 0;
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struct gdbarch *gdbarch = regcache->arch ();
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const gdb_byte *fregs = (const gdb_byte *) regs;
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int fregset_num = ARRAY_SIZE (csky_fregset_offset);
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gdb_assert (len >= SIZEOF_CSKY_FREGSET);
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2022-08-08 11:15:30 +08:00
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if (len == SIZEOF_CSKY_FREGSET)
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2018-07-25 17:43:22 +08:00
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{
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2022-08-08 11:15:30 +08:00
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for (i = 0; i < fregset_num; i++)
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2018-07-25 17:43:22 +08:00
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{
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2022-08-08 11:15:30 +08:00
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if ((regnum == csky_fregset_offset[i] || regnum == -1)
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&& csky_fregset_offset[i] != -1)
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{
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int num = csky_fregset_offset[i];
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offset += register_size (gdbarch, num);
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regcache->raw_supply (csky_fregset_offset[i], fregs + offset);
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}
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2018-07-25 17:43:22 +08:00
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}
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}
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2022-08-08 11:15:30 +08:00
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else if (len == SIZEOF_CSKY_FREGSET_K4X)
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{
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/* When kernel version >= 4.x, .reg2 size will be 400.
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Contents is {
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unsigned long vr[96];
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unsigned long fcr;
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unsigned long fesr;
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unsigned long fid;
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unsigned long reserved;
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}
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VR[96] means: (vr0~vr15) + (fr16~fr31), each Vector register is
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128-bits, each Float register is 64 bits, the total size is
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(4*96).
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In addition, for fr0~fr15, each FRx is the lower 64 bits of the
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corresponding VRx. So fr0~fr15 and vr0~vr15 regisetrs use the same
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offset. */
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int fcr_regno[] = {122, 123, 121}; /* fcr, fesr, fid. */
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/* Supply vr0~vr15. */
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for (i = 0; i < 16; i ++)
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{
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2022-09-01 22:39:59 +08:00
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if (*gdbarch_register_name (gdbarch, (CSKY_VR0_REGNUM + i)) != '\0')
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2022-08-08 11:15:30 +08:00
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{
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offset = 16 * i;
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regcache->raw_supply (CSKY_VR0_REGNUM + i, fregs + offset);
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}
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}
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/* Supply fr0~fr15. */
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for (i = 0; i < 16; i ++)
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{
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2022-09-01 22:39:59 +08:00
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if (*gdbarch_register_name (gdbarch, (CSKY_FR0_REGNUM + i)) != '\0')
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2022-08-08 11:15:30 +08:00
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{
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offset = 16 * i;
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regcache->raw_supply (CSKY_FR0_REGNUM + i, fregs + offset);
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}
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}
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/* Supply fr16~fr31. */
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for (i = 0; i < 16; i ++)
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{
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2022-09-01 22:39:59 +08:00
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if (*gdbarch_register_name (gdbarch, (CSKY_FR16_REGNUM + i)) != '\0')
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2022-08-08 11:15:30 +08:00
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{
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offset = (16 * 16) + (8 * i);
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regcache->raw_supply (CSKY_FR16_REGNUM + i, fregs + offset);
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}
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}
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/* Supply fcr, fesr, fid. */
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for (i = 0; i < 3; i ++)
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{
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2022-09-01 22:39:59 +08:00
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if (*gdbarch_register_name (gdbarch, fcr_regno[i]) != '\0')
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2022-08-08 11:15:30 +08:00
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{
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offset = (16 * 16) + (16 * 8) + (4 * i);
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regcache->raw_supply (fcr_regno[i], fregs + offset);
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}
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}
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}
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else
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{
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2022-08-09 10:13:57 +08:00
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warning (_("Unknow size %s of section .reg2, can not get value"
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" of float registers."), pulongest (len));
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2022-08-08 11:15:30 +08:00
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}
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2018-07-25 17:43:22 +08:00
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}
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/* Implement the collect_regset hook for FP registers in core files. */
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static void
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csky_collect_fregset (const struct regset *regset,
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const struct regcache *regcache,
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int regnum, void *fregs_buf, size_t len)
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{
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int regno;
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struct gdbarch *gdbarch = regcache->arch ();
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gdb_byte *fregs = (gdb_byte *) fregs_buf ;
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int fregset_num = ARRAY_SIZE (csky_fregset_offset);
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int offset = 0;
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gdb_assert (len >= SIZEOF_CSKY_FREGSET);
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2022-08-08 11:15:30 +08:00
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if (len == SIZEOF_CSKY_FREGSET)
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2018-07-25 17:43:22 +08:00
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{
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2022-08-08 11:15:30 +08:00
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for (regno = 0; regno < fregset_num; regno++)
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{
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if ((regnum == csky_fregset_offset[regno] || regnum == -1)
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&& csky_fregset_offset[regno] != -1)
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{
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offset += register_size (gdbarch, csky_fregset_offset[regno]);
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regcache->raw_collect (regno, fregs + offset);
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}
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}
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}
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else if (len == SIZEOF_CSKY_FREGSET_K4X)
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{
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/* When kernel version >= 4.x, .reg2 size will be 400.
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Contents is {
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unsigned long vr[96];
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unsigned long fcr;
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unsigned long fesr;
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unsigned long fid;
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unsigned long reserved;
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}
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VR[96] means: (vr0~vr15) + (fr16~fr31), each Vector register is$
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128-bits, each Float register is 64 bits, the total size is$
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(4*96).$
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In addition, for fr0~fr15, each FRx is the lower 64 bits of the$
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corresponding VRx. So fr0~fr15 and vr0~vr15 regisetrs use the same$
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offset. */
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int i = 0;
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int fcr_regno[] = {122, 123, 121}; /* fcr, fesr, fid. */
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/* Supply vr0~vr15. */
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for (i = 0; i < 16; i ++)
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2018-07-25 17:43:22 +08:00
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{
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2022-09-01 22:39:59 +08:00
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if (*gdbarch_register_name (gdbarch, (CSKY_VR0_REGNUM + i)) != '\0')
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2022-08-08 11:15:30 +08:00
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{
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offset = 16 * i;
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regcache ->raw_collect (CSKY_VR0_REGNUM + i, fregs + offset);
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}
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2018-07-25 17:43:22 +08:00
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}
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2022-08-08 11:15:30 +08:00
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/* Supply fr16~fr31. */
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for (i = 0; i < 16; i ++)
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{
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2022-09-01 22:39:59 +08:00
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if (*gdbarch_register_name (gdbarch, (CSKY_FR16_REGNUM + i)) != '\0')
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2022-08-08 11:15:30 +08:00
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{
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offset = (16 * 16) + (8 * i);
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regcache ->raw_collect (CSKY_FR16_REGNUM + i, fregs + offset);
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}
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}
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/* Supply fcr, fesr, fid. */
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for (i = 0; i < 3; i ++)
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{
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2022-09-01 22:39:59 +08:00
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if (*gdbarch_register_name (gdbarch, fcr_regno[i]) != '\0')
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2022-08-08 11:15:30 +08:00
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{
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offset = (16 * 16) + (16 * 8) + (4 * i);
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regcache ->raw_collect (fcr_regno[i], fregs + offset);
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}
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}
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}
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else
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{
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2022-08-09 10:13:57 +08:00
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warning (_("Unknow size %s of section .reg2, will not set value"
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" of float registers."), pulongest (len));
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2018-07-25 17:43:22 +08:00
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}
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}
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static const struct regset csky_regset_general =
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{
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NULL,
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csky_supply_gregset,
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csky_collect_gregset
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};
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static const struct regset csky_regset_float =
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{
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NULL,
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csky_supply_fregset,
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2022-08-08 11:15:30 +08:00
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csky_collect_fregset,
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/* Allow .reg2 to have a different size, and the size of .reg2 should
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always be bigger than SIZEOF_CSKY_FREGSET. */
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1
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2018-07-25 17:43:22 +08:00
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};
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/* Iterate over core file register note sections. */
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static void
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csky_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
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iterate_over_regset_sections_cb *cb,
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void *cb_data,
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const struct regcache *regcache)
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{
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cb (".reg", sizeof (csky_gregset_offset), sizeof (csky_gregset_offset),
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&csky_regset_general, NULL, cb_data);
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cb (".reg2", sizeof (csky_fregset_offset), sizeof (csky_fregset_offset),
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&csky_regset_float, NULL, cb_data);
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}
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static void
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csky_linux_rt_sigreturn_init (const struct tramp_frame *self,
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2022-07-26 01:06:35 +08:00
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frame_info_ptr this_frame,
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2018-07-25 17:43:22 +08:00
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struct trad_frame_cache *this_cache,
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CORE_ADDR func)
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{
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int i;
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CORE_ADDR sp = get_frame_register_unsigned (this_frame, 14);
|
|
|
|
|
|
|
|
CORE_ADDR base = sp + CSKY_SIGINFO_OFFSET + CSKY_SIGINFO_SIZE
|
|
|
|
+ CSKY_UCONTEXT_SIGCONTEXT
|
|
|
|
+ CSKY_SIGCONTEXT_SC_USP
|
|
|
|
+ CSKY_SIGCONTEXT_SC_A0;
|
|
|
|
|
|
|
|
/* Set addrs of R0 ~ R13. */
|
|
|
|
for (i = 0; i < 14; i++)
|
|
|
|
trad_frame_set_reg_addr (this_cache, i, base + i * 4);
|
|
|
|
|
|
|
|
/* Set addrs of SP(R14) and R15. */
|
|
|
|
trad_frame_set_reg_addr (this_cache, 14, base - 4);
|
|
|
|
trad_frame_set_reg_addr (this_cache, 15, base + 4 * 14);
|
|
|
|
|
|
|
|
/* Set addrs of R16 ~ R31. */
|
|
|
|
for (i = 15; i < 31; i++)
|
|
|
|
trad_frame_set_reg_addr (this_cache, i, base + i * 4);
|
|
|
|
|
|
|
|
/* Set addrs of PSR and PC. */
|
|
|
|
trad_frame_set_reg_addr (this_cache, 89, base + 4 * 33);
|
|
|
|
trad_frame_set_reg_addr (this_cache, 72, base + 4 * 34);
|
|
|
|
|
|
|
|
trad_frame_set_id (this_cache, frame_id_build (sp, func));
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct tramp_frame
|
|
|
|
csky_linux_rt_sigreturn_tramp_frame = {
|
|
|
|
SIGTRAMP_FRAME,
|
|
|
|
4,
|
|
|
|
{
|
|
|
|
{ CSKY_MOVI_R7_173, ULONGEST_MAX },
|
|
|
|
{ CSKY_TRAP_0, ULONGEST_MAX },
|
|
|
|
{ TRAMP_SENTINEL_INSN }
|
|
|
|
},
|
|
|
|
csky_linux_rt_sigreturn_init
|
|
|
|
};
|
|
|
|
|
2022-08-15 10:40:29 +08:00
|
|
|
static void
|
|
|
|
csky_linux_rt_sigreturn_init_pt_regs (const struct tramp_frame *self,
|
2022-07-26 01:06:35 +08:00
|
|
|
frame_info_ptr this_frame,
|
2022-08-15 10:40:29 +08:00
|
|
|
struct trad_frame_cache *this_cache,
|
|
|
|
CORE_ADDR func)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
CORE_ADDR sp = get_frame_register_unsigned (this_frame, CSKY_SP_REGNUM);
|
|
|
|
|
|
|
|
CORE_ADDR base = sp + CSKY_SIGINFO_OFFSET + CSKY_SIGINFO_SIZE
|
|
|
|
+ CSKY_UCONTEXT_SIGCONTEXT
|
|
|
|
+ CSKY_SIGCONTEXT_PT_REGS_TLS;
|
|
|
|
|
|
|
|
/* LR */
|
|
|
|
trad_frame_set_reg_addr (this_cache, CSKY_R15_REGNUM, base);
|
|
|
|
|
|
|
|
/* PC */
|
|
|
|
trad_frame_set_reg_addr (this_cache, CSKY_PC_REGNUM, base + 4);
|
|
|
|
|
|
|
|
/* PSR */
|
|
|
|
trad_frame_set_reg_addr (this_cache, CSKY_CR0_REGNUM, base + 8);
|
|
|
|
|
|
|
|
/* SP */
|
|
|
|
trad_frame_set_reg_addr (this_cache, CSKY_SP_REGNUM, base + 12);
|
|
|
|
|
|
|
|
/* Set addrs of R0 ~ R13. */
|
|
|
|
for (i = 0; i < 14; i++)
|
|
|
|
trad_frame_set_reg_addr (this_cache, i, base + i * 4 + 20);
|
|
|
|
|
|
|
|
trad_frame_set_id (this_cache, frame_id_build (sp, func));
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static struct tramp_frame
|
|
|
|
csky_linux_rt_sigreturn_tramp_frame_kernel_4x = {
|
|
|
|
SIGTRAMP_FRAME,
|
|
|
|
4,
|
|
|
|
{
|
|
|
|
{ CSKY_MOVI_R7_139, ULONGEST_MAX },
|
|
|
|
{ CSKY_TRAP_0, ULONGEST_MAX },
|
|
|
|
{ TRAMP_SENTINEL_INSN }
|
|
|
|
},
|
|
|
|
csky_linux_rt_sigreturn_init_pt_regs
|
|
|
|
};
|
|
|
|
|
2018-07-25 17:43:22 +08:00
|
|
|
/* Hook function for gdbarch_register_osabi. */
|
|
|
|
|
|
|
|
static void
|
|
|
|
csky_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
|
|
|
|
{
|
gdb: make displaced stepping implementation capable of managing multiple buffers
The displaced_step_buffer class, introduced in the previous patch,
manages access to a single displaced step buffer. Change it into
displaced_step_buffers (note the plural), which manages access to
multiple displaced step buffers.
When preparing a displaced step for a thread, it looks for an unused
buffer.
For now, all users still pass a single displaced step buffer, so no real
behavior change is expected here. The following patch makes a user pass
more than one buffer, so the functionality introduced by this patch is
going to be useful in the next one.
gdb/ChangeLog:
* displaced-stepping.h (struct displaced_step_buffer): Rename
to...
(struct displaced_step_buffers): ... this.
<m_addr, m_current_thread, m_copy_insn_closure>: Remove.
<struct displaced_step_buffer>: New inner class.
<m_buffers>: New.
* displaced-stepping.c (displaced_step_buffer::prepare): Rename
to...
(displaced_step_buffers::prepare): ... this, adjust for multiple
buffers.
(displaced_step_buffer::finish): Rename to...
(displaced_step_buffers::finish): ... this, adjust for multiple
buffers.
(displaced_step_buffer::copy_insn_closure_by_addr): Rename to...
(displaced_step_buffers::copy_insn_closure_by_addr): ... this,
adjust for multiple buffers.
(displaced_step_buffer::restore_in_ptid): Rename to...
(displaced_step_buffers::restore_in_ptid): ... this, adjust for
multiple buffers.
* linux-tdep.h (linux_init_abi): Change supports_displaced_step
for num_disp_step_buffers.
* linux-tdep.c (struct linux_gdbarch_data)
<num_disp_step_buffers>: New field.
(struct linux_info) <disp_step_buf>: Rename to...
<disp_step_bufs>: ... this, change type to
displaced_step_buffers.
(linux_displaced_step_prepare): Use
linux_gdbarch_data::num_disp_step_buffers to create that number
of buffers.
(linux_displaced_step_finish): Adjust.
(linux_displaced_step_copy_insn_closure_by_addr): Adjust.
(linux_displaced_step_restore_all_in_ptid): Adjust.
(linux_init_abi): Change supports_displaced_step parameter for
num_disp_step_buffers, save it in linux_gdbarch_data.
* aarch64-linux-tdep.c (aarch64_linux_init_abi): Adjust.
* alpha-linux-tdep.c (alpha_linux_init_abi): Adjust.
* amd64-linux-tdep.c (amd64_linux_init_abi_common): Change
supports_displaced_step parameter for num_disp_step_buffers.
(amd64_linux_init_abi): Adjust.
(amd64_x32_linux_init_abi): Adjust.
* arc-linux-tdep.c (arc_linux_init_osabi): Adjust.
* arm-linux-tdep.c (arm_linux_init_abi): Adjust.
* bfin-linux-tdep.c (bfin_linux_init_abi): Adjust.
* cris-linux-tdep.c (cris_linux_init_abi): Adjust.
* csky-linux-tdep.c (csky_linux_init_abi): Adjust.
* frv-linux-tdep.c (frv_linux_init_abi): Adjust.
* hppa-linux-tdep.c (hppa_linux_init_abi): Adjust.
* i386-linux-tdep.c (i386_linux_init_abi): Adjust.
* ia64-linux-tdep.c (ia64_linux_init_abi): Adjust.
* m32r-linux-tdep.c (m32r_linux_init_abi): Adjust.
* m68k-linux-tdep.c (m68k_linux_init_abi):
* microblaze-linux-tdep.c (microblaze_linux_init_abi):
* mips-linux-tdep.c (mips_linux_init_abi): Adjust.
* mn10300-linux-tdep.c (am33_linux_init_osabi): Adjust.
* nios2-linux-tdep.c (nios2_linux_init_abi): Adjust.
* or1k-linux-tdep.c (or1k_linux_init_abi): Adjust.
* ppc-linux-tdep.c (ppc_linux_init_abi): Adjust.
* riscv-linux-tdep.c (riscv_linux_init_abi): Adjust.
* rs6000-tdep.c (struct ppc_inferior_data) <disp_step_buf>:
Change type to displaced_step_buffers.
* s390-linux-tdep.c (s390_linux_init_abi_any): Adjust.
* sh-linux-tdep.c (sh_linux_init_abi): Adjust.
* sparc-linux-tdep.c (sparc32_linux_init_abi): Adjust.
* sparc64-linux-tdep.c (sparc64_linux_init_abi): Adjust.
* tic6x-linux-tdep.c (tic6x_uclinux_init_abi): Adjust.
* tilegx-linux-tdep.c (tilegx_linux_init_abi): Adjust.
* xtensa-linux-tdep.c (xtensa_linux_init_abi): Adjust.
Change-Id: Ia9c02f207da2c9e1d9188020139619122392bb70
2020-12-05 05:43:56 +08:00
|
|
|
linux_init_abi (info, gdbarch, 0);
|
2018-07-25 17:43:22 +08:00
|
|
|
|
|
|
|
/* Shared library handling. */
|
|
|
|
set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
|
|
|
|
set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
|
|
|
|
set_solib_svr4_fetch_link_map_offsets (gdbarch,
|
2021-08-17 07:17:25 +08:00
|
|
|
linux_ilp32_fetch_link_map_offsets);
|
2018-07-25 17:43:22 +08:00
|
|
|
|
|
|
|
/* Enable TLS support. */
|
|
|
|
set_gdbarch_fetch_tls_load_module_address (gdbarch,
|
|
|
|
svr4_fetch_objfile_link_map);
|
|
|
|
|
|
|
|
/* Core file support. */
|
|
|
|
set_gdbarch_iterate_over_regset_sections (
|
|
|
|
gdbarch, csky_linux_iterate_over_regset_sections);
|
|
|
|
|
|
|
|
/* Append tramp frame unwinder for SIGNAL. */
|
|
|
|
|
|
|
|
tramp_frame_prepend_unwinder (gdbarch,
|
|
|
|
&csky_linux_rt_sigreturn_tramp_frame);
|
2022-08-15 10:40:29 +08:00
|
|
|
tramp_frame_prepend_unwinder (gdbarch,
|
|
|
|
&csky_linux_rt_sigreturn_tramp_frame_kernel_4x);
|
2018-07-25 17:43:22 +08:00
|
|
|
}
|
|
|
|
|
2020-01-14 03:01:38 +08:00
|
|
|
void _initialize_csky_linux_tdep ();
|
2018-07-25 17:43:22 +08:00
|
|
|
void
|
2020-01-14 03:01:38 +08:00
|
|
|
_initialize_csky_linux_tdep ()
|
2018-07-25 17:43:22 +08:00
|
|
|
{
|
|
|
|
gdbarch_register_osabi (bfd_arch_csky, 0, GDB_OSABI_LINUX,
|
|
|
|
csky_linux_init_abi);
|
|
|
|
}
|