binutils-gdb/ld/emultempl/ppc32elf.em

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# This shell script emits a C file. -*- C -*-
# Copyright (C) 2003-2019 Free Software Foundation, Inc.
#
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# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
#
# This file is sourced from elf32.em, and defines extra powerpc32-elf
# specific routines.
#
2007-07-19 Roland McGrath <roland@redhat.com> * genscripts.sh (source_em, fragment): New sh functions. Truncate e${EMULATION_NAME}.c file before .em script fills it. Use source_em in place of . for the .em script. * emultempl/generic.em: Use fragment and source_em functions. * emultempl/aix.em: Likewise. * emultempl/alphaelf.em: Likewise. * emultempl/armcoff.em: Likewise. * emultempl/armelf.em: Likewise. * emultempl/avrelf.em: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/crxelf.em: Likewise. * emultempl/elf-generic.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/genelf.em: Likewise. * emultempl/gld960.em: Likewise. * emultempl/gld960c.em: Likewise. * emultempl/hppaelf.em: Likewise. * emultempl/ia64elf.em: Likewise. * emultempl/irix.em: Likewise. * emultempl/linux.em: Likewise. * emultempl/lnk960.em: Likewise. * emultempl/m68hc1xelf.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mipsecoff.em: Likewise. * emultempl/mipself.em: Likewise. * emultempl/mmix-elfnmmo.em: Likewise. * emultempl/mmixelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/needrelax.em: Likewise. * emultempl/netbsd.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise. * emultempl/scoreelf.em: Likewise. * emultempl/sh64elf.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/ticoff.em: Likewise. * emultempl/vanilla.em: Likewise. * emultempl/vxworks.em: Likewise. * emultempl/xtensaelf.em: Likewise. * emultempl/z80.em: Likewise.
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fragment <<EOF
#include "elf32-ppc.h"
#include "ldlex.h"
#include "ldlang.h"
#define is_ppc_elf(bfd) \
(bfd_get_flavour (bfd) == bfd_target_elf_flavour \
* elf-bfd.h (emum elf_object_id): Rename to elf_target_id. Add entries for other architectures. (struct elf_link_hash_table): Add hash_table_id field. (elf_hash_table_id): New accessor macro. * elflink.c (_bfd_elf_link_hash_table_init): Add target_id parameter. * elf-m10300.c (elf32_mn10300_hash_table): Check table id before returning cast pointer. (elf32_mn10300_link_hash_table_create): Identify new table as containing MN10300 extensions. (mn10300_elf_relax_section): Check pointer returned by elf32_mn10300_hash_table. * elf32-arm.c: Likewise, except using ARM extensions. * elf32-avr.c: Likewise, except using AVR extensions. * elf32-bfin.c: Likewise, except using BFIN extensions. * elf32-cris.c: Likewise, except using CRIS extensions. * elf32-frv.c: Likewise, except using FRV extensions. * elf32-hppa.c: Likewise, except using HPPA32 extensions. * elf32-i386.c: Likewise, except using I386 extensions. * elf32-lm32.c: Likewise, except using LM32 extensions. * elf32-m32r.c: Likewise, except using M32RM extensions. * elf32-m68hc11.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.c: Likewise, except using M68HC11 extensions. * elf32-m68hc1x.h: Likewise, except using M68HC11 extensions. * elf32-m68k.c: Likewise, except using M68K extensions. * elf32-microblaze.c: Likewise, except using MICROBLAZE extensions. * elf32-ppc.c: Likewise, except using PPC32 extensions. * elf32-s390.c: Likewise, except using S390 extensions. * elf32-sh.c: Likewise, except using SH extensions. * elf32-spu.c: Likewise, except using SPU extensions. * elf32-xtensa.c: Likewise, except using XTENSA extensions. * elf64-alpha.c: Likewise, except using ALPHA extensions. * elf64-hppa.c: Likewise, except using HPPA64 extensions. * elf64-ppc.c: Likewise, except using PPC64 extensions. * elf64-s390.c: Likewise, except using S390 extensions. * elf64-x86-64.c: Likewise, except using X86_64 extensions. * elfxx-ia64.c: Likewise, except using IA64 extensions. * elfxx-mips.c: Likewise, except using MIPS extensions. * elfxx-sparc.c: Likewise, except using SPARC extensions. * elfxx-sparc.h: Likewise, except using SPARC extensions. * elf32-cr16.c (struct elf32_cr16_link_hash_table): Delete redundant structure. (elf32_cr16_hash_table): Delete unused macro. (elf32_cr16_link_hash_traverse): Delete unused macro. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-vax.c: Likewise. * elf64-sh64.c: Likewise. * emultempl/alphaelf.em: Update value expected from elf_object_id. * emultempl/hppaelf.em: Likewise. * emultempl/mipself.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise.
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&& elf_object_id (bfd) == PPC32_ELF_DATA)
/* Whether to run tls optimization. */
static int notlsopt = 0;
Inline PLT call optimization This patch adds the analysis part of PLT call optimization, enabling the code added with the previous patch that actually performs the optimization. Gold support is not available yet. bfd/ * elf64-ppc.c (struct _ppc64_elf_section_data): Add has_pltcall field. (struct ppc_link_hash_table): Add can_convert_all_inline_plt. (ppc64_elf_check_relocs): Set has_pltcall. (ppc64_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc64_elf_inline_plt): New function. (ppc64_elf_size_dynamic_sections): Discard some PLT entries for locals. * elf64-ppc.h (ppc64_elf_inline_plt): Declare. * elf32-ppc.c (has_pltcall): Define. (struct ppc_elf_link_hash_table): Add can_convert_all_inline_plt. (ppc_elf_check_relocs): Set has_pltcall. (ppc_elf_inline_plt): New function. (ppc_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc_elf_size_dynamic_sections): Likewise. * elf32-ppc.h (ppc_elf_inline_plt): Declare. ld/ * emultempl/ppc64elf.em (no_inline_plt): New var. (ppc_before_allocation): Call ppc64_elf_inline_plt. (enum ppc64_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize. * emultemps/ppc32elf.em (no_inline_opt): New var. (prelim_size_sections): New function, extracted from.. (ppc_before_allocation): ..here. Call ppc_elf_inline_plt. (enum ppc32_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize.
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/* Whether to convert inline PLT calls to direct. */
static int no_inline_opt = 0;
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
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/* Choose the correct place for .got. */
static int old_got = 0;
static struct ppc_elf_params params = { PLT_UNSET, 0, -1,
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
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0, 0, 0, 0, 0, 0, 0 };
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
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static void
ppc_after_open_output (void)
{
if (params.emit_stub_syms < 0)
Add output_type to bfd_link_info The "shared" field in bfd_link_info is set for both DSO and and PIE. There are separate fields for executable and relocatable outputs. This patch adds an "output_type" field: enum output_type { type_unknown = 0, type_executable, type_dll, type_relocatable }; and a "pic" field to bfd_link_info to replace shared, executable and relocatable fields so that we can use the "output_type" field to check for output type and the "pic" field check if output is PIC. Macros, bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie, are provided to check for output features. bfd/ * bfd/aoutx.h: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * bfd/bout.c: Likewise. * bfd/coff-alpha.c: Likewise. * bfd/coff-arm.c: Likewise. * bfd/coff-i386.c: Likewise. * bfd/coff-i960.c: Likewise. * bfd/coff-m68k.c: Likewise. * bfd/coff-mcore.c: Likewise. * bfd/coff-mips.c: Likewise. * bfd/coff-ppc.c: Likewise. * bfd/coff-rs6000.c: Likewise. * bfd/coff-sh.c: Likewise. * bfd/coff-tic80.c: Likewise. * bfd/coff-x86_64.c: Likewise. * bfd/coff64-rs6000.c: Likewise. * bfd/coffgen.c: Likewise. * bfd/cofflink.c: Likewise. * bfd/ecoff.c: Likewise. * bfd/ecofflink.c: Likewise. * bfd/elf-bfd.h: Likewise. * bfd/elf-eh-frame.c: Likewise. * bfd/elf-ifunc.c: Likewise. * bfd/elf-m10200.c: Likewise. * bfd/elf-m10300.c: Likewise. * bfd/elf-s390-common.c: Likewise. * bfd/elf-vxworks.c: Likewise. * bfd/elf.c: Likewise. * bfd/elf32-arm.c: Likewise. * bfd/elf32-avr.c: Likewise. * bfd/elf32-bfin.c: Likewise. * bfd/elf32-cr16.c: Likewise. * bfd/elf32-cr16c.c: Likewise. * bfd/elf32-cris.c: Likewise. * bfd/elf32-crx.c: Likewise. * bfd/elf32-d10v.c: Likewise. * bfd/elf32-dlx.c: Likewise. * bfd/elf32-epiphany.c: Likewise. * bfd/elf32-fr30.c: Likewise. * bfd/elf32-frv.c: Likewise. * bfd/elf32-ft32.c: Likewise. * bfd/elf32-h8300.c: Likewise. * bfd/elf32-hppa.c: Likewise. * bfd/elf32-i370.c: Likewise. * bfd/elf32-i386.c: Likewise. * bfd/elf32-i860.c: Likewise. * bfd/elf32-ip2k.c: Likewise. * bfd/elf32-iq2000.c: Likewise. * bfd/elf32-lm32.c: Likewise. * bfd/elf32-m32c.c: Likewise. * bfd/elf32-m32r.c: Likewise. * bfd/elf32-m68hc11.c: Likewise. * bfd/elf32-m68hc1x.c: Likewise. * bfd/elf32-m68k.c: Likewise. * bfd/elf32-mcore.c: Likewise. * bfd/elf32-mep.c: Likewise. * bfd/elf32-metag.c: Likewise. * bfd/elf32-microblaze.c: Likewise. * bfd/elf32-moxie.c: Likewise. * bfd/elf32-msp430.c: Likewise. * bfd/elf32-mt.c: Likewise. * bfd/elf32-nds32.c: Likewise. * bfd/elf32-nios2.c: Likewise. * bfd/elf32-or1k.c: Likewise. * bfd/elf32-ppc.c: Likewise. * bfd/elf32-rl78.c: Likewise. * bfd/elf32-rx.c: Likewise. * bfd/elf32-s390.c: Likewise. * bfd/elf32-score.c: Likewise. * bfd/elf32-score7.c: Likewise. * bfd/elf32-sh-symbian.c: Likewise. * bfd/elf32-sh.c: Likewise. * bfd/elf32-sh64.c: Likewise. * bfd/elf32-spu.c: Likewise. * bfd/elf32-tic6x.c: Likewise. * bfd/elf32-tilepro.c: Likewise. * bfd/elf32-v850.c: Likewise. * bfd/elf32-vax.c: Likewise. * bfd/elf32-visium.c: Likewise. * bfd/elf32-xc16x.c: Likewise. * bfd/elf32-xstormy16.c: Likewise. * bfd/elf32-xtensa.c: Likewise. * bfd/elf64-alpha.c: Likewise. * bfd/elf64-hppa.c: Likewise. * bfd/elf64-ia64-vms.c: Likewise. * bfd/elf64-mmix.c: Likewise. * bfd/elf64-ppc.c: Likewise. * bfd/elf64-s390.c: Likewise. * bfd/elf64-sh64.c: Likewise. * bfd/elf64-x86-64.c: Likewise. * bfd/elflink.c: Likewise. * bfd/elfnn-aarch64.c: Likewise. * bfd/elfnn-ia64.c: Likewise. * bfd/elfxx-mips.c: Likewise. * bfd/elfxx-sparc.c: Likewise. * bfd/elfxx-tilegx.c: Likewise. * bfd/i386linux.c: Likewise. * bfd/linker.c: Likewise. * bfd/m68klinux.c: Likewise. * bfd/pdp11.c: Likewise. * bfd/pe-mips.c: Likewise. * bfd/peXXigen.c: Likewise. * bfd/reloc.c: Likewise. * bfd/reloc16.c: Likewise. * bfd/sparclinux.c: Likewise. * bfd/sunos.c: Likewise. * bfd/vms-alpha.c: Likewise. * bfd/xcofflink.c: Likewise. include/ * include/bfdlink.h (output_type): New enum. (bfd_link_executable): New macro. (bfd_link_dll): Likewise. (bfd_link_relocatable): Likewise. (bfd_link_pic): Likewise. (bfd_link_pie): Likewise. (bfd_link_info): Remove shared, executable, pie and relocatable. Add output_type and pic. ld/ * ld/ldctor.c: Replace shared, executable, relocatable and pie fields with bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic and bfd_link_pie. * ld/ldemul.c: Likewise. * ld/ldfile.c: Likewise. * ld/ldlang.c: Likewise. * ld/ldmain.c: Likewise. * ld/ldwrite.c: Likewise. * ld/lexsup.c: Likewise. * ld/pe-dll.c: Likewise. * ld/plugin.c: Likewise. * ld/emultempl/aarch64elf.em: Likewise. * ld/emultempl/aix.em: Likewise. * ld/emultempl/alphaelf.em: Likewise. * ld/emultempl/armcoff.em: Likewise. * ld/emultempl/armelf.em: Likewise. * ld/emultempl/avrelf.em: Likewise. * ld/emultempl/beos.em: Likewise. * ld/emultempl/cr16elf.em: Likewise. * ld/emultempl/elf-generic.em: Likewise. * ld/emultempl/elf32.em: Likewise. * ld/emultempl/genelf.em: Likewise. * ld/emultempl/generic.em: Likewise. * ld/emultempl/gld960.em: Likewise. * ld/emultempl/gld960c.em: Likewise. * ld/emultempl/hppaelf.em: Likewise. * ld/emultempl/irix.em: Likewise. * ld/emultempl/linux.em: Likewise. * ld/emultempl/lnk960.em: Likewise. * ld/emultempl/m68hc1xelf.em: Likewise. * ld/emultempl/m68kcoff.em: Likewise. * ld/emultempl/m68kelf.em: Likewise. * ld/emultempl/metagelf.em: Likewise. * ld/emultempl/mipself.em: Likewise. * ld/emultempl/mmo.em: Likewise. * ld/emultempl/msp430.em: Likewise. * ld/emultempl/nds32elf.em: Likewise. * ld/emultempl/needrelax.em: Likewise. * ld/emultempl/nios2elf.em: Likewise. * ld/emultempl/pe.em: Likewise. * ld/emultempl/pep.em: Likewise. * ld/emultempl/ppc32elf.em: Likewise. * ld/emultempl/ppc64elf.em: Likewise. * ld/emultempl/sh64elf.em: Likewise. * ld/emultempl/solaris2.em: Likewise. * ld/emultempl/spuelf.em: Likewise. * ld/emultempl/sunos.em: Likewise. * ld/emultempl/tic6xdsbt.em: Likewise. * ld/emultempl/ticoff.em: Likewise. * ld/emultempl/v850elf.em: Likewise. * ld/emultempl/vms.em: Likewise. * ld/emultempl/vxworks.em: Likewise.
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params.emit_stub_syms = (link_info.emitrelocations
|| bfd_link_pic (&link_info));
if (params.pagesize == 0)
params.pagesize = config.commonpagesize;
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
ppc_elf_link_params (&link_info, &params);
}
EOF
# No --secure-plt, --bss-plt, or --sdata-got for vxworks.
if test -z "$VXWORKS_BASE_EM_FILE" ; then
fragment <<EOF
static void
ELF: Call check_relocs after opening all inputs For all ELF targers, call check_relocs after opening all inputs and garbage collection. Since the symbol resolution is known, check_relocs can be simplified. Also garbage collection doesn't need to undo what check_relocs has done for symbols which have been garbage collected. Since ELF targets never see the removed sections, gc_sweep_hook can be removed from elf_backend_data and we can avoid GOT/PLT with garbage collection now. Set link_info.check_relocs_after_open_input to TRUE for all linker targets which use ELF linker and update garbage collection tests to remove unused GOT section. ldemul_after_check_relocs is added for powerpc to support --secure-plt, --bss-plt and --sdata-got. Tested natively without regressions on i686, x86-64 and x32. Tested cross binutils on x86-64 without regressions for aarch64-linux, alpha-linux, arm-linux, bfin-elf, cr16-elf, cris-elf, crx-elf, frv-linux, hppa64-linux, hppa-linux, ia64-linux, lm32-elf, m32r-elf, m68k-linux, mcore-elf, metag-elf, microblaze-linux, mips-linux, mmix, mn10300-elf, nds32le-linux, nios2-linux, or1k-elf, powerpc64-linux, powerpc-linux, riscv32-linux, riscv64-linux, s390-linux, s390x-linux, score-elf, sh3-linux, sparc64-linux, sparc-linux, tic6x-elf, tilegx-linux, tilepro-linux, vax-linux, x86_64-mingw32 and xtensa-linux. bfd/ * elf-bfd.h (elf_backend_data): Remove gc_sweep_hook. * elf32-arm.c (elf32_arm_gc_sweep_hook): Removed. (elf_backend_gc_sweep_hook): Likewise. * elf32-bfin.c (bfin_gc_sweep_hook): Likewise. (bfinfdpic_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-cr16.c (elf32_cr16_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-cris.c (cris_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-hppa.c (elf32_hppa_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-lm32.c (lm32_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-m32r.c (m32r_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-m68k.c (elf_m68k_got_entry): Remove elf_m68k_gc_sweep_hook from comments. (elf_m68k_remove_got_entry_type): Removed. (elf_m68k_find_got_entry_ptr): Likewise. (elf_m68k_remove_got_entry): Likewise. (elf_m68k_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-mcore.c (mcore_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-metag.c (elf_metag_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-microblaze.c (elf_backend_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-mips.c (elf_backend_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-nds32.c (nds32_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-nios2.c (nios2_elf32_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-or1k.c (or1k_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-ppc.c (ppc_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-s390.c (elf_s390_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-sparc.c (elf_backend_gc_sweep_hook): Likewise. * elf32-tic6x.c (elf32_tic6x_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-tilegx.c (elf_backend_gc_sweep_hook): Likewise. * elf32-tilepro.c (tilepro_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-vax.c (elf_vax_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-xtensa.c (elf_xtensa_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-alpha.c (elf64_alpha_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-mips.c (elf_backend_gc_sweep_hook): Likewise. * elf64-mmix.c (mmix_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-ppc.c (elf_backend_gc_sweep_hook): Likewise. (ppc64_elf_gc_sweep_hook): Likewise. * elf64-s390.c (elf_s390_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-sparc.c (elf_backend_gc_sweep_hook): Likewise. * elf64-tilegx.c (elf_backend_gc_sweep_hook): Likewise. * elflink.c (elf_link_add_object_symbols): Don't call _bfd_elf_link_check_relocs here. (gc_sweep_hook_fn): Removed. (elf_gc_sweep): Remove gc_sweep_hook. * elfnn-aarch64.c (elfNN_aarch64_gc_sweep_hook): Removed. (elf_backend_gc_sweep_hook): Likewise. * elfnn-riscv.c (riscv_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elfxx-mips.c (_bfd_mips_elf_gc_sweep_hook): Likewise. * elfxx-mips.h (_bfd_mips_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_gc_sweep_hook): Likewise. * elfxx-sparc.h (_bfd_sparc_elf_gc_sweep_hook): Likewise. * elfxx-target.h (elf_backend_gc_sweep_hook): Likewise. (elfNN_bed): Remove elf_backend_gc_sweep_hook. * elfxx-tilegx.c (tilegx_elf_gc_sweep_hook): Removed. * elfxx-tilegx.h (tilegx_elf_gc_sweep_hook): Likewise. ld/ * emulparams/elf32_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Removed. * emulparams/elf_i386_be.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_i386_chaos.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_i386_ldso.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_i386_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_iamcu.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_k1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_l1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386lynx.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386moss.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386nw.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf32.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf_nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shlelf32_linux.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shlelf_linux.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shlelf_nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emultempl/aarch64elf.em (gld${EMULATION_NAME}_before_parse): Set link_info.check_relocs_after_open_input to TRUE. * emultempl/armelf.em (gld${EMULATION_NAME}_before_parse): Likewise. * emultempl/scoreelf.em (gld${EMULATION_NAME}_before_parse): Likewise. * emultempl/aix.em (ld_${EMULATION_NAME}_emulation): Add after_parse_default. * emultempl/armcoff.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/beos.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/generic.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/gld960.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/gld960c.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/lnk960.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/m68kcoff.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/msp430.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/pe.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/pep.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/sunos.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/ticoff.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/vanilla.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Always set link_info.check_relocs_after_open_input to TRUE. (ld_${EMULATION_NAME}_emulation): Add $LDEMUL_AFTER_CHECK_RELOCS. * emultempl/linux.em (gld${EMULATION_NAME}_before_parse): Set link_info.check_relocs_after_open_input to TRUE. (ld_${EMULATION_NAME}_emulation): Add after_check_relocs_default. * emultempl/mmix-elfnmmo.em (mmix_before_parse): New function. (LDEMUL_BEFORE_PARSE): New. * emultempl/mmixelf.em (elfmmix_before_parse): Replace gld${EMULATION_NAME}_before_parse with mmix_before_parse. * emultempl/ppc32elf.em (ppc_after_open): Renamed to ... (ppc_after_check_relocs): This. Call after_check_relocs_default instead of gld${EMULATION_NAME}_after_open. (LDEMUL_AFTER_OPEN): Removed. (LDEMUL_AFTER_CHECK_RELOCS): New. * ldemul.c (ldemul_after_check_relocs): New. (after_check_relocs_default): Likewise. * ldemul.h (ldemul_after_check_relocs): Likewise. (after_check_relocs_default): Likewise. (ld_emulation_xfer_struct): Add after_check_relocs. * ldlang.c (lang_process): Call ldemul_after_check_relocs after lang_check_relocs. * testsuite/ld-aarch64/gc-got-relocs.d: Don't expect GOT section. * testsuite/ld-aarch64/gc-tls-relocs.d: Likewise. * testsuite/ld-cris/tls-gc-68.d: Likewise. * testsuite/ld-cris/tls-gc-69.d: Likewise. * testsuite/ld-cris/tls-gc-70.d: Likewise. * testsuite/ld-cris/tls-gc-75.d: Likewise. * testsuite/ld-cris/tls-gc-79.d: Likewise. * testsuite/ld-mmix/bpo-10.d: Don't expect .MMIX.reg_contents section.
2017-10-16 18:49:54 +08:00
ppc_after_check_relocs (void)
{
if (is_ppc_elf (link_info.output_bfd))
{
int new_plt;
int keep_new;
unsigned int num_plt;
unsigned int num_got;
lang_output_section_statement_type *os;
lang_output_section_statement_type *plt_os[2];
lang_output_section_statement_type *got_os[2];
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
new_plt = ppc_elf_select_plt_layout (link_info.output_bfd, &link_info);
if (new_plt < 0)
einfo (_("%X%P: select_plt_layout problem %E\n"));
num_got = 0;
num_plt = 0;
for (os = &lang_os_list.head->output_section_statement;
os != NULL;
os = os->next)
{
if (os->constraint == SPECIAL && strcmp (os->name, ".plt") == 0)
{
if (num_plt < 2)
plt_os[num_plt] = os;
++num_plt;
}
if (os->constraint == SPECIAL && strcmp (os->name, ".got") == 0)
{
if (num_got < 2)
got_os[num_got] = os;
++num_got;
}
}
keep_new = new_plt == 1 ? 0 : -1;
if (num_plt == 2)
{
plt_os[0]->constraint = keep_new;
plt_os[1]->constraint = ~keep_new;
}
if (num_got == 2)
{
if (old_got)
keep_new = -1;
got_os[0]->constraint = keep_new;
got_os[1]->constraint = ~keep_new;
}
}
ELF: Call check_relocs after opening all inputs For all ELF targers, call check_relocs after opening all inputs and garbage collection. Since the symbol resolution is known, check_relocs can be simplified. Also garbage collection doesn't need to undo what check_relocs has done for symbols which have been garbage collected. Since ELF targets never see the removed sections, gc_sweep_hook can be removed from elf_backend_data and we can avoid GOT/PLT with garbage collection now. Set link_info.check_relocs_after_open_input to TRUE for all linker targets which use ELF linker and update garbage collection tests to remove unused GOT section. ldemul_after_check_relocs is added for powerpc to support --secure-plt, --bss-plt and --sdata-got. Tested natively without regressions on i686, x86-64 and x32. Tested cross binutils on x86-64 without regressions for aarch64-linux, alpha-linux, arm-linux, bfin-elf, cr16-elf, cris-elf, crx-elf, frv-linux, hppa64-linux, hppa-linux, ia64-linux, lm32-elf, m32r-elf, m68k-linux, mcore-elf, metag-elf, microblaze-linux, mips-linux, mmix, mn10300-elf, nds32le-linux, nios2-linux, or1k-elf, powerpc64-linux, powerpc-linux, riscv32-linux, riscv64-linux, s390-linux, s390x-linux, score-elf, sh3-linux, sparc64-linux, sparc-linux, tic6x-elf, tilegx-linux, tilepro-linux, vax-linux, x86_64-mingw32 and xtensa-linux. bfd/ * elf-bfd.h (elf_backend_data): Remove gc_sweep_hook. * elf32-arm.c (elf32_arm_gc_sweep_hook): Removed. (elf_backend_gc_sweep_hook): Likewise. * elf32-bfin.c (bfin_gc_sweep_hook): Likewise. (bfinfdpic_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-cr16.c (elf32_cr16_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-cris.c (cris_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-hppa.c (elf32_hppa_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-lm32.c (lm32_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-m32r.c (m32r_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-m68k.c (elf_m68k_got_entry): Remove elf_m68k_gc_sweep_hook from comments. (elf_m68k_remove_got_entry_type): Removed. (elf_m68k_find_got_entry_ptr): Likewise. (elf_m68k_remove_got_entry): Likewise. (elf_m68k_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-mcore.c (mcore_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-metag.c (elf_metag_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-microblaze.c (elf_backend_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-mips.c (elf_backend_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-nds32.c (nds32_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-nios2.c (nios2_elf32_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-or1k.c (or1k_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-ppc.c (ppc_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-s390.c (elf_s390_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-sparc.c (elf_backend_gc_sweep_hook): Likewise. * elf32-tic6x.c (elf32_tic6x_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-tilegx.c (elf_backend_gc_sweep_hook): Likewise. * elf32-tilepro.c (tilepro_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-vax.c (elf_vax_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-xtensa.c (elf_xtensa_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-alpha.c (elf64_alpha_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-mips.c (elf_backend_gc_sweep_hook): Likewise. * elf64-mmix.c (mmix_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-ppc.c (elf_backend_gc_sweep_hook): Likewise. (ppc64_elf_gc_sweep_hook): Likewise. * elf64-s390.c (elf_s390_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-sparc.c (elf_backend_gc_sweep_hook): Likewise. * elf64-tilegx.c (elf_backend_gc_sweep_hook): Likewise. * elflink.c (elf_link_add_object_symbols): Don't call _bfd_elf_link_check_relocs here. (gc_sweep_hook_fn): Removed. (elf_gc_sweep): Remove gc_sweep_hook. * elfnn-aarch64.c (elfNN_aarch64_gc_sweep_hook): Removed. (elf_backend_gc_sweep_hook): Likewise. * elfnn-riscv.c (riscv_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elfxx-mips.c (_bfd_mips_elf_gc_sweep_hook): Likewise. * elfxx-mips.h (_bfd_mips_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_gc_sweep_hook): Likewise. * elfxx-sparc.h (_bfd_sparc_elf_gc_sweep_hook): Likewise. * elfxx-target.h (elf_backend_gc_sweep_hook): Likewise. (elfNN_bed): Remove elf_backend_gc_sweep_hook. * elfxx-tilegx.c (tilegx_elf_gc_sweep_hook): Removed. * elfxx-tilegx.h (tilegx_elf_gc_sweep_hook): Likewise. ld/ * emulparams/elf32_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Removed. * emulparams/elf_i386_be.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_i386_chaos.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_i386_ldso.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_i386_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_iamcu.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_k1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_l1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386lynx.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386moss.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386nw.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf32.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf_nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shlelf32_linux.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shlelf_linux.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shlelf_nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emultempl/aarch64elf.em (gld${EMULATION_NAME}_before_parse): Set link_info.check_relocs_after_open_input to TRUE. * emultempl/armelf.em (gld${EMULATION_NAME}_before_parse): Likewise. * emultempl/scoreelf.em (gld${EMULATION_NAME}_before_parse): Likewise. * emultempl/aix.em (ld_${EMULATION_NAME}_emulation): Add after_parse_default. * emultempl/armcoff.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/beos.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/generic.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/gld960.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/gld960c.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/lnk960.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/m68kcoff.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/msp430.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/pe.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/pep.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/sunos.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/ticoff.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/vanilla.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Always set link_info.check_relocs_after_open_input to TRUE. (ld_${EMULATION_NAME}_emulation): Add $LDEMUL_AFTER_CHECK_RELOCS. * emultempl/linux.em (gld${EMULATION_NAME}_before_parse): Set link_info.check_relocs_after_open_input to TRUE. (ld_${EMULATION_NAME}_emulation): Add after_check_relocs_default. * emultempl/mmix-elfnmmo.em (mmix_before_parse): New function. (LDEMUL_BEFORE_PARSE): New. * emultempl/mmixelf.em (elfmmix_before_parse): Replace gld${EMULATION_NAME}_before_parse with mmix_before_parse. * emultempl/ppc32elf.em (ppc_after_open): Renamed to ... (ppc_after_check_relocs): This. Call after_check_relocs_default instead of gld${EMULATION_NAME}_after_open. (LDEMUL_AFTER_OPEN): Removed. (LDEMUL_AFTER_CHECK_RELOCS): New. * ldemul.c (ldemul_after_check_relocs): New. (after_check_relocs_default): Likewise. * ldemul.h (ldemul_after_check_relocs): Likewise. (after_check_relocs_default): Likewise. (ld_emulation_xfer_struct): Add after_check_relocs. * ldlang.c (lang_process): Call ldemul_after_check_relocs after lang_check_relocs. * testsuite/ld-aarch64/gc-got-relocs.d: Don't expect GOT section. * testsuite/ld-aarch64/gc-tls-relocs.d: Likewise. * testsuite/ld-cris/tls-gc-68.d: Likewise. * testsuite/ld-cris/tls-gc-69.d: Likewise. * testsuite/ld-cris/tls-gc-70.d: Likewise. * testsuite/ld-cris/tls-gc-75.d: Likewise. * testsuite/ld-cris/tls-gc-79.d: Likewise. * testsuite/ld-mmix/bpo-10.d: Don't expect .MMIX.reg_contents section.
2017-10-16 18:49:54 +08:00
after_check_relocs_default ();
}
EOF
fi
fragment <<EOF
Inline PLT call optimization This patch adds the analysis part of PLT call optimization, enabling the code added with the previous patch that actually performs the optimization. Gold support is not available yet. bfd/ * elf64-ppc.c (struct _ppc64_elf_section_data): Add has_pltcall field. (struct ppc_link_hash_table): Add can_convert_all_inline_plt. (ppc64_elf_check_relocs): Set has_pltcall. (ppc64_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc64_elf_inline_plt): New function. (ppc64_elf_size_dynamic_sections): Discard some PLT entries for locals. * elf64-ppc.h (ppc64_elf_inline_plt): Declare. * elf32-ppc.c (has_pltcall): Define. (struct ppc_elf_link_hash_table): Add can_convert_all_inline_plt. (ppc_elf_check_relocs): Set has_pltcall. (ppc_elf_inline_plt): New function. (ppc_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc_elf_size_dynamic_sections): Likewise. * elf32-ppc.h (ppc_elf_inline_plt): Declare. ld/ * emultempl/ppc64elf.em (no_inline_plt): New var. (ppc_before_allocation): Call ppc64_elf_inline_plt. (enum ppc64_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize. * emultemps/ppc32elf.em (no_inline_opt): New var. (prelim_size_sections): New function, extracted from.. (ppc_before_allocation): ..here. Call ppc_elf_inline_plt. (enum ppc32_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize.
2018-04-09 08:02:39 +08:00
static void
prelim_size_sections (void)
{
if (expld.phase != lang_mark_phase_enum)
{
expld.phase = lang_mark_phase_enum;
expld.dataseg.phase = exp_seg_none;
one_lang_size_sections_pass (NULL, FALSE);
/* We must not cache anything from the preliminary sizing. */
lang_reset_memory_regions ();
}
}
static void
ppc_before_allocation (void)
{
if (is_ppc_elf (link_info.output_bfd))
{
Inline PLT call optimization This patch adds the analysis part of PLT call optimization, enabling the code added with the previous patch that actually performs the optimization. Gold support is not available yet. bfd/ * elf64-ppc.c (struct _ppc64_elf_section_data): Add has_pltcall field. (struct ppc_link_hash_table): Add can_convert_all_inline_plt. (ppc64_elf_check_relocs): Set has_pltcall. (ppc64_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc64_elf_inline_plt): New function. (ppc64_elf_size_dynamic_sections): Discard some PLT entries for locals. * elf64-ppc.h (ppc64_elf_inline_plt): Declare. * elf32-ppc.c (has_pltcall): Define. (struct ppc_elf_link_hash_table): Add can_convert_all_inline_plt. (ppc_elf_check_relocs): Set has_pltcall. (ppc_elf_inline_plt): New function. (ppc_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc_elf_size_dynamic_sections): Likewise. * elf32-ppc.h (ppc_elf_inline_plt): Declare. ld/ * emultempl/ppc64elf.em (no_inline_plt): New var. (ppc_before_allocation): Call ppc64_elf_inline_plt. (enum ppc64_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize. * emultemps/ppc32elf.em (no_inline_opt): New var. (prelim_size_sections): New function, extracted from.. (ppc_before_allocation): ..here. Call ppc_elf_inline_plt. (enum ppc32_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize.
2018-04-09 08:02:39 +08:00
if (!no_inline_opt
&& !bfd_link_relocatable (&link_info))
{
prelim_size_sections ();
if (!ppc_elf_inline_plt (&link_info))
einfo (_("%X%P: inline PLT: %E\n"));
}
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
if (ppc_elf_tls_setup (link_info.output_bfd, &link_info)
include/elf/ * ppc.h (DT_PPC_TLSOPT): Define. * ppc64.h (DT_PPC64_TLSOPT): Define. bfd/ * elf32-ppc.c (TLS_GET_ADDR_GLINK_SIZE): Define. (ADD_3_12_2, BEQLR, CMPWI_11_0, LWZ_11_3, LWZ_12_3): Define. (MR_0_3, MR_3_0): Define. (struct ppc_elf_link_hash_table): Add no_tls_get_addr_opt. (ppc_elf_select_plt_layout): Save emit_stub_syms param earlier. (ppc_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt (allocate_dynrelocs): Increase glink entry size for __tls_get_addr. (ppc_elf_size_dynamic_sections): Add DT_PPC_TLS_OPT tag. (write_glink_stub): Add param p. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Emit special glink call stub for __tls_get_addr. * elf32-ppc.h (ppc_elf_tls_setup): Update prototype. * elf64-ppc.c (struct ppc_link_hash_table): Add no_tls_get_addr_opt. (ppc64_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt. (ppc64_elf_size_dynamic_sections): Add DT_PPC64_TLS_OPT tag. (LD_R11_0R3, LD_R12_0R3, MR_R0_R3, CMPDI_R11_0, ADD_R3_R12_R13, BEQLR, MR_R3_R0, MFLR_R11, STD_R11_0R1, BCTRL, LD_R11_0R1, LD_R2_0R1, MTLR_R11): Define. (build_tls_get_addr_stub): New function. (ppc_build_one_stub): Call it. (ppc_size_one_stub): Add extra size for __tls_get_addr stub. (ppc64_elf_relocate_section): Don't change nop to ld 2,40(1) for __tls_get_addr plt call. * elf64-ppc.h (ppc64_elf_tls_setup): Update prototype. binutils/ * readelf.c (get_ppc_dynamic_type): Add TLSOPT. (get_ppc64_dynamic_type): Likewise. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. Redefine other options in terms of previous option. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. * emultempl/ppc64elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc64_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. ld/testsuite/ * ld-powerpc/tlslib.s: Delete dot-symbol entry syms. Add __tls_get_addr_opt. * ld-powerpc/tlslib32.s: Add __tls_get_addr_opt. * ld-powerpc/oldtlslib.s: New file, old-abi version of tlslib.s. * ld-powerpc/powerpc.exp: Build old-abi library and use it in two new link tests. * ld-powerpc/tlsexe.d: Update for new __tls_get_addr stub. * ld-powerpc/tlsexe.g, * ld-powerpc/tlsexe.r, *ld-powerpc/tlsexe32.d, * ld-powerpc/tlsexe32.g, * ld-powerpc/tlsexe32.r, * ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g, * ld-powerpc/tlsexetoc.r: Likewise.
2009-09-21 19:51:02 +08:00
&& !notlsopt)
{
include/ * bfdlink.h (struct bfd_link_hash_table): Delete creator field. (struct bfd_link_info): Add output_bfd. bfd/ * elflink.c: Replace all accesses to hash->creator field with output_bfd->xvec. * cofflink.c: Likewise. * coff-h8300.c: Likewise. * ecoff.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-ppc.c: Likewise. * elf64-alpha.c: Likewise. * elf64-ppc.c: Likewise. * elf64-sparc.c: Likewise. * elfxx-mips.c: Likewise. * i386linux.c: Likewise. * m68klinux.c: Likewise. * sparclinux.c: Likewise. * sunos.c: Likewise. * xcofflink.c: Likewise. * linker.c: Likewise. (_bfd_link_hash_table_init): Don't store creator. ld/ * ldmain.h (output_bfd): Delete. * ldmain.c (output_bfd): Delete. Replace all occurrences of output_bfd with link_info.output_bfd. * ldcref.c: Likewise. * ldctor.c: Likewise. * ldemul.c: Likewise. * ldexp.c: Likewise. * ldfile.c: Likewise. * ldlang.c: Likewise. * ldmisc.c: Likewise. * ldwrite.c: Likewise. * pe-dll.c: Likewise. * emultempl/aix.em: Likewise. * emultempl/alphaelf.em: Likewise. * emultempl/armcoff.em: Likewise. * emultempl/armelf.em: Likewise. * emultempl/avrelf.em: Likewise. * emultempl/beos.em: Likewise. * emultempl/elf-generic.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/gld960.em: Likewise. * emultempl/hppaelf.em: Likewise. * emultempl/irix.em: Likewise. * emultempl/linux.em: Likewise. * emultempl/lnk960.em: Likewise. * emultempl/m68hc1xelf.em: Likewise. * emultempl/mmix-elfnmmo.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise. * emultempl/scoreelf.em: Likewise. * emultempl/sh64elf.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/vanilla.em: Likewise. * emultempl/vxworks.em: Likewise. * emultempl/xtensaelf.em: Likewise. * emultempl/z80.em: Likewise. * ldlang.c (open_output): Don't return output, instead write link_info_output_bfd directly. * emultempl/alphaelf.em: Replace occurrences of link_info.hash->creator with link_info.output_bfd->xvec. * emultempl/hppaelf.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise. * emultempl/spuelf.em: Likewise.
2008-02-15 11:35:53 +08:00
if (!ppc_elf_tls_optimize (link_info.output_bfd, &link_info))
{
einfo (_("%X%P: TLS problem %E\n"));
return;
}
}
}
gld${EMULATION_NAME}_before_allocation ();
Rewrite ppc32 backend .sdata and .sdata2 handling 1) _SDA_BASE_ and _SDA2_BASE_ and defined automatically, in a similar manner to the way _GLOBAL_OFFSET_TABLE_ is handled. It's a little more complicated to remove the symbols because _SDA_BASE_ needs to be there if either .sdata or .sbss is present, and similarly for _SDA2_BASE. 2) The linker created .sdata and .sdata2 sections used for R_PPC_EMB_SDAI16 and R_PPC_EMB_SDA2I16 pointers are created early. Nowadays we strip unneeded sections from the output, so it isn't necessary to delay creating the sections. 3) The output section for targets of various SDA relocs is now checked as per the ABI(s). We previously allowed .sdata.foo and similar, most likely because at some stage we were checking input sections. Also, the patch fixes a long-standing bug in size_input_sections that affects the values of symbols defined in stripped input sections. PR 16952 bfd/ * elf32-ppc.c (ppc_elf_create_linker_section): Move earlier. Remove redundant setting of htab->elf.dynobj. Don't align. Define .sdata symbols using _bfd_elf_define_linkage_sym. (ppc_elf_create_glink): Call ppc_elf_create_linker_section. (create_sdata_sym): Delete. (elf_allocate_pointer_linker_section): Rename from elf_create_pointer_linker_section. Align section. (ppc_elf_check_relocs): Don't call ppc_elf_creat_linker_section directly here, or create_sdata_sym. Set ref_regular on _SDA_BASE_ and _SDA2_BASE_. (ppc_elf_size_dynamic_sections): Remove ATTRIBUTE_UNUSED on param. Remove unnecessary tests on _SDA_BASE_ sym. (maybe_strip_sdasym, ppc_elf_maybe_strip_sdata_syms): New functions. (ppc_elf_relocate_section): Tighten SDA reloc symbol section checks. * elf32-ppc.h (ppc_elf_set_sdata_syms): Delete. (ppc_elf_maybe_strip_sdata_syms): Declare. ld/ * emulparams/elf32ppccommon.sh (_SDA_BASE_, _SDA2_BASE_): Delete. * emultempl/ppc32elf.em (ppc_before_allocation): Call ppc_elf_maybe_strip_sdata_syms. * ldlang.c (size_input_section): Correct output_offset value for excluded input sections.
2014-05-20 10:12:42 +08:00
ppc_elf_maybe_strip_sdata_syms (&link_info);
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
if (RELAXATION_ENABLED)
params.branch_trampolines = 1;
/* Turn on relaxation if executable sections have addresses that
might make branches overflow. */
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
else if (!RELAXATION_DISABLED_BY_USER)
{
bfd_vma low = (bfd_vma) -1;
bfd_vma high = 0;
asection *o;
/* Run lang_size_sections (if not already done). */
Inline PLT call optimization This patch adds the analysis part of PLT call optimization, enabling the code added with the previous patch that actually performs the optimization. Gold support is not available yet. bfd/ * elf64-ppc.c (struct _ppc64_elf_section_data): Add has_pltcall field. (struct ppc_link_hash_table): Add can_convert_all_inline_plt. (ppc64_elf_check_relocs): Set has_pltcall. (ppc64_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc64_elf_inline_plt): New function. (ppc64_elf_size_dynamic_sections): Discard some PLT entries for locals. * elf64-ppc.h (ppc64_elf_inline_plt): Declare. * elf32-ppc.c (has_pltcall): Define. (struct ppc_elf_link_hash_table): Add can_convert_all_inline_plt. (ppc_elf_check_relocs): Set has_pltcall. (ppc_elf_inline_plt): New function. (ppc_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc_elf_size_dynamic_sections): Likewise. * elf32-ppc.h (ppc_elf_inline_plt): Declare. ld/ * emultempl/ppc64elf.em (no_inline_plt): New var. (ppc_before_allocation): Call ppc64_elf_inline_plt. (enum ppc64_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize. * emultemps/ppc32elf.em (no_inline_opt): New var. (prelim_size_sections): New function, extracted from.. (ppc_before_allocation): ..here. Call ppc_elf_inline_plt. (enum ppc32_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize.
2018-04-09 08:02:39 +08:00
prelim_size_sections ();
for (o = link_info.output_bfd->sections; o != NULL; o = o->next)
{
if ((o->flags & (SEC_ALLOC | SEC_CODE)) != (SEC_ALLOC | SEC_CODE))
continue;
if (o->rawsize == 0)
continue;
if (low > o->vma)
low = o->vma;
if (high < o->vma + o->rawsize - 1)
high = o->vma + o->rawsize - 1;
}
if (high > low && high - low > (1 << 25) - 1)
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
params.branch_trampolines = 1;
}
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
if (params.branch_trampolines
|| params.ppc476_workaround
|| params.pic_fixup > 0)
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
ENABLE_RELAXATION;
}
/* Replaces default zero fill padding in executable sections with
"ba 0" instructions. This works around the ppc476 icache bug if we
have a function pointer tail call near the end of a page, some
small amount of padding, then the function called at the beginning
of the next page. If the "ba 0" is ever executed we should hit a
segv, so it's almost as good as an illegal instruction (zero). */
static void
no_zero_padding (lang_statement_union_type *l)
{
if (l->header.type == lang_padding_statement_enum
&& l->padding_statement.size != 0
&& l->padding_statement.output_section != NULL
&& (l->padding_statement.output_section->flags & SEC_CODE) != 0
&& l->padding_statement.fill->size == 0)
{
struct _ppc_fill_type
{
size_t size;
unsigned char data[4];
};
static struct _ppc_fill_type fill_be = { 4, {0x48, 0, 0, 2} };
static struct _ppc_fill_type fill_le = { 4, {2, 0, 0, 0x48} };
if (bfd_big_endian (link_info.output_bfd))
l->padding_statement.fill = (struct _fill_type *) &fill_be;
else
l->padding_statement.fill = (struct _fill_type *) &fill_le;
}
}
static void
ppc_finish (void)
{
if (params.ppc476_workaround)
lang_for_each_statement (no_zero_padding);
if (!ppc_finish_symbols (&link_info))
einfo (_("%X%P: ppc_finish_symbols problem %E\n"));
finish_default ();
}
EOF
if grep -q 'ld_elf32_spu_emulation' ldemul-list.h; then
2007-07-19 Roland McGrath <roland@redhat.com> * genscripts.sh (source_em, fragment): New sh functions. Truncate e${EMULATION_NAME}.c file before .em script fills it. Use source_em in place of . for the .em script. * emultempl/generic.em: Use fragment and source_em functions. * emultempl/aix.em: Likewise. * emultempl/alphaelf.em: Likewise. * emultempl/armcoff.em: Likewise. * emultempl/armelf.em: Likewise. * emultempl/avrelf.em: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/crxelf.em: Likewise. * emultempl/elf-generic.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/genelf.em: Likewise. * emultempl/gld960.em: Likewise. * emultempl/gld960c.em: Likewise. * emultempl/hppaelf.em: Likewise. * emultempl/ia64elf.em: Likewise. * emultempl/irix.em: Likewise. * emultempl/linux.em: Likewise. * emultempl/lnk960.em: Likewise. * emultempl/m68hc1xelf.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mipsecoff.em: Likewise. * emultempl/mipself.em: Likewise. * emultempl/mmix-elfnmmo.em: Likewise. * emultempl/mmixelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/needrelax.em: Likewise. * emultempl/netbsd.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/ppc32elf.em: Likewise. * emultempl/ppc64elf.em: Likewise. * emultempl/scoreelf.em: Likewise. * emultempl/sh64elf.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/ticoff.em: Likewise. * emultempl/vanilla.em: Likewise. * emultempl/vxworks.em: Likewise. * emultempl/xtensaelf.em: Likewise. * emultempl/z80.em: Likewise.
2007-07-20 03:56:10 +08:00
fragment <<EOF
/* Special handling for embedded SPU executables. */
extern bfd_boolean embedded_spu_file (lang_input_statement_type *, const char *);
static bfd_boolean gld${EMULATION_NAME}_load_symbols (lang_input_statement_type *);
static bfd_boolean
ppc_recognized_file (lang_input_statement_type *entry)
{
if (embedded_spu_file (entry, "-m32"))
return TRUE;
return gld${EMULATION_NAME}_load_symbols (entry);
}
EOF
LDEMUL_RECOGNIZED_FILE=ppc_recognized_file
fi
# Define some shell vars to insert bits of code into the standard elf
# parse_args and list_options functions.
#
PARSE_AND_LIST_PROLOGUE=${PARSE_AND_LIST_PROLOGUE}'
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
enum ppc32_opt
{
OPTION_NO_TLS_OPT = 321,
OPTION_NO_TLS_GET_ADDR_OPT,
OPTION_NEW_PLT,
OPTION_OLD_PLT,
OPTION_PLT_ALIGN,
OPTION_NO_PLT_ALIGN,
Inline PLT call optimization This patch adds the analysis part of PLT call optimization, enabling the code added with the previous patch that actually performs the optimization. Gold support is not available yet. bfd/ * elf64-ppc.c (struct _ppc64_elf_section_data): Add has_pltcall field. (struct ppc_link_hash_table): Add can_convert_all_inline_plt. (ppc64_elf_check_relocs): Set has_pltcall. (ppc64_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc64_elf_inline_plt): New function. (ppc64_elf_size_dynamic_sections): Discard some PLT entries for locals. * elf64-ppc.h (ppc64_elf_inline_plt): Declare. * elf32-ppc.c (has_pltcall): Define. (struct ppc_elf_link_hash_table): Add can_convert_all_inline_plt. (ppc_elf_check_relocs): Set has_pltcall. (ppc_elf_inline_plt): New function. (ppc_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc_elf_size_dynamic_sections): Likewise. * elf32-ppc.h (ppc_elf_inline_plt): Declare. ld/ * emultempl/ppc64elf.em (no_inline_plt): New var. (ppc_before_allocation): Call ppc64_elf_inline_plt. (enum ppc64_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize. * emultemps/ppc32elf.em (no_inline_opt): New var. (prelim_size_sections): New function, extracted from.. (ppc_before_allocation): ..here. Call ppc_elf_inline_plt. (enum ppc32_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize.
2018-04-09 08:02:39 +08:00
OPTION_NO_INLINE_OPT,
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
OPTION_OLD_GOT,
OPTION_STUBSYMS,
OPTION_NO_STUBSYMS,
OPTION_PPC476_WORKAROUND,
OPTION_NO_PPC476_WORKAROUND,
OPTION_NO_PICFIXUP,
OPTION_VLE_RELOC_FIXUP
};
'
PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}'
{ "emit-stub-syms", no_argument, NULL, OPTION_STUBSYMS },
{ "no-emit-stub-syms", no_argument, NULL, OPTION_NO_STUBSYMS },
{ "no-tls-optimize", no_argument, NULL, OPTION_NO_TLS_OPT },
{ "no-tls-get-addr-optimize", no_argument, NULL, OPTION_NO_TLS_GET_ADDR_OPT },'
if test -z "$VXWORKS_BASE_EM_FILE" ; then
PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}'
{ "secure-plt", no_argument, NULL, OPTION_NEW_PLT },
{ "bss-plt", no_argument, NULL, OPTION_OLD_PLT },
{ "plt-align", optional_argument, NULL, OPTION_PLT_ALIGN },
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
{ "no-plt-align", no_argument, NULL, OPTION_NO_PLT_ALIGN },
Inline PLT call optimization This patch adds the analysis part of PLT call optimization, enabling the code added with the previous patch that actually performs the optimization. Gold support is not available yet. bfd/ * elf64-ppc.c (struct _ppc64_elf_section_data): Add has_pltcall field. (struct ppc_link_hash_table): Add can_convert_all_inline_plt. (ppc64_elf_check_relocs): Set has_pltcall. (ppc64_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc64_elf_inline_plt): New function. (ppc64_elf_size_dynamic_sections): Discard some PLT entries for locals. * elf64-ppc.h (ppc64_elf_inline_plt): Declare. * elf32-ppc.c (has_pltcall): Define. (struct ppc_elf_link_hash_table): Add can_convert_all_inline_plt. (ppc_elf_check_relocs): Set has_pltcall. (ppc_elf_inline_plt): New function. (ppc_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc_elf_size_dynamic_sections): Likewise. * elf32-ppc.h (ppc_elf_inline_plt): Declare. ld/ * emultempl/ppc64elf.em (no_inline_plt): New var. (ppc_before_allocation): Call ppc64_elf_inline_plt. (enum ppc64_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize. * emultemps/ppc32elf.em (no_inline_opt): New var. (prelim_size_sections): New function, extracted from.. (ppc_before_allocation): ..here. Call ppc_elf_inline_plt. (enum ppc32_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize.
2018-04-09 08:02:39 +08:00
{ "no-inline-optimize", no_argument, NULL, OPTION_NO_INLINE_OPT },
{ "sdata-got", no_argument, NULL, OPTION_OLD_GOT },'
fi
PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}'
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
{ "ppc476-workaround", optional_argument, NULL, OPTION_PPC476_WORKAROUND },
{ "no-ppc476-workaround", no_argument, NULL, OPTION_NO_PPC476_WORKAROUND },
{ "no-pic-fixup", no_argument, NULL, OPTION_NO_PICFIXUP },
{ "vle-reloc-fixup", no_argument, NULL, OPTION_VLE_RELOC_FIXUP },
'
PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}'
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--emit-stub-syms Label linker stubs with a symbol\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--no-emit-stub-syms Don'\''t label linker stubs with a symbol\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--no-tls-optimize Don'\''t try to optimize TLS accesses\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--no-tls-get-addr-optimize Don'\''t use a special __tls_get_addr call\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));'
if test -z "$VXWORKS_BASE_EM_FILE" ; then
PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}'\
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--secure-plt Use new-style PLT if possible\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--bss-plt Force old-style BSS PLT\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--plt-align Align PLT call stubs to fit cache lines\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--no-plt-align Dont'\''t align individual PLT call stubs\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));
fprintf (file, _("\
Inline PLT call optimization This patch adds the analysis part of PLT call optimization, enabling the code added with the previous patch that actually performs the optimization. Gold support is not available yet. bfd/ * elf64-ppc.c (struct _ppc64_elf_section_data): Add has_pltcall field. (struct ppc_link_hash_table): Add can_convert_all_inline_plt. (ppc64_elf_check_relocs): Set has_pltcall. (ppc64_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc64_elf_inline_plt): New function. (ppc64_elf_size_dynamic_sections): Discard some PLT entries for locals. * elf64-ppc.h (ppc64_elf_inline_plt): Declare. * elf32-ppc.c (has_pltcall): Define. (struct ppc_elf_link_hash_table): Add can_convert_all_inline_plt. (ppc_elf_check_relocs): Set has_pltcall. (ppc_elf_inline_plt): New function. (ppc_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc_elf_size_dynamic_sections): Likewise. * elf32-ppc.h (ppc_elf_inline_plt): Declare. ld/ * emultempl/ppc64elf.em (no_inline_plt): New var. (ppc_before_allocation): Call ppc64_elf_inline_plt. (enum ppc64_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize. * emultemps/ppc32elf.em (no_inline_opt): New var. (prelim_size_sections): New function, extracted from.. (ppc_before_allocation): ..here. Call ppc_elf_inline_plt. (enum ppc32_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize.
2018-04-09 08:02:39 +08:00
--no-inline-optimize Don'\''t convert inline PLT to direct calls\n"
));
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--sdata-got Force GOT location just before .sdata\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));'
fi
PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}'\
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
fprintf (file, _("\
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
--ppc476-workaround [=pagesize]\n\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
Avoid a cache bug on ppc476\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--no-ppc476-workaround Disable workaround\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--no-pic-fixup Don'\''t edit non-pic to pic\n"
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
));
fprintf (file, _("\
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
--vle-reloc-fixup Correct old object file 16A/16D relocation\n"
));
'
PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}'
case OPTION_STUBSYMS:
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
params.emit_stub_syms = 1;
break;
case OPTION_NO_STUBSYMS:
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
params.emit_stub_syms = 0;
break;
case OPTION_NO_TLS_OPT:
notlsopt = 1;
break;
include/elf/ * ppc.h (DT_PPC_TLSOPT): Define. * ppc64.h (DT_PPC64_TLSOPT): Define. bfd/ * elf32-ppc.c (TLS_GET_ADDR_GLINK_SIZE): Define. (ADD_3_12_2, BEQLR, CMPWI_11_0, LWZ_11_3, LWZ_12_3): Define. (MR_0_3, MR_3_0): Define. (struct ppc_elf_link_hash_table): Add no_tls_get_addr_opt. (ppc_elf_select_plt_layout): Save emit_stub_syms param earlier. (ppc_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt (allocate_dynrelocs): Increase glink entry size for __tls_get_addr. (ppc_elf_size_dynamic_sections): Add DT_PPC_TLS_OPT tag. (write_glink_stub): Add param p. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Emit special glink call stub for __tls_get_addr. * elf32-ppc.h (ppc_elf_tls_setup): Update prototype. * elf64-ppc.c (struct ppc_link_hash_table): Add no_tls_get_addr_opt. (ppc64_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt. (ppc64_elf_size_dynamic_sections): Add DT_PPC64_TLS_OPT tag. (LD_R11_0R3, LD_R12_0R3, MR_R0_R3, CMPDI_R11_0, ADD_R3_R12_R13, BEQLR, MR_R3_R0, MFLR_R11, STD_R11_0R1, BCTRL, LD_R11_0R1, LD_R2_0R1, MTLR_R11): Define. (build_tls_get_addr_stub): New function. (ppc_build_one_stub): Call it. (ppc_size_one_stub): Add extra size for __tls_get_addr stub. (ppc64_elf_relocate_section): Don't change nop to ld 2,40(1) for __tls_get_addr plt call. * elf64-ppc.h (ppc64_elf_tls_setup): Update prototype. binutils/ * readelf.c (get_ppc_dynamic_type): Add TLSOPT. (get_ppc64_dynamic_type): Likewise. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. Redefine other options in terms of previous option. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. * emultempl/ppc64elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc64_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. ld/testsuite/ * ld-powerpc/tlslib.s: Delete dot-symbol entry syms. Add __tls_get_addr_opt. * ld-powerpc/tlslib32.s: Add __tls_get_addr_opt. * ld-powerpc/oldtlslib.s: New file, old-abi version of tlslib.s. * ld-powerpc/powerpc.exp: Build old-abi library and use it in two new link tests. * ld-powerpc/tlsexe.d: Update for new __tls_get_addr stub. * ld-powerpc/tlsexe.g, * ld-powerpc/tlsexe.r, *ld-powerpc/tlsexe32.d, * ld-powerpc/tlsexe32.g, * ld-powerpc/tlsexe32.r, * ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g, * ld-powerpc/tlsexetoc.r: Likewise.
2009-09-21 19:51:02 +08:00
case OPTION_NO_TLS_GET_ADDR_OPT:
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
params.no_tls_get_addr_opt = 1;
include/elf/ * ppc.h (DT_PPC_TLSOPT): Define. * ppc64.h (DT_PPC64_TLSOPT): Define. bfd/ * elf32-ppc.c (TLS_GET_ADDR_GLINK_SIZE): Define. (ADD_3_12_2, BEQLR, CMPWI_11_0, LWZ_11_3, LWZ_12_3): Define. (MR_0_3, MR_3_0): Define. (struct ppc_elf_link_hash_table): Add no_tls_get_addr_opt. (ppc_elf_select_plt_layout): Save emit_stub_syms param earlier. (ppc_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt (allocate_dynrelocs): Increase glink entry size for __tls_get_addr. (ppc_elf_size_dynamic_sections): Add DT_PPC_TLS_OPT tag. (write_glink_stub): Add param p. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Emit special glink call stub for __tls_get_addr. * elf32-ppc.h (ppc_elf_tls_setup): Update prototype. * elf64-ppc.c (struct ppc_link_hash_table): Add no_tls_get_addr_opt. (ppc64_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt. (ppc64_elf_size_dynamic_sections): Add DT_PPC64_TLS_OPT tag. (LD_R11_0R3, LD_R12_0R3, MR_R0_R3, CMPDI_R11_0, ADD_R3_R12_R13, BEQLR, MR_R3_R0, MFLR_R11, STD_R11_0R1, BCTRL, LD_R11_0R1, LD_R2_0R1, MTLR_R11): Define. (build_tls_get_addr_stub): New function. (ppc_build_one_stub): Call it. (ppc_size_one_stub): Add extra size for __tls_get_addr stub. (ppc64_elf_relocate_section): Don't change nop to ld 2,40(1) for __tls_get_addr plt call. * elf64-ppc.h (ppc64_elf_tls_setup): Update prototype. binutils/ * readelf.c (get_ppc_dynamic_type): Add TLSOPT. (get_ppc64_dynamic_type): Likewise. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. Redefine other options in terms of previous option. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. * emultempl/ppc64elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc64_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. ld/testsuite/ * ld-powerpc/tlslib.s: Delete dot-symbol entry syms. Add __tls_get_addr_opt. * ld-powerpc/tlslib32.s: Add __tls_get_addr_opt. * ld-powerpc/oldtlslib.s: New file, old-abi version of tlslib.s. * ld-powerpc/powerpc.exp: Build old-abi library and use it in two new link tests. * ld-powerpc/tlsexe.d: Update for new __tls_get_addr stub. * ld-powerpc/tlsexe.g, * ld-powerpc/tlsexe.r, *ld-powerpc/tlsexe32.d, * ld-powerpc/tlsexe32.g, * ld-powerpc/tlsexe32.r, * ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g, * ld-powerpc/tlsexetoc.r: Likewise.
2009-09-21 19:51:02 +08:00
break;
case OPTION_NEW_PLT:
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
params.plt_style = PLT_NEW;
break;
case OPTION_OLD_PLT:
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
params.plt_style = PLT_OLD;
break;
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
case OPTION_PLT_ALIGN:
if (optarg != NULL)
{
char *end;
unsigned long val = strtoul (optarg, &end, 0);
if (*end || val > 5)
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
einfo (_("%F%P: invalid --plt-align `%s'\''\n"), optarg);
params.plt_stub_align = val;
}
else
params.plt_stub_align = 5;
PowerPC PLT stub tidy This is in preparation for the next patch adding Spectre variant 2 mitigation for PowerPC and PowerPC64. Besides tidying code involved in stub output (to reduce the number of places where bctr is output), the patch adds some user visible features: 1) PowerPC64 ELFv2 global entry stubs now are aligned under the control of --plt-align, with a default alignment of 32 bytes. 2) PowerPC64 __glink_PLTresolve is no longer padded out with nops. 3) PowerPC32 PLT stubs are aligned under the control of --plt-align, with the default alignment being 16 bytes as before. 4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve is now smaller in many cases. It was sized incorrectly when the __tls_get_addr_opt stub was used, and unnecessarily included space for local ifuncs. bfd/ * elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle __tls_get_addr_opt, and alignment sizing. (TLS_GET_ADDR_GLINK_SIZE): Delete. (is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE. (ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6, or 8 insns. (ppc_elf_link_hash_table_create): Init new ppc_elf_params field. (allocate_dynrelocs): Use new GLINK_ENTRY_SIZE. (ppc_elf_size_dynamic_sections): Likewise. Size branch table by PLT reloc count. (write_glink_stub): Handle __tls_get_addr_opt stub. Pad out to size given by GLINK_ENTRY_SIZE. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Likewise. (ppc_elf_finish_dynamic_sections): Write PLTresolve without using insn array since so many need rewriting. * elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align. * elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without nops. Adjust all uses. (ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE in glink_vma calculation. (struct ppc_link_hash_table): Add global_entry section pointer. (create_linkage_sections): Create separate section for global entry stubs. (PPC_LO, PPC_HI, PPC_HA): Move earlier. (size_global_entry_stubs): Handle sizing for aligned stubs. (ppc64_elf_size_dynamic_sections): Handle global_entry alloc, and don't stash end of glink branch table in rawsize. (ppc_build_one_stub): Rewrite stub size calculations. (build_global_entry_stubs): Use new section. (ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops. Build lazy link stubs out to end of section. Build global entry stubs in new section. gold/ * options.h (plt_align): Support for PowerPC32 too. * powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit. (Stub_table::plt_call_size, branch_stub_size): Tidy. (Stub_table::plt_call_align): Implement using stub_align. (Output_data_glink::global_entry_align): New function. (Output_data_glink::global_entry_off): New function. (Output_data_glink::global_entry_address): Use global_entry_off. (Output_data_glink::pltresolve_size): New function, replacing pltresolve_size_ constant. Update all uses. (Output_data_glink::add_global_entry): Align offset. (Output_data_glink::set_final_data_size): Use global_entry_align. (Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops. Tidy stub output. Use global_entry_off. ld/ * emultempl/ppc32elf.em (params): Init new field. (enum ppc32_opt): New enum to define OPTION_* values. Add OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN. (PARSE_AND_LIST_LONGOPTS): Handle new options. (PARSE_AND_LIST_ARGS_CASES): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. Break up help output. * emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment correctly for negative --plt-stub-align. * testsuite/ld-powerpc/elfv2exe.d, * testsuite/ld-powerpc/elfv2so.d, * testsuite/ld-powerpc/relbrlt.d, * testsuite/ld-powerpc/relbrlt.s, * testsuite/ld-powerpc/tlsexe.d, * testsuite/ld-powerpc/tlsexe.r, * testsuite/ld-powerpc/tlsexe32.d, * testsuite/ld-powerpc/tlsexe32.g, * testsuite/ld-powerpc/tlsexe32.r, * testsuite/ld-powerpc/tlsexetoc.d, * testsuite/ld-powerpc/tlsexetoc.r, * testsuite/ld-powerpc/tlsopt5_32.d, * testsuite/ld-powerpc/tlsso.d, * testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
break;
case OPTION_NO_PLT_ALIGN:
params.plt_stub_align = 0;
break;
Inline PLT call optimization This patch adds the analysis part of PLT call optimization, enabling the code added with the previous patch that actually performs the optimization. Gold support is not available yet. bfd/ * elf64-ppc.c (struct _ppc64_elf_section_data): Add has_pltcall field. (struct ppc_link_hash_table): Add can_convert_all_inline_plt. (ppc64_elf_check_relocs): Set has_pltcall. (ppc64_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc64_elf_inline_plt): New function. (ppc64_elf_size_dynamic_sections): Discard some PLT entries for locals. * elf64-ppc.h (ppc64_elf_inline_plt): Declare. * elf32-ppc.c (has_pltcall): Define. (struct ppc_elf_link_hash_table): Add can_convert_all_inline_plt. (ppc_elf_check_relocs): Set has_pltcall. (ppc_elf_inline_plt): New function. (ppc_elf_adjust_dynamic_symbol): Discard some PLT entries. (ppc_elf_size_dynamic_sections): Likewise. * elf32-ppc.h (ppc_elf_inline_plt): Declare. ld/ * emultempl/ppc64elf.em (no_inline_plt): New var. (ppc_before_allocation): Call ppc64_elf_inline_plt. (enum ppc64_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize. * emultemps/ppc32elf.em (no_inline_opt): New var. (prelim_size_sections): New function, extracted from.. (ppc_before_allocation): ..here. Call ppc_elf_inline_plt. (enum ppc32_opt): Add OPTION_NO_INLINE_OPT. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle --no-inline-optimize.
2018-04-09 08:02:39 +08:00
case OPTION_NO_INLINE_OPT:
no_inline_opt = 1;
break;
case OPTION_OLD_GOT:
old_got = 1;
break;
case OPTION_TRADITIONAL_FORMAT:
notlsopt = 1;
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
params.no_tls_get_addr_opt = 1;
return FALSE;
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
case OPTION_PPC476_WORKAROUND:
params.ppc476_workaround = 1;
if (optarg != NULL)
{
char *end;
params.pagesize = strtoul (optarg, &end, 0);
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
if (*end
|| (params.pagesize < 4096 && params.pagesize != 0)
|| params.pagesize != (params.pagesize & -params.pagesize))
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
einfo (_("%F%P: invalid pagesize `%s'\''\n"), optarg);
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
}
break;
case OPTION_NO_PPC476_WORKAROUND:
params.ppc476_workaround = 0;
break;
case OPTION_NO_PICFIXUP:
params.pic_fixup = -1;
break;
case OPTION_VLE_RELOC_FIXUP:
params.vle_reloc_fixup = 1;
break;
'
# Put these extra ppc32elf routines in ld_${EMULATION_NAME}_emulation
#
ppc476 icache bug workaround This implements a work-around for an icache bug on 476 that can cause execution of stale instructions when control falls through from one page to the next. The idea is to prevent such fall-through by replacing the last instruction on a page with a branch to a patch area containing the instruction, then branch to the next page. The patch also fixes a number of bugs in the existing support for long branch trampolines. bfd/ * elf32-ppc.c (struct ppc_elf_link_hash_table): Add params. Delete emit_stub_syms, no_tls_get_addr_opt. Update all uses. (ppc_elf_link_params): New function. (ppc_elf_create_glink): Align .glink to 64 bytes for ppc476 workaround. (ppc_elf_select_plt_layout): Remove plt_style and emit_stub_syms parameters. Use htab->params instead. (ppc_elf_tls_setup): Remove no_tls_get_addr_opt parameter. (ppc_elf_size_dynamic_sections): Align __glink_PLTresolve to 64 bytes for ppc476 workaround. (struct ppc_elf_relax_info): New. (ppc_elf_relax_section): Exclude linker created sections and those too small to hold one instruction. Don't add another branch around trampolines on later relax passes. Don't generate trampolines for undefined symbols when !relocatable, nor for plugin symbols. Allocate space for ppc476 workaround patch area. Free fixups on error return path. (ppc_elf_relocate_section): Handle ppc476 workaround patching. * elf32-ppc.h (struct ppc_elf_params): New. (ppc_elf_select_plt_layout, ppc_elf_tls_setup): Update prototype. (ppc_elf_link_params): Declare. * section.c (SEC_INFO_TYPE_TARGET): Define. * bfd-in2.h: Regenerate. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt, emit_stub_syms) plt_style): Delete. Adjust all refs to instead use.. (params): ..this. New variable. (ppc_after_open_output): New function. Tweak params and pass to ppc_elf_link_params. (ppc_after_open): Adjust ppc_elf_select_plt_layout call. (ppc_before_allocation): Adjust ppc_elf_tls_setup call. Enable relaxation for ppc476 workaround. (PARSE_AND_LIST_*): Add --{no-,}ppc476-workaround support. (LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Define.
2014-01-30 05:56:02 +08:00
LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=ppc_after_open_output
if test -z "$VXWORKS_BASE_EM_FILE" ; then
ELF: Call check_relocs after opening all inputs For all ELF targers, call check_relocs after opening all inputs and garbage collection. Since the symbol resolution is known, check_relocs can be simplified. Also garbage collection doesn't need to undo what check_relocs has done for symbols which have been garbage collected. Since ELF targets never see the removed sections, gc_sweep_hook can be removed from elf_backend_data and we can avoid GOT/PLT with garbage collection now. Set link_info.check_relocs_after_open_input to TRUE for all linker targets which use ELF linker and update garbage collection tests to remove unused GOT section. ldemul_after_check_relocs is added for powerpc to support --secure-plt, --bss-plt and --sdata-got. Tested natively without regressions on i686, x86-64 and x32. Tested cross binutils on x86-64 without regressions for aarch64-linux, alpha-linux, arm-linux, bfin-elf, cr16-elf, cris-elf, crx-elf, frv-linux, hppa64-linux, hppa-linux, ia64-linux, lm32-elf, m32r-elf, m68k-linux, mcore-elf, metag-elf, microblaze-linux, mips-linux, mmix, mn10300-elf, nds32le-linux, nios2-linux, or1k-elf, powerpc64-linux, powerpc-linux, riscv32-linux, riscv64-linux, s390-linux, s390x-linux, score-elf, sh3-linux, sparc64-linux, sparc-linux, tic6x-elf, tilegx-linux, tilepro-linux, vax-linux, x86_64-mingw32 and xtensa-linux. bfd/ * elf-bfd.h (elf_backend_data): Remove gc_sweep_hook. * elf32-arm.c (elf32_arm_gc_sweep_hook): Removed. (elf_backend_gc_sweep_hook): Likewise. * elf32-bfin.c (bfin_gc_sweep_hook): Likewise. (bfinfdpic_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-cr16.c (elf32_cr16_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-cris.c (cris_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-hppa.c (elf32_hppa_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-lm32.c (lm32_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-m32r.c (m32r_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-m68k.c (elf_m68k_got_entry): Remove elf_m68k_gc_sweep_hook from comments. (elf_m68k_remove_got_entry_type): Removed. (elf_m68k_find_got_entry_ptr): Likewise. (elf_m68k_remove_got_entry): Likewise. (elf_m68k_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-mcore.c (mcore_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-metag.c (elf_metag_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-microblaze.c (elf_backend_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-mips.c (elf_backend_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-nds32.c (nds32_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-nios2.c (nios2_elf32_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-or1k.c (or1k_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-ppc.c (ppc_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-s390.c (elf_s390_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-sparc.c (elf_backend_gc_sweep_hook): Likewise. * elf32-tic6x.c (elf32_tic6x_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-tilegx.c (elf_backend_gc_sweep_hook): Likewise. * elf32-tilepro.c (tilepro_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-vax.c (elf_vax_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf32-xtensa.c (elf_xtensa_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-alpha.c (elf64_alpha_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-mips.c (elf_backend_gc_sweep_hook): Likewise. * elf64-mmix.c (mmix_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-ppc.c (elf_backend_gc_sweep_hook): Likewise. (ppc64_elf_gc_sweep_hook): Likewise. * elf64-s390.c (elf_s390_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elf64-sparc.c (elf_backend_gc_sweep_hook): Likewise. * elf64-tilegx.c (elf_backend_gc_sweep_hook): Likewise. * elflink.c (elf_link_add_object_symbols): Don't call _bfd_elf_link_check_relocs here. (gc_sweep_hook_fn): Removed. (elf_gc_sweep): Remove gc_sweep_hook. * elfnn-aarch64.c (elfNN_aarch64_gc_sweep_hook): Removed. (elf_backend_gc_sweep_hook): Likewise. * elfnn-riscv.c (riscv_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elfxx-mips.c (_bfd_mips_elf_gc_sweep_hook): Likewise. * elfxx-mips.h (_bfd_mips_elf_gc_sweep_hook): Likewise. (elf_backend_gc_sweep_hook): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_gc_sweep_hook): Likewise. * elfxx-sparc.h (_bfd_sparc_elf_gc_sweep_hook): Likewise. * elfxx-target.h (elf_backend_gc_sweep_hook): Likewise. (elfNN_bed): Remove elf_backend_gc_sweep_hook. * elfxx-tilegx.c (tilegx_elf_gc_sweep_hook): Removed. * elfxx-tilegx.h (tilegx_elf_gc_sweep_hook): Likewise. ld/ * emulparams/elf32_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Removed. * emulparams/elf_i386_be.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_i386_chaos.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_i386_ldso.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_i386_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_iamcu.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_k1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_l1om.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/elf_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386lynx.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386moss.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/i386nw.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf32.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf_nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shelf_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shlelf32_linux.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shlelf_linux.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emulparams/shlelf_nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise. * emultempl/aarch64elf.em (gld${EMULATION_NAME}_before_parse): Set link_info.check_relocs_after_open_input to TRUE. * emultempl/armelf.em (gld${EMULATION_NAME}_before_parse): Likewise. * emultempl/scoreelf.em (gld${EMULATION_NAME}_before_parse): Likewise. * emultempl/aix.em (ld_${EMULATION_NAME}_emulation): Add after_parse_default. * emultempl/armcoff.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/beos.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/generic.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/gld960.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/gld960c.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/lnk960.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/m68kcoff.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/msp430.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/pe.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/pep.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/sunos.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/ticoff.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/vanilla.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Always set link_info.check_relocs_after_open_input to TRUE. (ld_${EMULATION_NAME}_emulation): Add $LDEMUL_AFTER_CHECK_RELOCS. * emultempl/linux.em (gld${EMULATION_NAME}_before_parse): Set link_info.check_relocs_after_open_input to TRUE. (ld_${EMULATION_NAME}_emulation): Add after_check_relocs_default. * emultempl/mmix-elfnmmo.em (mmix_before_parse): New function. (LDEMUL_BEFORE_PARSE): New. * emultempl/mmixelf.em (elfmmix_before_parse): Replace gld${EMULATION_NAME}_before_parse with mmix_before_parse. * emultempl/ppc32elf.em (ppc_after_open): Renamed to ... (ppc_after_check_relocs): This. Call after_check_relocs_default instead of gld${EMULATION_NAME}_after_open. (LDEMUL_AFTER_OPEN): Removed. (LDEMUL_AFTER_CHECK_RELOCS): New. * ldemul.c (ldemul_after_check_relocs): New. (after_check_relocs_default): Likewise. * ldemul.h (ldemul_after_check_relocs): Likewise. (after_check_relocs_default): Likewise. (ld_emulation_xfer_struct): Add after_check_relocs. * ldlang.c (lang_process): Call ldemul_after_check_relocs after lang_check_relocs. * testsuite/ld-aarch64/gc-got-relocs.d: Don't expect GOT section. * testsuite/ld-aarch64/gc-tls-relocs.d: Likewise. * testsuite/ld-cris/tls-gc-68.d: Likewise. * testsuite/ld-cris/tls-gc-69.d: Likewise. * testsuite/ld-cris/tls-gc-70.d: Likewise. * testsuite/ld-cris/tls-gc-75.d: Likewise. * testsuite/ld-cris/tls-gc-79.d: Likewise. * testsuite/ld-mmix/bpo-10.d: Don't expect .MMIX.reg_contents section.
2017-10-16 18:49:54 +08:00
LDEMUL_AFTER_CHECK_RELOCS=ppc_after_check_relocs
fi
LDEMUL_BEFORE_ALLOCATION=ppc_before_allocation
LDEMUL_FINISH=ppc_finish