2017-12-09 04:57:25 +08:00
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/* Target-dependent code for the 32-bit OpenRISC 1000, for the GDB.
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2019-01-01 14:01:51 +08:00
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Copyright (C) 2008-2019 Free Software Foundation, Inc.
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2017-12-09 04:57:25 +08:00
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "frame.h"
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#include "inferior.h"
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#include "symtab.h"
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#include "value.h"
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#include "gdbcmd.h"
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#include "language.h"
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#include "gdbcore.h"
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#include "symfile.h"
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#include "objfiles.h"
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#include "gdbtypes.h"
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#include "target.h"
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#include "regcache.h"
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#include "safe-ctype.h"
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#include "block.h"
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#include "reggroups.h"
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#include "arch-utils.h"
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#include "frame-unwind.h"
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#include "frame-base.h"
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#include "dwarf2-frame.h"
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#include "trad-frame.h"
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#include "regset.h"
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#include "remote.h"
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#include "target-descriptions.h"
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#include <inttypes.h>
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#include "dis-asm.h"
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/* OpenRISC specific includes. */
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#include "or1k-tdep.h"
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#include "features/or1k.c"
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/* Global debug flag. */
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Change boolean options to bool instead of int
This is for add_setshow_boolean_cmd as well as the gdb::option interface.
gdb/ChangeLog:
2019-09-17 Christian Biesinger <cbiesinger@google.com>
* ada-lang.c (ada_ignore_descriptive_types_p): Change to bool.
(print_signatures): Likewise.
(trust_pad_over_xvs): Likewise.
* arch/aarch64-insn.c (aarch64_debug): Likewise.
* arch/aarch64-insn.h (aarch64_debug): Likewise.
* arm-linux-nat.c (arm_apcs_32): Likewise.
* arm-linux-tdep.c (arm_apcs_32): Likewise.
* arm-nbsd-nat.c (arm_apcs_32): Likewise.
* arm-tdep.c (arm_debug): Likewise.
(arm_apcs_32): Likewise.
* auto-load.c (debug_auto_load): Likewise.
(auto_load_gdb_scripts): Likewise.
(global_auto_load): Likewise.
(auto_load_local_gdbinit): Likewise.
(auto_load_local_gdbinit_loaded): Likewise.
* auto-load.h (global_auto_load): Likewise.
(auto_load_local_gdbinit): Likewise.
(auto_load_local_gdbinit_loaded): Likewise.
* breakpoint.c (disconnected_dprintf): Likewise.
(breakpoint_proceeded): Likewise.
(automatic_hardware_breakpoints): Likewise.
(always_inserted_mode): Likewise.
(target_exact_watchpoints): Likewise.
(_initialize_breakpoint): Update.
* breakpoint.h (target_exact_watchpoints): Change to bool.
* btrace.c (maint_btrace_pt_skip_pad): Likewise.
* cli/cli-cmds.c (trace_commands): Likewise.
* cli/cli-cmds.h (trace_commands): Likewise.
* cli/cli-decode.c (add_setshow_boolean_cmd): Change int* argument
to bool*.
* cli/cli-logging.c (logging_overwrite): Change to bool.
(logging_redirect): Likewise.
(debug_redirect): Likewise.
* cli/cli-option.h (option_def) <boolean>: Change return type to bool*.
(struct boolean_option_def) <get_var_address_cb_>: Change return type
to bool.
<boolean_option_def>: Update.
(struct flag_option_def): Change default type of Context to bool
from int.
<flag_option_def>: Change return type of var_address_cb_ to bool*.
* cli/cli-setshow.c (do_set_command): Cast to bool* instead of int*.
(get_setshow_command_value_string): Likewise.
* cli/cli-style.c (cli_styling): Change to bool.
(source_styling): Likewise.
* cli/cli-style.h (source_styling): Likewise.
(cli_styling): Likewise.
* cli/cli-utils.h (struct qcs_flags) <quiet, cont, silent>: Change
to bool.
* command.h (var_types): Update comment.
(add_setshow_boolean_cmd): Change int* var argument to bool*.
* compile/compile-cplus-types.c (debug_compile_cplus_types): Change to
bool.
(debug_compile_cplus_scopes): Likewise.
* compile/compile-internal.h (compile_debug): Likewise.
* compile/compile.c (compile_debug): Likewise.
(struct compile_options) <raw>: Likewise.
* cp-support.c (catch_demangler_crashes): Likewise.
* cris-tdep.c (usr_cmd_cris_version_valid): Likewise.
(usr_cmd_cris_dwarf2_cfi): Likewise.
* csky-tdep.c (csky_debug): Likewise.
* darwin-nat.c (enable_mach_exceptions): Likewise.
* dcache.c (dcache_enabled_p): Likewise.
* defs.h (info_verbose): Likewise.
* demangle.c (demangle): Likewise.
(asm_demangle): Likewise.
* dwarf-index-cache.c (debug_index_cache): Likewise.
* dwarf2-frame.c (dwarf2_frame_unwinders_enabled_p): Likewise.
* dwarf2-frame.h (dwarf2_frame_unwinders_enabled_p): Likewise.
* dwarf2read.c (check_physname): Likewise.
(use_deprecated_index_sections): Likewise.
(dwarf_always_disassemble): Likewise.
* eval.c (overload_resolution): Likewise.
* event-top.c (set_editing_cmd_var): Likewise.
(exec_done_display_p): Likewise.
* event-top.h (set_editing_cmd_var): Likewise.
(exec_done_display_p): Likewise.
* exec.c (write_files): Likewise.
* fbsd-nat.c (debug_fbsd_lwp): Likewise
(debug_fbsd_nat): Likewise.
* frame.h (struct frame_print_options) <print_raw_frame_arguments>:
Likewise.
(struct set_backtrace_options) <backtrace_past_main>: Likewise.
<backtrace_past_entry> Likewise.
* gdb-demangle.h (demangle): Likewise.
(asm_demangle): Likewise.
* gdb_bfd.c (bfd_sharing): Likewise.
* gdbcore.h (write_files): Likewise.
* gdbsupport/common-debug.c (show_debug_regs): Likewise.
* gdbsupport/common-debug.h (show_debug_regs): Likewise.
* gdbthread.h (print_thread_events): Likewise.
* gdbtypes.c (opaque_type_resolution): Likewise.
(strict_type_checking): Likewise.
* gnu-nat.c (gnu_debug_flag): Likewise.
* guile/scm-auto-load.c (auto_load_guile_scripts): Likewise.
* guile/scm-param.c (pascm_variable): Add boolval.
(add_setshow_generic): Update.
(pascm_param_value): Update.
(pascm_set_param_value_x): Update.
* hppa-tdep.c (hppa_debug): Change to bool..
* infcall.c (may_call_functions_p): Likewise.
(coerce_float_to_double_p): Likewise.
(unwind_on_signal_p): Likewise.
(unwind_on_terminating_exception_p): Likewise.
* infcmd.c (startup_with_shell): Likewise.
* inferior.c (print_inferior_events): Likewise.
* inferior.h (startup_with_shell): Likewise.
(print_inferior_events): Likewise.
* infrun.c (step_stop_if_no_debug): Likewise.
(detach_fork): Likewise.
(debug_displaced): Likewise.
(disable_randomization): Likewise.
(non_stop): Likewise.
(non_stop_1): Likewise.
(observer_mode): Likewise.
(observer_mode_1): Likewise.
(set_observer_mode): Update.
(sched_multi): Change to bool.
* infrun.h (debug_displaced): Likewise.
(sched_multi): Likewise.
(step_stop_if_no_debug): Likewise.
(non_stop): Likewise.
(disable_randomization): Likewise.
* linux-tdep.c (use_coredump_filter): Likewise.
(dump_excluded_mappings): Likewise.
* linux-thread-db.c (auto_load_thread_db): Likewise.
(check_thread_db_on_load): Likewise.
* main.c (captured_main_1): Update.
* maint-test-options.c (struct test_options_opts) <flag_opt, xx1_opt,
xx2_opt, boolean_opt>: Change to bool.
* maint-test-settings.c (maintenance_test_settings_boolean): Likewise.
* maint.c (maintenance_profile_p): Likewise.
(per_command_time): Likewise.
(per_command_space): Likewise.
(per_command_symtab): Likewise.
* memattr.c (inaccessible_by_default): Likewise.
* mi/mi-main.c (mi_async): Likewise.
(mi_async_1): Likewise.
* mips-tdep.c (mips64_transfers_32bit_regs_p): Likewise.
* nat/fork-inferior.h (startup_with_shell): Likewise.
* nat/linux-namespaces.c (debug_linux_namespaces): Likewise.
* nat/linux-namespaces.h (debug_linux_namespaces): Likewise.
* nios2-tdep.c (nios2_debug): Likewise.
* or1k-tdep.c (or1k_debug): Likewise.
* parse.c (parser_debug): Likewise.
* parser-defs.h (parser_debug): Likewise.
* printcmd.c (print_symbol_filename): Likewise.
* proc-api.c (procfs_trace): Likewise.
* python/py-auto-load.c (auto_load_python_scripts): Likewise.
* python/py-param.c (union parmpy_variable): Add "bool boolval" field.
(set_parameter_value): Update.
(add_setshow_generic): Update.
* python/py-value.c (copy_py_bool_obj): Change argument from int*
to bool*.
* python/python.c (gdbpy_parameter_value): Cast to bool* instead of
int*.
* ravenscar-thread.c (ravenscar_task_support): Change to bool.
* record-btrace.c (record_btrace_target::store_registers): Update.
* record-full.c (record_full_memory_query): Change to bool.
(record_full_stop_at_limit): Likewise.
* record-full.h (record_full_memory_query): Likewise.
* remote-notif.c (notif_debug): Likewise.
* remote-notif.h (notif_debug): Likewise.
* remote.c (use_range_stepping): Likewise.
(interrupt_on_connect): Likewise.
(remote_break): Likewise.
* ser-tcp.c (tcp_auto_retry): Likewise.
* ser-unix.c (serial_hwflow): Likewise.
* skip.c (debug_skip): Likewise.
* solib-aix.c (solib_aix_debug): Likewise.
* spu-tdep.c (spu_stop_on_load_p): Likewise.
(spu_auto_flush_cache_p): Likewise.
* stack.c (struct backtrace_cmd_options) <full, no_filters, hide>:
Likewise.
(struct info_print_options) <quiet>: Likewise.
* symfile-debug.c (debug_symfile): Likewise.
* symfile.c (auto_solib_add): Likewise.
(separate_debug_file_debug): Likewise.
* symfile.h (auto_solib_add): Likewise.
(separate_debug_file_debug): Likewise.
* symtab.c (basenames_may_differ): Likewise.
(struct filename_partial_match_opts) <dirname, basename>: Likewise.
(struct info_print_options) <quiet, exclude_minsyms>: Likewise.
(struct info_types_options) <quiet>: Likewise.
* symtab.h (demangle): Likewise.
(basenames_may_differ): Likewise.
* target-dcache.c (stack_cache_enabled_1): Likewise.
(code_cache_enabled_1): Likewise.
* target.c (trust_readonly): Likewise.
(may_write_registers): Likewise.
(may_write_memory): Likewise.
(may_insert_breakpoints): Likewise.
(may_insert_tracepoints): Likewise.
(may_insert_fast_tracepoints): Likewise.
(may_stop): Likewise.
(auto_connect_native_target): Likewise.
(target_stop_and_wait): Update.
(target_async_permitted): Change to bool.
(target_async_permitted_1): Likewise.
(may_write_registers_1): Likewise.
(may_write_memory_1): Likewise.
(may_insert_breakpoints_1): Likewise.
(may_insert_tracepoints_1): Likewise.
(may_insert_fast_tracepoints_1): Likewise.
(may_stop_1): Likewise.
* target.h (target_async_permitted): Likewise.
(may_write_registers): Likewise.
(may_write_memory): Likewise.
(may_insert_breakpoints): Likewise.
(may_insert_tracepoints): Likewise.
(may_insert_fast_tracepoints): Likewise.
(may_stop): Likewise.
* thread.c (struct info_threads_opts) <show_global_ids>: Likewise.
(make_thread_apply_all_options_def_group): Change argument from int*
to bool*.
(thread_apply_all_command): Update.
(print_thread_events): Change to bool.
* top.c (confirm): Likewise.
(command_editing_p): Likewise.
(history_expansion_p): Likewise.
(write_history_p): Likewise.
(info_verbose): Likewise.
* top.h (confirm): Likewise.
(history_expansion_p): Likewise.
* tracepoint.c (disconnected_tracing): Likewise.
(circular_trace_buffer): Likewise.
* typeprint.c (print_methods): Likewise.
(print_typedefs): Likewise.
* utils.c (debug_timestamp): Likewise.
(sevenbit_strings): Likewise.
(pagination_enabled): Likewise.
* utils.h (sevenbit_strings): Likewise.
(pagination_enabled): Likewise.
* valops.c (overload_resolution): Likewise.
* valprint.h (struct value_print_options) <prettyformat_arrays,
prettyformat_structs, vtblprint, unionprint, addressprint, objectprint,
stop_print_at_null, print_array_indexes, deref_ref, static_field_print,
pascal_static_field_print, raw, summary, symbol_print, finish_print>:
Likewise.
* windows-nat.c (new_console): Likewise.
(cygwin_exceptions): Likewise.
(new_group): Likewise.
(debug_exec): Likewise.
(debug_events): Likewise.
(debug_memory): Likewise.
(debug_exceptions): Likewise.
(useshell): Likewise.
* windows-tdep.c (maint_display_all_tib): Likewise.
* xml-support.c (debug_xml): Likewise.
2019-09-15 03:36:58 +08:00
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static bool or1k_debug = false;
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2017-12-09 04:57:25 +08:00
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static void
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show_or1k_debug (struct ui_file *file, int from_tty,
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2017-12-17 06:20:51 +08:00
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struct cmd_list_element *c, const char *value)
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2017-12-09 04:57:25 +08:00
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{
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fprintf_filtered (file, _("OpenRISC debugging is %s.\n"), value);
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}
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/* The target-dependent structure for gdbarch. */
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struct gdbarch_tdep
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{
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int bytes_per_word;
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int bytes_per_address;
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CGEN_CPU_DESC gdb_cgen_cpu_desc;
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};
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/* Support functions for the architecture definition. */
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/* Get an instruction from memory. */
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static ULONGEST
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or1k_fetch_instruction (struct gdbarch *gdbarch, CORE_ADDR addr)
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{
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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gdb_byte buf[OR1K_INSTLEN];
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if (target_read_code (addr, buf, OR1K_INSTLEN)) {
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memory_error (TARGET_XFER_E_IO, addr);
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}
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return extract_unsigned_integer (buf, OR1K_INSTLEN, byte_order);
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}
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/* Generic function to read bits from an instruction. */
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static bool
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or1k_analyse_inst (uint32_t inst, const char *format, ...)
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{
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/* Break out each field in turn, validating as we go. */
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va_list ap;
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int i;
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int iptr = 0; /* Instruction pointer */
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va_start (ap, format);
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for (i = 0; 0 != format[i];)
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{
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const char *start_ptr;
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char *end_ptr;
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uint32_t bits; /* Bit substring of interest */
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uint32_t width; /* Substring width */
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uint32_t *arg_ptr;
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switch (format[i])
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{
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case ' ':
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i++;
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break; /* Formatting: ignored */
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case '0':
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case '1': /* Constant bit field */
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bits = (inst >> (OR1K_INSTBITLEN - iptr - 1)) & 0x1;
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if ((format[i] - '0') != bits)
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return false;
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iptr++;
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i++;
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break;
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case '%': /* Bit field */
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i++;
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start_ptr = &(format[i]);
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width = strtoul (start_ptr, &end_ptr, 10);
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/* Check we got something, and if so skip on. */
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if (start_ptr == end_ptr)
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error (_("bitstring \"%s\" at offset %d has no length field."),
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format, i);
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i += end_ptr - start_ptr;
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/* Look for and skip the terminating 'b'. If it's not there, we
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still give a fatal error, because these are fixed strings that
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just should not be wrong. */
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if ('b' != format[i++])
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error (_("bitstring \"%s\" at offset %d has no terminating 'b'."),
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format, i);
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/* Break out the field. There is a special case with a bit width
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of 32. */
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if (32 == width)
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bits = inst;
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else
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bits =
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(inst >> (OR1K_INSTBITLEN - iptr - width)) & ((1 << width) - 1);
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arg_ptr = va_arg (ap, uint32_t *);
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*arg_ptr = bits;
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iptr += width;
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break;
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default:
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error (_("invalid character in bitstring \"%s\" at offset %d."),
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format, i);
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break;
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}
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}
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/* Is the length OK? */
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gdb_assert (OR1K_INSTBITLEN == iptr);
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return true; /* Success */
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}
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|
|
|
|
|
|
|
|
|
/* This is used to parse l.addi instructions during various prologue
|
|
|
|
|
analysis routines. The l.addi instruction has semantics:
|
|
|
|
|
|
|
|
|
|
assembly: l.addi rD,rA,I
|
|
|
|
|
implementation: rD = rA + sign_extend(Immediate)
|
|
|
|
|
|
|
|
|
|
The rd_ptr, ra_ptr and simm_ptr must be non NULL pointers and are used
|
|
|
|
|
to store the parse results. Upon successful parsing true is returned,
|
|
|
|
|
false on failure. */
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
or1k_analyse_l_addi (uint32_t inst, unsigned int *rd_ptr,
|
|
|
|
|
unsigned int *ra_ptr, int *simm_ptr)
|
|
|
|
|
{
|
|
|
|
|
/* Instruction fields */
|
|
|
|
|
uint32_t rd, ra, i;
|
|
|
|
|
|
|
|
|
|
if (or1k_analyse_inst (inst, "10 0111 %5b %5b %16b", &rd, &ra, &i))
|
|
|
|
|
{
|
|
|
|
|
/* Found it. Construct the result fields. */
|
|
|
|
|
*rd_ptr = (unsigned int) rd;
|
|
|
|
|
*ra_ptr = (unsigned int) ra;
|
|
|
|
|
*simm_ptr = (int) (((i & 0x8000) == 0x8000) ? 0xffff0000 | i : i);
|
|
|
|
|
|
|
|
|
|
return true; /* Success */
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return false; /* Failure */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* This is used to to parse store instructions during various prologue
|
|
|
|
|
analysis routines. The l.sw instruction has semantics:
|
|
|
|
|
|
|
|
|
|
assembly: l.sw I(rA),rB
|
|
|
|
|
implementation: store rB contents to memory at effective address of
|
|
|
|
|
rA + sign_extend(Immediate)
|
|
|
|
|
|
|
|
|
|
The simm_ptr, ra_ptr and rb_ptr must be non NULL pointers and are used
|
|
|
|
|
to store the parse results. Upon successful parsing true is returned,
|
|
|
|
|
false on failure. */
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
or1k_analyse_l_sw (uint32_t inst, int *simm_ptr, unsigned int *ra_ptr,
|
|
|
|
|
unsigned int *rb_ptr)
|
|
|
|
|
{
|
|
|
|
|
/* Instruction fields */
|
|
|
|
|
uint32_t ihi, ilo, ra, rb;
|
|
|
|
|
|
|
|
|
|
if (or1k_analyse_inst (inst, "11 0101 %5b %5b %5b %11b", &ihi, &ra, &rb,
|
|
|
|
|
&ilo))
|
|
|
|
|
|
|
|
|
|
{
|
|
|
|
|
/* Found it. Construct the result fields. */
|
|
|
|
|
*simm_ptr = (int) ((ihi << 11) | ilo);
|
|
|
|
|
*simm_ptr |= ((ihi & 0x10) == 0x10) ? 0xffff0000 : 0;
|
|
|
|
|
|
|
|
|
|
*ra_ptr = (unsigned int) ra;
|
|
|
|
|
*rb_ptr = (unsigned int) rb;
|
|
|
|
|
|
|
|
|
|
return true; /* Success */
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return false; /* Failure */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Functions defining the architecture. */
|
|
|
|
|
|
|
|
|
|
/* Implement the return_value gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static enum return_value_convention
|
|
|
|
|
or1k_return_value (struct gdbarch *gdbarch, struct value *functype,
|
|
|
|
|
struct type *valtype, struct regcache *regcache,
|
|
|
|
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
|
|
|
|
{
|
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
|
|
|
enum type_code rv_type = TYPE_CODE (valtype);
|
|
|
|
|
unsigned int rv_size = TYPE_LENGTH (valtype);
|
|
|
|
|
int bpw = (gdbarch_tdep (gdbarch))->bytes_per_word;
|
|
|
|
|
|
|
|
|
|
/* Deal with struct/union as addresses. If an array won't fit in a
|
|
|
|
|
single register it is returned as address. Anything larger than 2
|
|
|
|
|
registers needs to also be passed as address (matches gcc
|
|
|
|
|
default_return_in_memory). */
|
|
|
|
|
if ((TYPE_CODE_STRUCT == rv_type) || (TYPE_CODE_UNION == rv_type)
|
|
|
|
|
|| ((TYPE_CODE_ARRAY == rv_type) && (rv_size > bpw))
|
|
|
|
|
|| (rv_size > 2 * bpw))
|
|
|
|
|
{
|
|
|
|
|
if (readbuf != NULL)
|
|
|
|
|
{
|
|
|
|
|
ULONGEST tmp;
|
|
|
|
|
|
|
|
|
|
regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
|
|
|
|
|
read_memory (tmp, readbuf, rv_size);
|
|
|
|
|
}
|
|
|
|
|
if (writebuf != NULL)
|
|
|
|
|
{
|
|
|
|
|
ULONGEST tmp;
|
|
|
|
|
|
|
|
|
|
regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
|
|
|
|
|
write_memory (tmp, writebuf, rv_size);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return RETURN_VALUE_ABI_RETURNS_ADDRESS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (rv_size <= bpw)
|
|
|
|
|
{
|
|
|
|
|
/* Up to one word scalars are returned in R11. */
|
|
|
|
|
if (readbuf != NULL)
|
|
|
|
|
{
|
|
|
|
|
ULONGEST tmp;
|
|
|
|
|
|
|
|
|
|
regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM, &tmp);
|
|
|
|
|
store_unsigned_integer (readbuf, rv_size, byte_order, tmp);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
if (writebuf != NULL)
|
|
|
|
|
{
|
|
|
|
|
gdb_byte *buf = XCNEWVEC(gdb_byte, bpw);
|
|
|
|
|
|
|
|
|
|
if (BFD_ENDIAN_BIG == byte_order)
|
|
|
|
|
memcpy (buf + (sizeof (gdb_byte) * bpw) - rv_size, writebuf,
|
|
|
|
|
rv_size);
|
|
|
|
|
else
|
|
|
|
|
memcpy (buf, writebuf, rv_size);
|
|
|
|
|
|
2018-05-31 02:54:42 +08:00
|
|
|
|
regcache->cooked_write (OR1K_RV_REGNUM, buf);
|
2017-12-09 04:57:25 +08:00
|
|
|
|
|
|
|
|
|
free (buf);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* 2 word scalars are returned in r11/r12 (with the MS word in r11). */
|
|
|
|
|
if (readbuf != NULL)
|
|
|
|
|
{
|
|
|
|
|
ULONGEST tmp_lo;
|
|
|
|
|
ULONGEST tmp_hi;
|
|
|
|
|
ULONGEST tmp;
|
|
|
|
|
|
|
|
|
|
regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM,
|
|
|
|
|
&tmp_hi);
|
|
|
|
|
regcache_cooked_read_unsigned (regcache, OR1K_RV_REGNUM + 1,
|
|
|
|
|
&tmp_lo);
|
|
|
|
|
tmp = (tmp_hi << (bpw * 8)) | tmp_lo;
|
|
|
|
|
|
|
|
|
|
store_unsigned_integer (readbuf, rv_size, byte_order, tmp);
|
|
|
|
|
}
|
|
|
|
|
if (writebuf != NULL)
|
|
|
|
|
{
|
|
|
|
|
gdb_byte *buf_lo = XCNEWVEC(gdb_byte, bpw);
|
|
|
|
|
gdb_byte *buf_hi = XCNEWVEC(gdb_byte, bpw);
|
|
|
|
|
|
|
|
|
|
/* This is cheating. We assume that we fit in 2 words exactly,
|
|
|
|
|
which wouldn't work if we had (say) a 6-byte scalar type on a
|
|
|
|
|
big endian architecture (with the OpenRISC 1000 usually is). */
|
|
|
|
|
memcpy (buf_hi, writebuf, rv_size - bpw);
|
|
|
|
|
memcpy (buf_lo, writebuf + bpw, bpw);
|
|
|
|
|
|
2018-05-31 02:54:42 +08:00
|
|
|
|
regcache->cooked_write (OR1K_RV_REGNUM, buf_hi);
|
|
|
|
|
regcache->cooked_write (OR1K_RV_REGNUM + 1, buf_lo);
|
2017-12-09 04:57:25 +08:00
|
|
|
|
|
|
|
|
|
free (buf_lo);
|
|
|
|
|
free (buf_hi);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* OR1K always uses a l.trap instruction for breakpoints. */
|
|
|
|
|
|
|
|
|
|
constexpr gdb_byte or1k_break_insn[] = {0x21, 0x00, 0x00, 0x01};
|
|
|
|
|
|
|
|
|
|
typedef BP_MANIPULATION (or1k_break_insn) or1k_breakpoint;
|
|
|
|
|
|
|
|
|
|
/* Implement the single_step_through_delay gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
or1k_single_step_through_delay (struct gdbarch *gdbarch,
|
|
|
|
|
struct frame_info *this_frame)
|
|
|
|
|
{
|
|
|
|
|
ULONGEST val;
|
|
|
|
|
CORE_ADDR ppc;
|
|
|
|
|
CORE_ADDR npc;
|
|
|
|
|
CGEN_FIELDS tmp_fields;
|
|
|
|
|
const CGEN_INSN *insn;
|
|
|
|
|
struct regcache *regcache = get_current_regcache ();
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
|
|
/* Get the previous and current instruction addresses. If they are not
|
|
|
|
|
adjacent, we cannot be in a delay slot. */
|
|
|
|
|
regcache_cooked_read_unsigned (regcache, OR1K_PPC_REGNUM, &val);
|
|
|
|
|
ppc = (CORE_ADDR) val;
|
|
|
|
|
regcache_cooked_read_unsigned (regcache, OR1K_NPC_REGNUM, &val);
|
|
|
|
|
npc = (CORE_ADDR) val;
|
|
|
|
|
|
|
|
|
|
if (0x4 != (npc - ppc))
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
insn = cgen_lookup_insn (tdep->gdb_cgen_cpu_desc,
|
2017-12-17 06:20:51 +08:00
|
|
|
|
NULL,
|
|
|
|
|
or1k_fetch_instruction (gdbarch, ppc),
|
|
|
|
|
NULL, 32, &tmp_fields, 0);
|
2017-12-09 04:57:25 +08:00
|
|
|
|
|
|
|
|
|
/* NULL here would mean the last instruction was not understood by cgen.
|
|
|
|
|
This should not usually happen, but if does its not a delay slot. */
|
|
|
|
|
if (insn == NULL)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* TODO: we should add a delay slot flag to the CGEN_INSN and remove
|
|
|
|
|
this hard coded test. */
|
|
|
|
|
return ((CGEN_INSN_NUM (insn) == OR1K_INSN_L_J)
|
|
|
|
|
|| (CGEN_INSN_NUM (insn) == OR1K_INSN_L_JAL)
|
|
|
|
|
|| (CGEN_INSN_NUM (insn) == OR1K_INSN_L_JR)
|
|
|
|
|
|| (CGEN_INSN_NUM (insn) == OR1K_INSN_L_JALR)
|
|
|
|
|
|| (CGEN_INSN_NUM (insn) == OR1K_INSN_L_BNF)
|
|
|
|
|
|| (CGEN_INSN_NUM (insn) == OR1K_INSN_L_BF));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Name for or1k general registers. */
|
|
|
|
|
|
|
|
|
|
static const char *const or1k_reg_names[OR1K_NUM_REGS] = {
|
|
|
|
|
/* general purpose registers */
|
|
|
|
|
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
|
|
|
|
|
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
|
|
|
|
|
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
|
|
|
|
|
"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
|
|
|
|
|
|
|
|
|
|
/* previous program counter, next program counter and status register */
|
|
|
|
|
"ppc", "npc", "sr"
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
or1k_is_arg_reg (unsigned int regnum)
|
|
|
|
|
{
|
|
|
|
|
return (OR1K_FIRST_ARG_REGNUM <= regnum)
|
|
|
|
|
&& (regnum <= OR1K_LAST_ARG_REGNUM);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
or1k_is_callee_saved_reg (unsigned int regnum)
|
|
|
|
|
{
|
|
|
|
|
return (OR1K_FIRST_SAVED_REGNUM <= regnum) && (0 == regnum % 2);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the skip_prologue gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
or1k_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR start_pc;
|
|
|
|
|
CORE_ADDR addr;
|
|
|
|
|
uint32_t inst;
|
|
|
|
|
|
|
|
|
|
unsigned int ra, rb, rd; /* for instruction analysis */
|
|
|
|
|
int simm;
|
|
|
|
|
|
|
|
|
|
int frame_size = 0;
|
|
|
|
|
|
|
|
|
|
/* Try using SAL first if we have symbolic information available. This
|
|
|
|
|
only works for DWARF 2, not STABS. */
|
|
|
|
|
|
|
|
|
|
if (find_pc_partial_function (pc, NULL, &start_pc, NULL))
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR prologue_end = skip_prologue_using_sal (gdbarch, pc);
|
|
|
|
|
|
|
|
|
|
if (0 != prologue_end)
|
|
|
|
|
{
|
|
|
|
|
struct symtab_and_line prologue_sal = find_pc_line (start_pc, 0);
|
|
|
|
|
struct compunit_symtab *compunit
|
|
|
|
|
= SYMTAB_COMPUNIT (prologue_sal.symtab);
|
|
|
|
|
const char *debug_format = COMPUNIT_DEBUGFORMAT (compunit);
|
|
|
|
|
|
|
|
|
|
if ((NULL != debug_format)
|
|
|
|
|
&& (strlen ("dwarf") <= strlen (debug_format))
|
|
|
|
|
&& (0 == strncasecmp ("dwarf", debug_format, strlen ("dwarf"))))
|
|
|
|
|
return (prologue_end > pc) ? prologue_end : pc;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Look to see if we can find any of the standard prologue sequence. All
|
|
|
|
|
quite difficult, since any or all of it may be missing. So this is
|
|
|
|
|
just a best guess! */
|
|
|
|
|
|
|
|
|
|
addr = pc; /* Where we have got to */
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
|
|
|
|
|
/* Look for the new stack pointer being set up. */
|
|
|
|
|
if (or1k_analyse_l_addi (inst, &rd, &ra, &simm)
|
|
|
|
|
&& (OR1K_SP_REGNUM == rd) && (OR1K_SP_REGNUM == ra)
|
|
|
|
|
&& (simm < 0) && (0 == (simm % 4)))
|
|
|
|
|
{
|
|
|
|
|
frame_size = -simm;
|
|
|
|
|
addr += OR1K_INSTLEN;
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Look for the frame pointer being manipulated. */
|
|
|
|
|
if (or1k_analyse_l_sw (inst, &simm, &ra, &rb)
|
|
|
|
|
&& (OR1K_SP_REGNUM == ra) && (OR1K_FP_REGNUM == rb)
|
|
|
|
|
&& (simm >= 0) && (0 == (simm % 4)))
|
|
|
|
|
{
|
|
|
|
|
addr += OR1K_INSTLEN;
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
|
|
|
|
|
gdb_assert (or1k_analyse_l_addi (inst, &rd, &ra, &simm)
|
|
|
|
|
&& (OR1K_FP_REGNUM == rd) && (OR1K_SP_REGNUM == ra)
|
|
|
|
|
&& (simm == frame_size));
|
|
|
|
|
|
|
|
|
|
addr += OR1K_INSTLEN;
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Look for the link register being saved. */
|
|
|
|
|
if (or1k_analyse_l_sw (inst, &simm, &ra, &rb)
|
|
|
|
|
&& (OR1K_SP_REGNUM == ra) && (OR1K_LR_REGNUM == rb)
|
|
|
|
|
&& (simm >= 0) && (0 == (simm % 4)))
|
|
|
|
|
{
|
|
|
|
|
addr += OR1K_INSTLEN;
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Look for arguments or callee-saved register being saved. The register
|
|
|
|
|
must be one of the arguments (r3-r8) or the 10 callee saved registers
|
|
|
|
|
(r10, r12, r14, r16, r18, r20, r22, r24, r26, r28, r30). The base
|
|
|
|
|
register must be the FP (for the args) or the SP (for the callee_saved
|
|
|
|
|
registers). */
|
|
|
|
|
while (1)
|
|
|
|
|
{
|
|
|
|
|
if (or1k_analyse_l_sw (inst, &simm, &ra, &rb)
|
|
|
|
|
&& (((OR1K_FP_REGNUM == ra) && or1k_is_arg_reg (rb))
|
|
|
|
|
|| ((OR1K_SP_REGNUM == ra) && or1k_is_callee_saved_reg (rb)))
|
|
|
|
|
&& (0 == (simm % 4)))
|
|
|
|
|
{
|
|
|
|
|
addr += OR1K_INSTLEN;
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Nothing else to look for. We have found the end of the
|
|
|
|
|
prologue. */
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return addr;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the frame_align gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
or1k_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
|
|
|
|
|
{
|
|
|
|
|
return align_down (sp, OR1K_STACK_ALIGN);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the unwind_pc gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
or1k_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR pc;
|
|
|
|
|
|
|
|
|
|
if (or1k_debug)
|
|
|
|
|
fprintf_unfiltered (gdb_stdlog, "or1k_unwind_pc, next_frame=%d\n",
|
|
|
|
|
frame_relative_level (next_frame));
|
|
|
|
|
|
|
|
|
|
pc = frame_unwind_register_unsigned (next_frame, OR1K_NPC_REGNUM);
|
|
|
|
|
|
|
|
|
|
if (or1k_debug)
|
2017-12-13 23:00:51 +08:00
|
|
|
|
fprintf_unfiltered (gdb_stdlog, "or1k_unwind_pc, pc=%s\n",
|
|
|
|
|
paddress (gdbarch, pc));
|
2017-12-09 04:57:25 +08:00
|
|
|
|
|
|
|
|
|
return pc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the unwind_sp gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
or1k_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR sp;
|
|
|
|
|
|
|
|
|
|
if (or1k_debug)
|
|
|
|
|
fprintf_unfiltered (gdb_stdlog, "or1k_unwind_sp, next_frame=%d\n",
|
|
|
|
|
frame_relative_level (next_frame));
|
|
|
|
|
|
|
|
|
|
sp = frame_unwind_register_unsigned (next_frame, OR1K_SP_REGNUM);
|
|
|
|
|
|
|
|
|
|
if (or1k_debug)
|
2017-12-13 23:00:51 +08:00
|
|
|
|
fprintf_unfiltered (gdb_stdlog, "or1k_unwind_sp, sp=%s\n",
|
|
|
|
|
paddress (gdbarch, sp));
|
2017-12-09 04:57:25 +08:00
|
|
|
|
|
|
|
|
|
return sp;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the push_dummy_code gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
or1k_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp,
|
|
|
|
|
CORE_ADDR function, struct value **args, int nargs,
|
|
|
|
|
struct type *value_type, CORE_ADDR * real_pc,
|
|
|
|
|
CORE_ADDR * bp_addr, struct regcache *regcache)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR bp_slot;
|
|
|
|
|
|
|
|
|
|
/* Reserve enough room on the stack for our breakpoint instruction. */
|
|
|
|
|
bp_slot = sp - 4;
|
|
|
|
|
/* Store the address of that breakpoint. */
|
|
|
|
|
*bp_addr = bp_slot;
|
|
|
|
|
/* keeping the stack aligned. */
|
|
|
|
|
sp = or1k_frame_align (gdbarch, bp_slot);
|
|
|
|
|
/* The call starts at the callee's entry point. */
|
|
|
|
|
*real_pc = function;
|
|
|
|
|
|
|
|
|
|
return sp;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the push_dummy_call gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
or1k_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|
|
|
|
struct regcache *regcache, CORE_ADDR bp_addr,
|
|
|
|
|
int nargs, struct value **args, CORE_ADDR sp,
|
2018-11-16 19:21:04 +08:00
|
|
|
|
function_call_return_method return_method,
|
|
|
|
|
CORE_ADDR struct_addr)
|
2017-12-09 04:57:25 +08:00
|
|
|
|
{
|
|
|
|
|
|
|
|
|
|
int argreg;
|
|
|
|
|
int argnum;
|
|
|
|
|
int first_stack_arg;
|
|
|
|
|
int stack_offset = 0;
|
|
|
|
|
int heap_offset = 0;
|
|
|
|
|
CORE_ADDR heap_sp = sp - 128;
|
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
|
|
|
int bpa = (gdbarch_tdep (gdbarch))->bytes_per_address;
|
|
|
|
|
int bpw = (gdbarch_tdep (gdbarch))->bytes_per_word;
|
|
|
|
|
struct type *func_type = value_type (function);
|
|
|
|
|
|
|
|
|
|
/* Return address */
|
|
|
|
|
regcache_cooked_write_unsigned (regcache, OR1K_LR_REGNUM, bp_addr);
|
|
|
|
|
|
|
|
|
|
/* Register for the next argument. */
|
|
|
|
|
argreg = OR1K_FIRST_ARG_REGNUM;
|
|
|
|
|
|
|
|
|
|
/* Location for a returned structure. This is passed as a silent first
|
|
|
|
|
argument. */
|
2018-11-16 19:21:04 +08:00
|
|
|
|
if (return_method == return_method_struct)
|
2017-12-09 04:57:25 +08:00
|
|
|
|
{
|
|
|
|
|
regcache_cooked_write_unsigned (regcache, OR1K_FIRST_ARG_REGNUM,
|
|
|
|
|
struct_addr);
|
|
|
|
|
argreg++;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Put as many args as possible in registers. */
|
|
|
|
|
for (argnum = 0; argnum < nargs; argnum++)
|
|
|
|
|
{
|
|
|
|
|
const gdb_byte *val;
|
|
|
|
|
gdb_byte valbuf[sizeof (ULONGEST)];
|
|
|
|
|
|
|
|
|
|
struct value *arg = args[argnum];
|
|
|
|
|
struct type *arg_type = check_typedef (value_type (arg));
|
|
|
|
|
int len = TYPE_LENGTH (arg_type);
|
|
|
|
|
enum type_code typecode = TYPE_CODE (arg_type);
|
|
|
|
|
|
|
|
|
|
if (TYPE_VARARGS (func_type) && argnum >= TYPE_NFIELDS (func_type))
|
|
|
|
|
break; /* end or regular args, varargs go to stack. */
|
|
|
|
|
|
|
|
|
|
/* Extract the value, either a reference or the data. */
|
|
|
|
|
if ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)
|
|
|
|
|
|| (len > bpw * 2))
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR valaddr = value_address (arg);
|
|
|
|
|
|
|
|
|
|
/* If the arg is fabricated (i.e. 3*i, instead of i) valaddr is
|
|
|
|
|
undefined. */
|
|
|
|
|
if (valaddr == 0)
|
|
|
|
|
{
|
|
|
|
|
/* The argument needs to be copied into the target space.
|
|
|
|
|
Since the bottom of the stack is reserved for function
|
|
|
|
|
arguments we store this at the these at the top growing
|
|
|
|
|
down. */
|
|
|
|
|
heap_offset += align_up (len, bpw);
|
|
|
|
|
valaddr = heap_sp + heap_offset;
|
|
|
|
|
|
|
|
|
|
write_memory (valaddr, value_contents (arg), len);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The ABI passes all structures by reference, so get its
|
|
|
|
|
address. */
|
|
|
|
|
store_unsigned_integer (valbuf, bpa, byte_order, valaddr);
|
|
|
|
|
len = bpa;
|
|
|
|
|
val = valbuf;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Everything else, we just get the value. */
|
|
|
|
|
val = value_contents (arg);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Stick the value in a register. */
|
|
|
|
|
if (len > bpw)
|
|
|
|
|
{
|
|
|
|
|
/* Big scalars use two registers, but need NOT be pair aligned. */
|
|
|
|
|
|
|
|
|
|
if (argreg <= (OR1K_LAST_ARG_REGNUM - 1))
|
|
|
|
|
{
|
|
|
|
|
ULONGEST regval = extract_unsigned_integer (val, len,
|
|
|
|
|
byte_order);
|
|
|
|
|
|
|
|
|
|
unsigned int bits_per_word = bpw * 8;
|
|
|
|
|
ULONGEST mask = (((ULONGEST) 1) << bits_per_word) - 1;
|
|
|
|
|
ULONGEST lo = regval & mask;
|
|
|
|
|
ULONGEST hi = regval >> bits_per_word;
|
|
|
|
|
|
|
|
|
|
regcache_cooked_write_unsigned (regcache, argreg, hi);
|
|
|
|
|
regcache_cooked_write_unsigned (regcache, argreg + 1, lo);
|
|
|
|
|
argreg += 2;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Run out of regs */
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else if (argreg <= OR1K_LAST_ARG_REGNUM)
|
|
|
|
|
{
|
|
|
|
|
/* Smaller scalars fit in a single register. */
|
|
|
|
|
regcache_cooked_write_unsigned
|
|
|
|
|
(regcache, argreg, extract_unsigned_integer (val, len,
|
|
|
|
|
byte_order));
|
|
|
|
|
argreg++;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Ran out of regs. */
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
first_stack_arg = argnum;
|
|
|
|
|
|
|
|
|
|
/* If we get here with argnum < nargs, then arguments remain to be
|
|
|
|
|
placed on the stack. This is tricky, since they must be pushed in
|
|
|
|
|
reverse order and the stack in the end must be aligned. The only
|
|
|
|
|
solution is to do it in two stages, the first to compute the stack
|
|
|
|
|
size, the second to save the args. */
|
|
|
|
|
|
|
|
|
|
for (argnum = first_stack_arg; argnum < nargs; argnum++)
|
|
|
|
|
{
|
|
|
|
|
struct value *arg = args[argnum];
|
|
|
|
|
struct type *arg_type = check_typedef (value_type (arg));
|
|
|
|
|
int len = TYPE_LENGTH (arg_type);
|
|
|
|
|
enum type_code typecode = TYPE_CODE (arg_type);
|
|
|
|
|
|
|
|
|
|
if ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)
|
|
|
|
|
|| (len > bpw * 2))
|
|
|
|
|
{
|
|
|
|
|
/* Structures are passed as addresses. */
|
|
|
|
|
sp -= bpa;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Big scalars use more than one word. Code here allows for
|
|
|
|
|
future quad-word entities (e.g. long double.) */
|
|
|
|
|
sp -= align_up (len, bpw);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Ensure our dummy heap doesn't touch the stack, this could only
|
|
|
|
|
happen if we have many arguments including fabricated arguments. */
|
|
|
|
|
gdb_assert (heap_offset == 0 || ((heap_sp + heap_offset) < sp));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
sp = gdbarch_frame_align (gdbarch, sp);
|
|
|
|
|
stack_offset = 0;
|
|
|
|
|
|
|
|
|
|
/* Push the remaining args on the stack. */
|
|
|
|
|
for (argnum = first_stack_arg; argnum < nargs; argnum++)
|
|
|
|
|
{
|
|
|
|
|
const gdb_byte *val;
|
|
|
|
|
gdb_byte valbuf[sizeof (ULONGEST)];
|
|
|
|
|
|
|
|
|
|
struct value *arg = args[argnum];
|
|
|
|
|
struct type *arg_type = check_typedef (value_type (arg));
|
|
|
|
|
int len = TYPE_LENGTH (arg_type);
|
|
|
|
|
enum type_code typecode = TYPE_CODE (arg_type);
|
|
|
|
|
/* The EABI passes structures that do not fit in a register by
|
|
|
|
|
reference. In all other cases, pass the structure by value. */
|
|
|
|
|
if ((TYPE_CODE_STRUCT == typecode) || (TYPE_CODE_UNION == typecode)
|
|
|
|
|
|| (len > bpw * 2))
|
|
|
|
|
{
|
|
|
|
|
store_unsigned_integer (valbuf, bpa, byte_order,
|
|
|
|
|
value_address (arg));
|
|
|
|
|
len = bpa;
|
|
|
|
|
val = valbuf;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
val = value_contents (arg);
|
|
|
|
|
|
|
|
|
|
while (len > 0)
|
|
|
|
|
{
|
|
|
|
|
int partial_len = (len < bpw ? len : bpw);
|
|
|
|
|
|
|
|
|
|
write_memory (sp + stack_offset, val, partial_len);
|
|
|
|
|
stack_offset += align_up (partial_len, bpw);
|
|
|
|
|
len -= partial_len;
|
|
|
|
|
val += partial_len;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Save the updated stack pointer. */
|
|
|
|
|
regcache_cooked_write_unsigned (regcache, OR1K_SP_REGNUM, sp);
|
|
|
|
|
|
|
|
|
|
if (heap_offset > 0)
|
|
|
|
|
sp = heap_sp;
|
|
|
|
|
|
|
|
|
|
return sp;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Support functions for frame handling. */
|
|
|
|
|
|
|
|
|
|
/* Initialize a prologue cache
|
|
|
|
|
|
|
|
|
|
We build a cache, saying where registers of the prev frame can be found
|
|
|
|
|
from the data so far set up in this this.
|
|
|
|
|
|
|
|
|
|
We also compute a unique ID for this frame, based on the function start
|
|
|
|
|
address and the stack pointer (as it will be, even if it has yet to be
|
|
|
|
|
computed.
|
|
|
|
|
|
|
|
|
|
STACK FORMAT
|
|
|
|
|
============
|
|
|
|
|
|
|
|
|
|
The OR1K has a falling stack frame and a simple prolog. The Stack
|
|
|
|
|
pointer is R1 and the frame pointer R2. The frame base is therefore the
|
|
|
|
|
address held in R2 and the stack pointer (R1) is the frame base of the
|
|
|
|
|
next frame.
|
|
|
|
|
|
|
|
|
|
l.addi r1,r1,-frame_size # SP now points to end of new stack frame
|
|
|
|
|
|
|
|
|
|
The stack pointer may not be set up in a frameless function (e.g. a
|
|
|
|
|
simple leaf function).
|
|
|
|
|
|
|
|
|
|
l.sw fp_loc(r1),r2 # old FP saved in new stack frame
|
|
|
|
|
l.addi r2,r1,frame_size # FP now points to base of new stack frame
|
|
|
|
|
|
|
|
|
|
The frame pointer is not necessarily saved right at the end of the stack
|
|
|
|
|
frame - OR1K saves enough space for any args to called functions right
|
|
|
|
|
at the end (this is a difference from the Architecture Manual).
|
|
|
|
|
|
|
|
|
|
l.sw lr_loc(r1),r9 # Link (return) address
|
|
|
|
|
|
|
|
|
|
The link register is usally saved at fp_loc - 4. It may not be saved at
|
|
|
|
|
all in a leaf function.
|
|
|
|
|
|
|
|
|
|
l.sw reg_loc(r1),ry # Save any callee saved regs
|
|
|
|
|
|
|
|
|
|
The offsets x for the callee saved registers generally (always?) rise in
|
|
|
|
|
increments of 4, starting at fp_loc + 4. If the frame pointer is
|
|
|
|
|
omitted (an option to GCC), then it may not be saved at all. There may
|
|
|
|
|
be no callee saved registers.
|
|
|
|
|
|
|
|
|
|
So in summary none of this may be present. However what is present
|
|
|
|
|
seems always to follow this fixed order, and occur before any
|
|
|
|
|
substantive code (it is possible for GCC to have more flexible
|
|
|
|
|
scheduling of the prologue, but this does not seem to occur for OR1K).
|
|
|
|
|
|
|
|
|
|
ANALYSIS
|
|
|
|
|
========
|
|
|
|
|
|
|
|
|
|
This prolog is used, even for -O3 with GCC.
|
|
|
|
|
|
|
|
|
|
All this analysis must allow for the possibility that the PC is in the
|
|
|
|
|
middle of the prologue. Data in the cache should only be set up insofar
|
|
|
|
|
as it has been computed.
|
|
|
|
|
|
|
|
|
|
HOWEVER. The frame_id must be created with the SP *as it will be* at
|
|
|
|
|
the end of the Prologue. Otherwise a recursive call, checking the frame
|
|
|
|
|
with the PC at the start address will end up with the same frame_id as
|
|
|
|
|
the caller.
|
|
|
|
|
|
|
|
|
|
A suite of "helper" routines are used, allowing reuse for
|
|
|
|
|
or1k_skip_prologue().
|
|
|
|
|
|
|
|
|
|
Reportedly, this is only valid for frames less than 0x7fff in size. */
|
|
|
|
|
|
|
|
|
|
static struct trad_frame_cache *
|
|
|
|
|
or1k_frame_cache (struct frame_info *this_frame, void **prologue_cache)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch *gdbarch;
|
|
|
|
|
struct trad_frame_cache *info;
|
|
|
|
|
|
|
|
|
|
CORE_ADDR this_pc;
|
|
|
|
|
CORE_ADDR this_sp;
|
|
|
|
|
CORE_ADDR this_sp_for_id;
|
|
|
|
|
int frame_size = 0;
|
|
|
|
|
|
|
|
|
|
CORE_ADDR start_addr;
|
|
|
|
|
CORE_ADDR end_addr;
|
|
|
|
|
|
|
|
|
|
if (or1k_debug)
|
|
|
|
|
fprintf_unfiltered (gdb_stdlog,
|
2017-12-13 23:00:51 +08:00
|
|
|
|
"or1k_frame_cache, prologue_cache = %s\n",
|
|
|
|
|
host_address_to_string (*prologue_cache));
|
2017-12-09 04:57:25 +08:00
|
|
|
|
|
|
|
|
|
/* Nothing to do if we already have this info. */
|
|
|
|
|
if (NULL != *prologue_cache)
|
|
|
|
|
return (struct trad_frame_cache *) *prologue_cache;
|
|
|
|
|
|
|
|
|
|
/* Get a new prologue cache and populate it with default values. */
|
|
|
|
|
info = trad_frame_cache_zalloc (this_frame);
|
|
|
|
|
*prologue_cache = info;
|
|
|
|
|
|
|
|
|
|
/* Find the start address of this function (which is a normal frame, even
|
|
|
|
|
if the next frame is the sentinel frame) and the end of its prologue. */
|
|
|
|
|
this_pc = get_frame_pc (this_frame);
|
|
|
|
|
find_pc_partial_function (this_pc, NULL, &start_addr, NULL);
|
|
|
|
|
|
|
|
|
|
/* Get the stack pointer if we have one (if there's no process executing
|
|
|
|
|
yet we won't have a frame. */
|
|
|
|
|
this_sp = (NULL == this_frame) ? 0 :
|
|
|
|
|
get_frame_register_unsigned (this_frame, OR1K_SP_REGNUM);
|
|
|
|
|
|
|
|
|
|
/* Return early if GDB couldn't find the function. */
|
|
|
|
|
if (start_addr == 0)
|
|
|
|
|
{
|
|
|
|
|
if (or1k_debug)
|
|
|
|
|
fprintf_unfiltered (gdb_stdlog, " couldn't find function\n");
|
|
|
|
|
|
|
|
|
|
/* JPB: 28-Apr-11. This is a temporary patch, to get round GDB
|
|
|
|
|
crashing right at the beginning. Build the frame ID as best we
|
|
|
|
|
can. */
|
|
|
|
|
trad_frame_set_id (info, frame_id_build (this_sp, this_pc));
|
|
|
|
|
|
|
|
|
|
return info;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The default frame base of this frame (for ID purposes only - frame
|
|
|
|
|
base is an overloaded term) is its stack pointer. For now we use the
|
|
|
|
|
value of the SP register in this frame. However if the PC is in the
|
|
|
|
|
prologue of this frame, before the SP has been set up, then the value
|
|
|
|
|
will actually be that of the prev frame, and we'll need to adjust it
|
|
|
|
|
later. */
|
|
|
|
|
trad_frame_set_this_base (info, this_sp);
|
|
|
|
|
this_sp_for_id = this_sp;
|
|
|
|
|
|
|
|
|
|
/* The default is to find the PC of the previous frame in the link
|
|
|
|
|
register of this frame. This may be changed if we find the link
|
|
|
|
|
register was saved on the stack. */
|
|
|
|
|
trad_frame_set_reg_realreg (info, OR1K_NPC_REGNUM, OR1K_LR_REGNUM);
|
|
|
|
|
|
|
|
|
|
/* We should only examine code that is in the prologue. This is all code
|
|
|
|
|
up to (but not including) end_addr. We should only populate the cache
|
|
|
|
|
while the address is up to (but not including) the PC or end_addr,
|
|
|
|
|
whichever is first. */
|
|
|
|
|
gdbarch = get_frame_arch (this_frame);
|
|
|
|
|
end_addr = or1k_skip_prologue (gdbarch, start_addr);
|
|
|
|
|
|
|
|
|
|
/* All the following analysis only occurs if we are in the prologue and
|
|
|
|
|
have executed the code. Check we have a sane prologue size, and if
|
|
|
|
|
zero we are frameless and can give up here. */
|
|
|
|
|
if (end_addr < start_addr)
|
2017-12-17 06:20:51 +08:00
|
|
|
|
error (_("end addr %s is less than start addr %s"),
|
|
|
|
|
paddress (gdbarch, end_addr), paddress (gdbarch, start_addr));
|
2017-12-09 04:57:25 +08:00
|
|
|
|
|
|
|
|
|
if (end_addr == start_addr)
|
|
|
|
|
frame_size = 0;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* We have a frame. Look for the various components. */
|
|
|
|
|
CORE_ADDR addr = start_addr; /* Where we have got to */
|
|
|
|
|
uint32_t inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
|
|
|
|
|
unsigned int ra, rb, rd; /* for instruction analysis */
|
|
|
|
|
int simm;
|
|
|
|
|
|
|
|
|
|
/* Look for the new stack pointer being set up. */
|
|
|
|
|
if (or1k_analyse_l_addi (inst, &rd, &ra, &simm)
|
|
|
|
|
&& (OR1K_SP_REGNUM == rd) && (OR1K_SP_REGNUM == ra)
|
|
|
|
|
&& (simm < 0) && (0 == (simm % 4)))
|
|
|
|
|
{
|
|
|
|
|
frame_size = -simm;
|
|
|
|
|
addr += OR1K_INSTLEN;
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
|
|
|
|
|
/* If the PC has not actually got to this point, then the frame
|
|
|
|
|
base will be wrong, and we adjust it.
|
|
|
|
|
|
|
|
|
|
If we are past this point, then we need to populate the stack
|
|
|
|
|
accordingly. */
|
|
|
|
|
if (this_pc <= addr)
|
|
|
|
|
{
|
|
|
|
|
/* Only do if executing. */
|
|
|
|
|
if (0 != this_sp)
|
|
|
|
|
{
|
|
|
|
|
this_sp_for_id = this_sp + frame_size;
|
|
|
|
|
trad_frame_set_this_base (info, this_sp_for_id);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* We are past this point, so the stack pointer of the prev
|
|
|
|
|
frame is frame_size greater than the stack pointer of this
|
|
|
|
|
frame. */
|
|
|
|
|
trad_frame_set_reg_value (info, OR1K_SP_REGNUM,
|
|
|
|
|
this_sp + frame_size);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* From now on we are only populating the cache, so we stop once we
|
|
|
|
|
get to either the end OR the current PC. */
|
|
|
|
|
end_addr = (this_pc < end_addr) ? this_pc : end_addr;
|
|
|
|
|
|
|
|
|
|
/* Look for the frame pointer being manipulated. */
|
|
|
|
|
if ((addr < end_addr)
|
|
|
|
|
&& or1k_analyse_l_sw (inst, &simm, &ra, &rb)
|
|
|
|
|
&& (OR1K_SP_REGNUM == ra) && (OR1K_FP_REGNUM == rb)
|
|
|
|
|
&& (simm >= 0) && (0 == (simm % 4)))
|
|
|
|
|
{
|
|
|
|
|
addr += OR1K_INSTLEN;
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
|
|
|
|
|
/* At this stage, we can find the frame pointer of the previous
|
|
|
|
|
frame on the stack of the current frame. */
|
|
|
|
|
trad_frame_set_reg_addr (info, OR1K_FP_REGNUM, this_sp + simm);
|
|
|
|
|
|
|
|
|
|
/* Look for the new frame pointer being set up. */
|
|
|
|
|
if ((addr < end_addr)
|
|
|
|
|
&& or1k_analyse_l_addi (inst, &rd, &ra, &simm)
|
|
|
|
|
&& (OR1K_FP_REGNUM == rd) && (OR1K_SP_REGNUM == ra)
|
|
|
|
|
&& (simm == frame_size))
|
|
|
|
|
{
|
|
|
|
|
addr += OR1K_INSTLEN;
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
|
|
|
|
|
/* If we have got this far, the stack pointer of the previous
|
|
|
|
|
frame is the frame pointer of this frame. */
|
|
|
|
|
trad_frame_set_reg_realreg (info, OR1K_SP_REGNUM,
|
|
|
|
|
OR1K_FP_REGNUM);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Look for the link register being saved. */
|
|
|
|
|
if ((addr < end_addr)
|
|
|
|
|
&& or1k_analyse_l_sw (inst, &simm, &ra, &rb)
|
|
|
|
|
&& (OR1K_SP_REGNUM == ra) && (OR1K_LR_REGNUM == rb)
|
|
|
|
|
&& (simm >= 0) && (0 == (simm % 4)))
|
|
|
|
|
{
|
|
|
|
|
addr += OR1K_INSTLEN;
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
|
|
|
|
|
/* If the link register is saved in the this frame, it holds the
|
|
|
|
|
value of the PC in the previous frame. This overwrites the
|
|
|
|
|
previous information about finding the PC in the link
|
|
|
|
|
register. */
|
|
|
|
|
trad_frame_set_reg_addr (info, OR1K_NPC_REGNUM, this_sp + simm);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Look for arguments or callee-saved register being saved. The
|
|
|
|
|
register must be one of the arguments (r3-r8) or the 10 callee
|
|
|
|
|
saved registers (r10, r12, r14, r16, r18, r20, r22, r24, r26, r28,
|
|
|
|
|
r30). The base register must be the FP (for the args) or the SP
|
|
|
|
|
(for the callee_saved registers). */
|
|
|
|
|
while (addr < end_addr)
|
|
|
|
|
{
|
|
|
|
|
if (or1k_analyse_l_sw (inst, &simm, &ra, &rb)
|
|
|
|
|
&& (((OR1K_FP_REGNUM == ra) && or1k_is_arg_reg (rb))
|
|
|
|
|
|| ((OR1K_SP_REGNUM == ra)
|
|
|
|
|
&& or1k_is_callee_saved_reg (rb)))
|
|
|
|
|
&& (0 == (simm % 4)))
|
|
|
|
|
{
|
|
|
|
|
addr += OR1K_INSTLEN;
|
|
|
|
|
inst = or1k_fetch_instruction (gdbarch, addr);
|
|
|
|
|
|
|
|
|
|
/* The register in the previous frame can be found at this
|
|
|
|
|
location in this frame. */
|
|
|
|
|
trad_frame_set_reg_addr (info, rb, this_sp + simm);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
break; /* Not a register save instruction. */
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Build the frame ID */
|
|
|
|
|
trad_frame_set_id (info, frame_id_build (this_sp_for_id, start_addr));
|
|
|
|
|
|
|
|
|
|
if (or1k_debug)
|
|
|
|
|
{
|
2017-12-13 23:00:51 +08:00
|
|
|
|
fprintf_unfiltered (gdb_stdlog, " this_sp_for_id = %s\n",
|
|
|
|
|
paddress (gdbarch, this_sp_for_id));
|
|
|
|
|
fprintf_unfiltered (gdb_stdlog, " start_addr = %s\n",
|
|
|
|
|
paddress (gdbarch, start_addr));
|
2017-12-09 04:57:25 +08:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return info;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the this_id function for the stub unwinder. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
or1k_frame_this_id (struct frame_info *this_frame,
|
|
|
|
|
void **prologue_cache, struct frame_id *this_id)
|
|
|
|
|
{
|
|
|
|
|
struct trad_frame_cache *info = or1k_frame_cache (this_frame,
|
|
|
|
|
prologue_cache);
|
|
|
|
|
|
|
|
|
|
trad_frame_get_id (info, this_id);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the prev_register function for the stub unwinder. */
|
|
|
|
|
|
|
|
|
|
static struct value *
|
|
|
|
|
or1k_frame_prev_register (struct frame_info *this_frame,
|
|
|
|
|
void **prologue_cache, int regnum)
|
|
|
|
|
{
|
|
|
|
|
struct trad_frame_cache *info = or1k_frame_cache (this_frame,
|
|
|
|
|
prologue_cache);
|
|
|
|
|
|
|
|
|
|
return trad_frame_get_register (info, this_frame, regnum);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Data structures for the normal prologue-analysis-based unwinder. */
|
|
|
|
|
|
|
|
|
|
static const struct frame_unwind or1k_frame_unwind = {
|
|
|
|
|
NORMAL_FRAME,
|
|
|
|
|
default_frame_unwind_stop_reason,
|
|
|
|
|
or1k_frame_this_id,
|
|
|
|
|
or1k_frame_prev_register,
|
|
|
|
|
NULL,
|
|
|
|
|
default_frame_sniffer,
|
|
|
|
|
NULL,
|
|
|
|
|
};
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|
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|
|
/* Architecture initialization for OpenRISC 1000. */
|
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|
|
static struct gdbarch *
|
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|
or1k_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
|
|
|
{
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|
|
struct gdbarch *gdbarch;
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|
|
struct gdbarch_tdep *tdep;
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|
|
const struct bfd_arch_info *binfo;
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|
struct tdesc_arch_data *tdesc_data = NULL;
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|
|
const struct target_desc *tdesc = info.target_desc;
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|
|
/* Find a candidate among the list of pre-declared architectures. */
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arches = gdbarch_list_lookup_by_info (arches, &info);
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if (NULL != arches)
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|
return arches->gdbarch;
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|
/* None found, create a new architecture from the information
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|
|
provided. Can't initialize all the target dependencies until we
|
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|
|
actually know which target we are talking to, but put in some defaults
|
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|
|
for now. */
|
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|
|
binfo = info.bfd_arch_info;
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tdep = XCNEW (struct gdbarch_tdep);
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|
tdep->bytes_per_word = binfo->bits_per_word / binfo->bits_per_byte;
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|
tdep->bytes_per_address = binfo->bits_per_address / binfo->bits_per_byte;
|
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|
gdbarch = gdbarch_alloc (&info, tdep);
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|
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|
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|
|
/* Target data types */
|
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|
|
|
set_gdbarch_short_bit (gdbarch, 16);
|
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|
|
|
set_gdbarch_int_bit (gdbarch, 32);
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|
|
set_gdbarch_long_bit (gdbarch, 32);
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|
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
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|
|
|
set_gdbarch_float_bit (gdbarch, 32);
|
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|
|
set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
|
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|
|
set_gdbarch_double_bit (gdbarch, 64);
|
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|
|
|
set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
|
|
|
|
|
set_gdbarch_long_double_bit (gdbarch, 64);
|
|
|
|
|
set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
|
|
|
|
|
set_gdbarch_ptr_bit (gdbarch, binfo->bits_per_address);
|
|
|
|
|
set_gdbarch_addr_bit (gdbarch, binfo->bits_per_address);
|
|
|
|
|
set_gdbarch_char_signed (gdbarch, 1);
|
|
|
|
|
|
|
|
|
|
/* Information about the target architecture */
|
|
|
|
|
set_gdbarch_return_value (gdbarch, or1k_return_value);
|
|
|
|
|
set_gdbarch_breakpoint_kind_from_pc (gdbarch,
|
|
|
|
|
or1k_breakpoint::kind_from_pc);
|
|
|
|
|
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
|
|
|
|
|
or1k_breakpoint::bp_from_kind);
|
|
|
|
|
set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
|
|
|
|
|
|
|
|
|
|
/* Register architecture */
|
|
|
|
|
set_gdbarch_num_regs (gdbarch, OR1K_NUM_REGS);
|
|
|
|
|
set_gdbarch_num_pseudo_regs (gdbarch, OR1K_NUM_PSEUDO_REGS);
|
|
|
|
|
set_gdbarch_sp_regnum (gdbarch, OR1K_SP_REGNUM);
|
|
|
|
|
set_gdbarch_pc_regnum (gdbarch, OR1K_NPC_REGNUM);
|
|
|
|
|
set_gdbarch_ps_regnum (gdbarch, OR1K_SR_REGNUM);
|
|
|
|
|
set_gdbarch_deprecated_fp_regnum (gdbarch, OR1K_FP_REGNUM);
|
|
|
|
|
|
|
|
|
|
/* Functions to analyse frames */
|
|
|
|
|
set_gdbarch_skip_prologue (gdbarch, or1k_skip_prologue);
|
|
|
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
|
|
|
|
set_gdbarch_frame_align (gdbarch, or1k_frame_align);
|
|
|
|
|
set_gdbarch_frame_red_zone_size (gdbarch, OR1K_FRAME_RED_ZONE_SIZE);
|
|
|
|
|
|
|
|
|
|
/* Functions to access frame data */
|
|
|
|
|
set_gdbarch_unwind_pc (gdbarch, or1k_unwind_pc);
|
|
|
|
|
set_gdbarch_unwind_sp (gdbarch, or1k_unwind_sp);
|
|
|
|
|
|
|
|
|
|
/* Functions handling dummy frames */
|
|
|
|
|
set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
|
|
|
|
|
set_gdbarch_push_dummy_code (gdbarch, or1k_push_dummy_code);
|
|
|
|
|
set_gdbarch_push_dummy_call (gdbarch, or1k_push_dummy_call);
|
|
|
|
|
|
|
|
|
|
/* Frame unwinders. Use DWARF debug info if available, otherwise use our
|
|
|
|
|
own unwinder. */
|
|
|
|
|
dwarf2_append_unwinders (gdbarch);
|
|
|
|
|
frame_unwind_append_unwinder (gdbarch, &or1k_frame_unwind);
|
|
|
|
|
|
|
|
|
|
/* Get a CGEN CPU descriptor for this architecture. */
|
|
|
|
|
{
|
|
|
|
|
|
|
|
|
|
const char *mach_name = binfo->printable_name;
|
|
|
|
|
enum cgen_endian endian = (info.byte_order == BFD_ENDIAN_BIG
|
|
|
|
|
? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE);
|
|
|
|
|
|
|
|
|
|
tdep->gdb_cgen_cpu_desc =
|
|
|
|
|
or1k_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
|
|
|
|
|
CGEN_CPU_OPEN_ENDIAN, endian, CGEN_CPU_OPEN_END);
|
|
|
|
|
|
|
|
|
|
or1k_cgen_init_asm (tdep->gdb_cgen_cpu_desc);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* If this mach has a delay slot. */
|
|
|
|
|
if (binfo->mach == bfd_mach_or1k)
|
|
|
|
|
set_gdbarch_single_step_through_delay (gdbarch,
|
|
|
|
|
or1k_single_step_through_delay);
|
|
|
|
|
|
|
|
|
|
if (!tdesc_has_registers (info.target_desc))
|
|
|
|
|
/* Pick a default target description. */
|
|
|
|
|
tdesc = tdesc_or1k;
|
|
|
|
|
|
|
|
|
|
/* Check any target description for validity. */
|
|
|
|
|
if (tdesc_has_registers (tdesc))
|
|
|
|
|
{
|
|
|
|
|
const struct tdesc_feature *feature;
|
|
|
|
|
int valid_p;
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
feature = tdesc_find_feature (tdesc, "org.gnu.gdb.or1k.group0");
|
|
|
|
|
if (feature == NULL)
|
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
|
|
tdesc_data = tdesc_data_alloc ();
|
|
|
|
|
|
|
|
|
|
valid_p = 1;
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < OR1K_NUM_REGS; i++)
|
|
|
|
|
valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
|
|
|
|
|
or1k_reg_names[i]);
|
|
|
|
|
|
|
|
|
|
if (!valid_p)
|
|
|
|
|
{
|
|
|
|
|
tdesc_data_cleanup (tdesc_data);
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (tdesc_data != NULL)
|
|
|
|
|
{
|
|
|
|
|
/* If we are using tdesc, register our own reggroups, otherwise we
|
|
|
|
|
will used the defaults. */
|
|
|
|
|
reggroup_add (gdbarch, general_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, system_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, float_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, vector_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, all_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, save_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, restore_reggroup);
|
|
|
|
|
|
|
|
|
|
tdesc_use_registers (gdbarch, tdesc, tdesc_data);
|
|
|
|
|
}
|
|
|
|
|
|
2018-12-08 06:01:40 +08:00
|
|
|
|
/* Hook in ABI-specific overrides, if they have been registered. */
|
|
|
|
|
gdbarch_init_osabi (info, gdbarch);
|
|
|
|
|
|
2017-12-09 04:57:25 +08:00
|
|
|
|
return gdbarch;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Dump the target specific data for this architecture. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
or1k_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (NULL == tdep)
|
|
|
|
|
return; /* Nothing to report */
|
|
|
|
|
|
|
|
|
|
fprintf_unfiltered (file, "or1k_dump_tdep: %d bytes per word\n",
|
|
|
|
|
tdep->bytes_per_word);
|
|
|
|
|
fprintf_unfiltered (file, "or1k_dump_tdep: %d bytes per address\n",
|
|
|
|
|
tdep->bytes_per_address);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
_initialize_or1k_tdep (void)
|
|
|
|
|
{
|
|
|
|
|
/* Register this architecture. */
|
|
|
|
|
gdbarch_register (bfd_arch_or1k, or1k_gdbarch_init, or1k_dump_tdep);
|
|
|
|
|
|
|
|
|
|
initialize_tdesc_or1k ();
|
|
|
|
|
|
|
|
|
|
/* Debugging flag. */
|
|
|
|
|
add_setshow_boolean_cmd ("or1k", class_maintenance, &or1k_debug,
|
|
|
|
|
_("Set OpenRISC debugging."),
|
|
|
|
|
_("Show OpenRISC debugging."),
|
|
|
|
|
_("When on, OpenRISC specific debugging is enabled."),
|
|
|
|
|
NULL,
|
|
|
|
|
show_or1k_debug,
|
|
|
|
|
&setdebuglist, &showdebuglist);
|
|
|
|
|
}
|