1999-05-03 15:29:11 +08:00
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/* BFD library support routines for architectures.
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2001-03-09 05:04:02 +08:00
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Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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2011-06-04 12:07:54 +08:00
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2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
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bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.
bfd:
* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
(bfd_mach_sh3_dsp): Likewise.
(bfd_mach_sh4): Reinstate.
(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
* bfd-in2.h: Regenerate.
* coff-sh.c (struct sh_opcode): flags is no longer short.
(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
(sh_opcodes): No longer const.
(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
(sh_insn_uses_reg): Check for USESAS and USESR8.
(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
(_bfd_sh_align_load_span): Return early for SH4.
Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
Take into account that field b of a parallel processing insn
could be mistaken for a separate insn.
* cpu-sh.c (arch_info_struct): New array elements for
sh2, sh-dsp and sh3-dsp.
Reinstate element for sh4.
(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
(SH4_NEXT): Reinstate.
(SH3_NEXT, SH3E_NEXT): Adjust.
* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
* elf32-sh.c (sh_elf_set_private_flags): New function.
(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
(sh_elf_merge_private_data): New function.
(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
(bfd_elf32_bfd_merge_private_bfd_data): Change to
sh_elf_merge_private_data.
gas:
* config/tc-sh.c ("elf/sh.h"): Include.
(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
(md.begin): Initialize target_arch.
Only include opcodes in has table that match selected architecture.
(parse_reg): Recognize register names for sh-dsp.
(parse_at): Recognize post-modify addressing.
(get_operands): The leading space is now optional.
(get_specific): Remove FDREG_N support. Add support for sh-dsp
arguments. Update valid_arch.
(build_Mytes): Add support for SDT_REG_N.
(find_cooked_opcode): New function, broken out of md_assemble.
(assemble_ppi, sh_elf_final_processing): New functions.
(md_assemble): Use find_cooked_opcode and assemble_ppi.
(md_longopts, md_parse_option): New option: -dsp.
* config/tc-sh.h (elf_tc_final_processing): Define.
(sh_elf_final_processing): Declare.
include/elf:
* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.
opcodes:
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 08:33:36 +08:00
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Free Software Foundation, Inc.
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1999-05-03 15:29:11 +08:00
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Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
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2002-11-06 21:26:29 +08:00
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This file is part of BFD, the Binary File Descriptor library.
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1999-05-03 15:29:11 +08:00
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2002-11-06 21:26:29 +08:00
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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2007-07-03 22:26:43 +08:00
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the Free Software Foundation; either version 3 of the License, or
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2002-11-06 21:26:29 +08:00
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(at your option) any later version.
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1999-05-03 15:29:11 +08:00
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2002-11-06 21:26:29 +08:00
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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1999-05-03 15:29:11 +08:00
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2002-11-06 21:26:29 +08:00
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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2007-07-03 22:26:43 +08:00
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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1999-05-03 15:29:11 +08:00
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#include "sysdep.h"
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2007-04-26 22:47:00 +08:00
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#include "bfd.h"
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1999-05-03 15:29:11 +08:00
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#include "libbfd.h"
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2001-09-19 13:33:36 +08:00
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#include "safe-ctype.h"
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1999-05-03 15:29:11 +08:00
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/*
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SECTION
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Architectures
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BFD keeps one atom in a BFD describing the
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architecture of the data attached to the BFD: a pointer to a
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2000-11-08 03:11:31 +08:00
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<<bfd_arch_info_type>>.
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1999-05-03 15:29:11 +08:00
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Pointers to structures can be requested independently of a BFD
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so that an architecture's information can be interrogated
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without access to an open BFD.
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The architecture information is provided by each architecture package.
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The set of default architectures is selected by the macro
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<<SELECT_ARCHITECTURES>>. This is normally set up in the
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@file{config/@var{target}.mt} file of your choice. If the name is not
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2000-11-08 03:11:31 +08:00
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defined, then all the architectures supported are included.
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1999-05-03 15:29:11 +08:00
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When BFD starts up, all the architectures are called with an
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initialize method. It is up to the architecture back end to
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insert as many items into the list of architectures as it wants to;
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generally this would be one for each machine and one for the
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2000-11-08 03:11:31 +08:00
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default case (an item with a machine field of 0).
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1999-05-03 15:29:11 +08:00
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BFD's idea of an architecture is implemented in @file{archures.c}.
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*/
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/*
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SUBSECTION
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bfd_architecture
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DESCRIPTION
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This enum gives the object file's CPU architecture, in a
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global sense---i.e., what processor family does it belong to?
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Another field indicates which processor within
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the family is in use. The machine gives a number which
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distinguishes different versions of the architecture,
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containing, for example, 2 and 3 for Intel i960 KA and i960 KB,
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2000-11-08 03:11:31 +08:00
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and 68020 and 68030 for Motorola 68020 and 68030.
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1999-05-03 15:29:11 +08:00
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2000-11-08 03:11:31 +08:00
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.enum bfd_architecture
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1999-05-03 15:29:11 +08:00
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.{
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2002-01-31 17:24:16 +08:00
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. bfd_arch_unknown, {* File arch not known. *}
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. bfd_arch_obscure, {* Arch known, not one of these. *}
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1999-05-03 15:29:11 +08:00
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. bfd_arch_m68k, {* Motorola 68xxx *}
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.#define bfd_mach_m68000 1
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.#define bfd_mach_m68008 2
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.#define bfd_mach_m68010 3
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.#define bfd_mach_m68020 4
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.#define bfd_mach_m68030 5
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.#define bfd_mach_m68040 6
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.#define bfd_mach_m68060 7
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.#define bfd_mach_cpu32 8
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2007-01-09 02:42:37 +08:00
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.#define bfd_mach_fido 9
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bfd/
* archures.c (bfd_mach_cpu32_fido): New.
(bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_a,
bfd_mach_mcf_isa_a_mac, bfd_mach_mcf_isa_a_emac,
bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_b_nousp,
bfd_mach_mcf_isa_b_nousp_mac, bfd_mach_mcf_isa_b_nousp_emac,
bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac,
bfd_mach_mcf_isa_b_emac, bfd_mach_mcf_isa_b_float,
bfd_mach_mcf_isa_b_float_mac, bfd_mach_mcf_isa_b_float_emac):
Increment the defined values.
* bfd-in2.h: Regenerate.
* cpu-m68k.c (arch_info_struct): Add en entry for
bfd_mach_cpu32_fido.
* elf32-m68k.c (elf32_m68k_object_p): Handle
EF_M68K_CPU32_FIDO_A.
(elf32_m68k_merge_private_bfd_data): Use EF_M68K_CPU32_MASK.
(elf32_m68k_print_private_bfd_data): Handle
EF_M68K_CPU32_FIDO_A.
binutils/
* readelf.c (get_machine_flags): Handle EF_M68K_CPU32_FIDO_A.
gas/
* config/tc-m68k.c (cpu_of_arch): Add fido.
(m68k_archs, m68k_cpu): Add entries for fido.
(m68k_elf_final_processing): Handle EF_M68K_CPU32_FIDO_A.
include/elf/
* m68k.h (EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): New.
include/opcode/
* m68k.h (fido_a): New.
2006-12-26 06:39:21 +08:00
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.#define bfd_mach_mcf_isa_a_nodiv 10
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.#define bfd_mach_mcf_isa_a 11
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.#define bfd_mach_mcf_isa_a_mac 12
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.#define bfd_mach_mcf_isa_a_emac 13
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.#define bfd_mach_mcf_isa_aplus 14
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.#define bfd_mach_mcf_isa_aplus_mac 15
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.#define bfd_mach_mcf_isa_aplus_emac 16
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.#define bfd_mach_mcf_isa_b_nousp 17
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.#define bfd_mach_mcf_isa_b_nousp_mac 18
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.#define bfd_mach_mcf_isa_b_nousp_emac 19
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.#define bfd_mach_mcf_isa_b 20
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.#define bfd_mach_mcf_isa_b_mac 21
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.#define bfd_mach_mcf_isa_b_emac 22
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.#define bfd_mach_mcf_isa_b_float 23
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.#define bfd_mach_mcf_isa_b_float_mac 24
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.#define bfd_mach_mcf_isa_b_float_emac 25
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gas/testsuite/
* gas/m68k/br-isaa.s: New.
* gas/m68k/br-isaa.d: New.
* gas/m68k/br-isab.s: New.
* gas/m68k/br-isab.d: New.
* gas/m68k/br-isac.s: New.
* gas/m68k/br-isac.d: New.
* gas/m68k/all.exp: Adjust.
gas/
* config/tc-m68k.c (mcf54455_ctrl): New.
(HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New.
(m68k_archs): Add isac.
(m68k_cpus): Add 54455 family.
(m68k_ip): Split Bg into Bb, Bs, Bg.
(m68k_elf_final_processing): Add ISA_C.
* doc/c-m68k.texi (M680x0 Options): Add isac.
include/opcode/
* m68k.h (mcfisa_c): New.
(mcfusp, mcf_mask): Adjust.
bfd/
* archures.c (bfd_mach_mcf_isa_c, bfd_mach_mcf_isa_c_mac,
bfd_mach_mcf_isa_c_emac): New.
* elf32-m68k.c (ISAC_PLT_ENTRY_SIZE, elf_isac_plt0_entry,
elf_isac_plt_entry, elf_isac_plt_info): New.
(elf32_m68k_object_p): Add ISA_C.
(elf32_m68k_print_private_bfd_data): Print ISA_C.
(elf32_m68k_get_plt_info): Detect ISA_C.
* cpu-m68k.c (arch_info): Add ISAC.
(m68k_arch_features): Likewise,
(bfd_m68k_compatible): ISAs B & C are not compatible.
opcodes/
* m68k-opc.c: Mark mcfisa_c instructions.
2007-04-23 15:51:33 +08:00
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.#define bfd_mach_mcf_isa_c 26
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.#define bfd_mach_mcf_isa_c_mac 27
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.#define bfd_mach_mcf_isa_c_emac 28
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2007-09-12 00:07:50 +08:00
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.#define bfd_mach_mcf_isa_c_nodiv 29
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.#define bfd_mach_mcf_isa_c_nodiv_mac 30
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.#define bfd_mach_mcf_isa_c_nodiv_emac 31
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2000-11-08 03:11:31 +08:00
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. bfd_arch_vax, {* DEC Vax *}
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1999-05-03 15:29:11 +08:00
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. bfd_arch_i960, {* Intel 960 *}
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. {* The order of the following is important.
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2000-11-08 03:11:31 +08:00
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. lower number indicates a machine type that
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1999-05-03 15:29:11 +08:00
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. only accepts a subset of the instructions
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. available to machines with higher numbers.
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. The exception is the "ca", which is
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2000-11-08 03:11:31 +08:00
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. incompatible with all other machines except
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2002-01-31 17:24:16 +08:00
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. "core". *}
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1999-05-03 15:29:11 +08:00
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.
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.#define bfd_mach_i960_core 1
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.#define bfd_mach_i960_ka_sa 2
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.#define bfd_mach_i960_kb_sb 3
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.#define bfd_mach_i960_mc 4
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.#define bfd_mach_i960_xa 5
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.#define bfd_mach_i960_ca 6
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.#define bfd_mach_i960_jx 7
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.#define bfd_mach_i960_hx 8
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.
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2002-02-01 01:33:08 +08:00
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. bfd_arch_or32, {* OpenRISC 32 *}
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.
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1999-05-03 15:29:11 +08:00
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. bfd_arch_sparc, {* SPARC *}
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.#define bfd_mach_sparc 1
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.{* The difference between v8plus and v9 is that v9 is a true 64 bit env. *}
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.#define bfd_mach_sparc_sparclet 2
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.#define bfd_mach_sparc_sparclite 3
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.#define bfd_mach_sparc_v8plus 4
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2002-01-31 17:24:16 +08:00
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.#define bfd_mach_sparc_v8plusa 5 {* with ultrasparc add'ns. *}
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1999-05-03 15:29:11 +08:00
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.#define bfd_mach_sparc_sparclite_le 6
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.#define bfd_mach_sparc_v9 7
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2002-01-31 17:24:16 +08:00
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.#define bfd_mach_sparc_v9a 8 {* with ultrasparc add'ns. *}
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.#define bfd_mach_sparc_v8plusb 9 {* with cheetah add'ns. *}
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.#define bfd_mach_sparc_v9b 10 {* with cheetah add'ns. *}
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1999-05-03 15:29:11 +08:00
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.{* Nonzero if MACH has the v9 instruction set. *}
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.#define bfd_mach_sparc_v9_p(mach) \
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2000-10-20 18:38:47 +08:00
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. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
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. && (mach) != bfd_mach_sparc_sparclite_le)
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2004-07-30 18:08:00 +08:00
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.{* Nonzero if MACH is a 64 bit sparc architecture. *}
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.#define bfd_mach_sparc_64bit_p(mach) \
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. ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
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2006-10-25 14:49:21 +08:00
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. bfd_arch_spu, {* PowerPC SPU *}
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.#define bfd_mach_spu 256
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1999-05-03 15:29:11 +08:00
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. bfd_arch_mips, {* MIPS Rxxxx *}
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.#define bfd_mach_mips3000 3000
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.#define bfd_mach_mips3900 3900
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.#define bfd_mach_mips4000 4000
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.#define bfd_mach_mips4010 4010
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.#define bfd_mach_mips4100 4100
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.#define bfd_mach_mips4111 4111
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2002-09-30 19:53:56 +08:00
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.#define bfd_mach_mips4120 4120
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1999-05-03 15:29:11 +08:00
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.#define bfd_mach_mips4300 4300
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.#define bfd_mach_mips4400 4400
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.#define bfd_mach_mips4600 4600
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.#define bfd_mach_mips4650 4650
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.#define bfd_mach_mips5000 5000
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2002-09-30 19:53:56 +08:00
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.#define bfd_mach_mips5400 5400
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.#define bfd_mach_mips5500 5500
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1999-05-03 15:29:11 +08:00
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.#define bfd_mach_mips6000 6000
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2003-07-15 15:50:39 +08:00
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.#define bfd_mach_mips7000 7000
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1999-05-03 15:29:11 +08:00
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.#define bfd_mach_mips8000 8000
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2004-12-09 14:08:45 +08:00
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.#define bfd_mach_mips9000 9000
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1999-05-03 15:29:11 +08:00
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.#define bfd_mach_mips10000 10000
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2001-05-24 01:26:40 +08:00
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.#define bfd_mach_mips12000 12000
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* aoutx.h (NAME): Add case statements for bfd_mach_mips14000,
bfd_mach_mips16000.
* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
bfd_mach_mips16000.
* bfd-in2.h: Regenerate.
* cpu-mips.c: Add enums I_mips14000, I_mips16000.
(arch_info_struct): Add refs to R14000, R16000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
bfd_mach_mips16000.
(mips_mach_extensions): Map R14000, R16000 to R10000.
* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
(mips_cpu_info_table): Add r14000, r16000.
* doc/c-mips.texi: Add entries for 14000, 16000.
* mips-dis.c (mips_arch_choices): Add r14000, r16000.
* mips.h: Define CPU_R14000, CPU_R16000.
(OPCODE_IS_MEMBER): Include R14000, R16000 in test.
2008-11-29 02:02:17 +08:00
|
|
|
.#define bfd_mach_mips14000 14000
|
|
|
|
.#define bfd_mach_mips16000 16000
|
1999-05-03 15:29:11 +08:00
|
|
|
.#define bfd_mach_mips16 16
|
2000-12-02 08:55:22 +08:00
|
|
|
.#define bfd_mach_mips5 5
|
2007-11-29 20:23:44 +08:00
|
|
|
.#define bfd_mach_mips_loongson_2e 3001
|
|
|
|
.#define bfd_mach_mips_loongson_2f 3002
|
2010-11-11 18:23:39 +08:00
|
|
|
.#define bfd_mach_mips_loongson_3a 3003
|
2000-12-02 09:10:33 +08:00
|
|
|
.#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *}
|
2008-02-05 03:15:52 +08:00
|
|
|
.#define bfd_mach_mips_octeon 6501
|
2011-11-30 04:28:55 +08:00
|
|
|
.#define bfd_mach_mips_octeonp 6601
|
bfd:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* aoutx.h (NAME (aout, machine_type)): Handle bfd_mach_mips_xlr.
* archures.c (bfd_mach_mips_xlr): Define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_xlr): Define.
(arch_info_struct): Add XLR entry.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_XLR.
(mips_set_isa_flags): Handle bfd_mach_mips_xlr
(mips_mach_extensions): Add XLR entry.
binutils:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* readelf.c (get_machine_flags): Handle E_MIPS_MACH_XLR.
gas:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* config/tc-mips.c (macro): Handle M_MSGSND, M_MSGLD, M_MSGLD_T,
M_MSGWAIT and M_MSGWAIT_T.
(mips_cpu_info_table): Add XLR entry.
* doc/c-mips.texi (-march): Document xlr.
gas/testsuite:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* gas/mips/mips.exp (xlr): New architecture.
(xlr-ext): Run test.
* gas/mips/xlr-ext.d, gas/mips/xlr-ext.s: New.
include/elf:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips.h (E_MIPS_MACH_XLR): Define.
include/opcode:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips.h (INSN_XLR): Define.
(INSN_CHIP_MASK): Update.
(CPU_XLR): Define.
(OPCODE_IS_MEMBER): Update.
(M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.
opcodes:
2009-02-03 Sandip Matte <sandip@rmicorp.com>
* mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
(mips_arch_choices): Add XLR entry.
* mips-opc.c (XLR): Define.
(mips_builtin_opcodes): Add XLR instructions.
2009-02-04 02:16:04 +08:00
|
|
|
.#define bfd_mach_mips_xlr 887682 {* decimal 'XLR' *}
|
2001-09-01 05:24:28 +08:00
|
|
|
.#define bfd_mach_mipsisa32 32
|
[ bfd/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.
[ binutils/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.
[ gas/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry. Run new tests mentioned above.
[ include/elf/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_32R2): New define.
[ include/opcode/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.
[ opcodes/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
2002-12-31 15:29:29 +08:00
|
|
|
.#define bfd_mach_mipsisa32r2 33
|
2001-09-01 05:24:28 +08:00
|
|
|
.#define bfd_mach_mipsisa64 64
|
[ bfd/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* archures.c (bfd_mach_mipsisa64r2): New define.
* bfd-in2.h: Regenerate.
* aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2.
* cpu-mips.c (I_mipsisa64r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa64r2.
* elfxx-mips.c (_bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2.
(mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case.
(mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2.
[ binutils/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2.
[ gas/Changelog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs.
* configure: Regenerate.
* config/tc-mips.c (imm2_expr): New variable.
(md_assemble, mips16_ip): Initialize imm2_expr.
(ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2.
(macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands.
(macro): Handle M_DEXT and M_DINS.
(validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands.
(mips_ip): Likewise.
(OPTION_MIPS64R2): New define.
(md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2).
OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2.
(md_parse_option): Handle OPTION_MIPS64R2.
(s_mipsset): Handle setting "mips64r2" ISA.
(mips_cpu_info_table): Add mips64r2.
(md_show_usage): Document -mips64r2 option.
* doc/as.texinfo: Docuemnt -mips64r2 option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips64r2.d: New file.
* gas/mips/cp0sel-names-mips64r2.d: New file.
* gas/mips/elf_arch_mips64r2.d: New file.
* gas/mips/hwr-names-mips64r2.d: New file.
* gas/mips/mips32r2-ill-fp64.l: New file.
* gas/mips/mips32r2-ill-fp64.s: New file.
* gas/mips/mips64r2-ill.l: New file.
* gas/mips/mips64r2-ill.s: New file.
* gas/mips/mips64r2.d: New file.
* gas/mips/mips64r2.s: New file.
* gas/mips/mips.exp: Define "mips64r2" arch, and run new tests.
[ include/elf/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_64R2): New define.
[ include/opcode/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document +E, +F, +G, +H, and +I operand types.
Update documentation of I, +B and +C operand types.
(INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
(M_DEXT, M_DINS): New enum values.
[ ld/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* ldmain.c (get_emulation): Ignore "-mips64r2".
[ ld/testsuite/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* ld-mips-elf/mips-elf-flags.exp: Add tests for combinations
with MIPS64r2.
[ opcodes/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
(print_insn_args): Add handing for +E, +F, +G, and +H.
* mips-opc.c (I65): New define for MIPS64r2.
(mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
"dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to
be supported on MIPS64r2.
2003-10-01 00:17:15 +08:00
|
|
|
.#define bfd_mach_mipsisa64r2 65
|
bfd/
2011-02-25 Chao-ying Fu <fu@mips.com>
Ilie Garbacea <ilie@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* archures.c (bfd_mach_mips_micromips): New macro.
* cpu-mips.c (I_micromips): New enum value.
(arch_info_struct): Add bfd_mach_mips_micromips.
* elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New
prototype.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(gprel16_reloc_p): Handle microMIPS ASE.
(literal_reloc_p): New function.
* elf32-mips.c (elf_micromips_howto_table_rel): New variable.
(_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(mips_elf_gprel32_reloc): Update comment.
(micromips_reloc_map): New variable.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(mips_elf32_rtype_to_howto): Likewise.
(mips_info_to_howto_rel): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
(bfd_elf32_bfd_relax_section): Likewise.
* elf64-mips.c (micromips_elf64_howto_table_rel): New variable.
(micromips_elf64_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf64_bfd_reloc_name_lookup): Likewise.
(mips_elf64_rtype_to_howto): Likewise.
(bfd_elf64_bfd_is_target_special_symbol): Define.
* elfn32-mips.c (elf_micromips_howto_table_rel): New variable.
(elf_micromips_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(mips_elf_n32_rtype_to_howto): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
* elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro.
(LA25_LUI_MICROMIPS_2): Likewise.
(LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise.
(LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise.
(TLS_RELOC_P): Handle microMIPS ASE.
(mips_elf_create_stub_symbol): Adjust value of stub symbol if
target is a microMIPS function.
(micromips_reloc_p): New function.
(micromips_reloc_shuffle_p): Likewise.
(got16_reloc_p, call16_reloc_p): Handle microMIPS ASE.
(got_disp_reloc_p, got_page_reloc_p): New functions.
(got_ofst_reloc_p): Likewise.
(got_hi16_reloc_p, got_lo16_reloc_p): Likewise.
(call_hi16_reloc_p, call_lo16_reloc_p): Likewise.
(hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE.
(micromips_branch_reloc_p): New function.
(tls_gd_reloc_p, tls_ldm_reloc_p): Likewise.
(tls_gottprel_reloc_p): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE.
(mips_tls_got_index, mips_elf_got_page): Likewise.
(mips_elf_create_local_got_entry): Likewise.
(mips_elf_relocation_needs_la25_stub): Likewise.
(mips_elf_calculate_relocation): Likewise.
(mips_elf_perform_relocation): Likewise.
(_bfd_mips_elf_symbol_processing): Likewise.
(_bfd_mips_elf_add_symbol_hook): Likewise.
(_bfd_mips_elf_link_output_symbol_hook): Likewise.
(mips_elf_add_lo16_rel_addend): Likewise.
(_bfd_mips_elf_check_relocs): Likewise.
(mips_elf_adjust_addend): Likewise.
(_bfd_mips_elf_relocate_section): Likewise.
(mips_elf_create_la25_stub): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_elf_gc_sweep_hook): Likewise.
(_bfd_mips_elf_is_target_special_symbol): New function.
(mips_elf_relax_delete_bytes): Likewise.
(opcode_descriptor): New structure.
(RA): New macro.
(OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise.
(b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables.
(beq_insn_32): Likewise.
(b_insn_16, bz_insn_16): New variables.
(BZC32_REG_FIELD): New macro.
(bz_rs_insns_32, bz_rt_insns_32): New variables.
(bzc_insns_32, bz_insns_16):Likewise.
(BZ16_REG, BZ16_REG_FIELD): New macros.
(jal_insn_32_bd16, jal_insn_32_bd32): New variables.
(jal_x_insn_32_bd32): Likewise.
(j_insn_32, jalr_insn_32): Likewise.
(ds_insns_32_bd16, ds_insns_32_bd32): Likewise.
(jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise.
(JR16_REG): New macro.
(ds_insns_16_bd16): New variable.
(lui_insn): Likewise.
(addiu_insn, addiupc_insn): Likewise.
(ADDIUPC_REG_FIELD): New macro.
(MOVE32_RD, MOVE32_RS): Likewise.
(MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise.
(move_insns_32, move_insns_16): New variables.
(nop_insn_32, nop_insn_16): Likewise.
(MATCH): New macro.
(find_match): New function.
(check_br16_dslot, check_br32_dslot): Likewise.
(check_br16, check_br32): Likewise.
(IS_BITSIZE): New macro.
(check_4byte_branch): New function.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16
and microMIPS modules together.
(_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE.
* reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation.
(BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_GPREL16): Likewise.
(BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise.
(BFD_RELOC_MICROMIPS_HI16_S): Likewise.
(BFD_RELOC_MICROMIPS_LO16): Likewise.
(BFD_RELOC_MICROMIPS_LITERAL): Likewise.
(BFD_RELOC_MICROMIPS_GOT16): Likewise.
(BFD_RELOC_MICROMIPS_CALL16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_HI16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_LO16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_SUB): Likewise.
(BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise.
(BFD_RELOC_MICROMIPS_GOT_OFST): Likewise.
(BFD_RELOC_MICROMIPS_GOT_DISP): Likewise.
(BFD_RELOC_MICROMIPS_HIGHEST): Likewise.
(BFD_RELOC_MICROMIPS_HIGHER): Likewise.
(BFD_RELOC_MICROMIPS_SCN_DISP): Likewise.
(BFD_RELOC_MICROMIPS_JALR): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GD): Likewise.
(BFD_RELOC_MICROMIPS_TLS_LDM): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
binutils/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* readelf.c (get_machine_flags): Handle microMIPS ASE.
(get_mips_symbol_other): Likewise.
gas/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.h (mips_segment_info): Add one bit for
microMIPS.
(TC_LABEL_IS_LOCAL): New macro.
(mips_label_is_local): New prototype.
* config/tc-mips.c (S0, S7): New macros.
(emit_branch_likely_macro): New variable.
(mips_set_options): Add micromips.
(mips_opts): Initialise micromips to -1.
(file_ase_micromips): New variable.
(CPU_HAS_MICROMIPS): New macro.
(hilo_interlocks): Set for microMIPS too.
(gpr_interlocks): Likewise.
(cop_interlocks): Likewise.
(cop_mem_interlocks): Likewise.
(HAVE_CODE_COMPRESSION): New macro.
(micromips_op_hash): New variable.
(micromips_nop16_insn, micromips_nop32_insn): New variables.
(NOP_INSN): Handle microMIPS ASE.
(mips32_to_micromips_reg_b_map): New macro.
(mips32_to_micromips_reg_c_map): Likewise.
(mips32_to_micromips_reg_d_map): Likewise.
(mips32_to_micromips_reg_e_map): Likewise.
(mips32_to_micromips_reg_f_map): Likewise.
(mips32_to_micromips_reg_g_map): Likewise.
(mips32_to_micromips_reg_l_map): Likewise.
(mips32_to_micromips_reg_n_map): Likewise.
(mips32_to_micromips_reg_h_map): New variable.
(mips32_to_micromips_reg_m_map): Likewise.
(mips32_to_micromips_reg_q_map): Likewise.
(micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_to_32_reg_b_map): New macro.
(micromips_to_32_reg_c_map): Likewise.
(micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map): Likewise.
(micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map): Likewise.
(micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_n_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): New macros.
(RELAX_DELAY_SLOT_16BIT): New macro.
(RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
(RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
(RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
(RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
(RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
(RELAX_MICROMIPS_TOOFAR32): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
(INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
(mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
fsize and insns.
(mips_mark_labels): New function.
(mips16_small, mips16_ext): Remove variables, replacing with...
(forced_insn_size): ... this.
(append_insn, mips16_ip): Update accordingly.
(micromips_insn_length): New function.
(insn_length): Return the length of microMIPS instructions.
(mips_record_mips16_mode): Rename to...
(mips_record_compressed_mode): ... this. Handle microMIPS ASE.
(install_insn): Handle microMIPS ASE.
(reglist_lookup): New function.
(is_size_valid, is_delay_slot_valid): Likewise.
(md_begin): Handle microMIPS ASE.
(md_assemble): Likewise. Update for append_insn interface change.
(micromips_reloc_p): New function.
(got16_reloc_p): Handle microMIPS ASE.
(hi16_reloc_p): Likewise.
(lo16_reloc_p): Likewise.
(jmp_reloc_p): New function.
(jalr_reloc_p): Likewise.
(matching_lo_reloc): Handle microMIPS ASE.
(insn_uses_reg, reg_needs_delay): Likewise.
(mips_move_labels): Likewise.
(mips16_mark_labels): Rename to...
(mips_compressed_mark_labels): ... this. Handle microMIPS ASE.
(gpr_mod_mask): New function.
(gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, nops_for_insn): Likewise.
(fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
(MICROMIPS_LABEL_CHAR): New macro.
(micromips_target_label, micromips_target_name): New variables.
(micromips_label_name, micromips_label_expr): New functions.
(micromips_label_inc, micromips_add_label): Likewise.
(mips_label_is_local): Likewise.
(micromips_map_reloc): Likewise.
(can_swap_branch_p): Handle microMIPS ASE.
(append_insn): Add expansionp argument. Handle microMIPS ASE.
(start_noreorder, end_noreorder): Handle microMIPS ASE.
(macro_start, macro_warning, macro_end): Likewise.
(brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
(mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
(BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
(MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
(macro_build): Handle microMIPS ASE. Update for append_insn
interface change.
(mips16_macro_build): Update for append_insn interface change.
(macro_build_jalr): Handle microMIPS ASE.
(macro_build_lui): Likewise. Simplify.
(load_register): Handle microMIPS ASE.
(load_address): Likewise.
(move_register): Likewise.
(macro_build_branch_likely): New function.
(macro_build_branch_ccl): Likewise.
(macro_build_branch_rs): Likewise.
(macro_build_branch_rsrt): Likewise.
(macro): Handle microMIPS ASE.
(validate_micromips_insn): New function.
(expr_const_in_range): Likewise.
(mips_ip): Handle microMIPS ASE.
(options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
(md_longopts): Add mmicromips and mno-micromips.
(md_parse_option): Handle OPTION_MICROMIPS and
OPTION_NO_MICROMIPS.
(mips_after_parse_args): Handle microMIPS ASE.
(md_pcrel_from): Handle microMIPS relocations.
(mips_force_relocation): Likewise.
(md_apply_fix): Likewise.
(mips_align): Handle microMIPS ASE.
(s_mipsset): Likewise.
(s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
(s_dtprel_internal): Likewise.
(s_gpword, s_gpdword): Likewise.
(s_insn): Handle microMIPS ASE.
(s_mips_stab): Likewise.
(relaxed_micromips_32bit_branch_length): New function.
(relaxed_micromips_16bit_branch_length): New function.
(md_estimate_size_before_relax): Handle microMIPS ASE.
(mips_fix_adjustable): Likewise.
(tc_gen_reloc): Handle microMIPS relocations.
(mips_relax_frag): Handle microMIPS ASE.
(md_convert_frag): Likewise.
(mips_frob_file_after_relocs): Likewise.
(mips_elf_final_processing): Likewise.
(mips_nop_opcode): Likewise.
(mips_handle_align): Likewise.
(md_show_usage): Handle microMIPS options.
* symbols.c (TC_LABEL_IS_LOCAL): New macro.
(S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.
* doc/as.texinfo (Target MIPS options): Add -mmicromips and
-mno-micromips.
(-mmicromips, -mno-micromips): New options.
* doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
(MIPS ISA): Document .set micromips and .set nomicromips.
(MIPS insn): Update for microMIPS support.
gas/testsuite/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/micromips.d: New test.
* gas/mips/micromips-branch-delay.d: Likewise.
* gas/mips/micromips-branch-relax.d: Likewise.
* gas/mips/micromips-branch-relax-pic.d: Likewise.
* gas/mips/micromips-size-1.d: Likewise.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips.l: New stderr output.
* gas/mips/micromips-branch-delay.l: Likewise.
* gas/mips/micromips-branch-relax.l: Likewise.
* gas/mips/micromips-branch-relax-pic.l: Likewise.
* gas/mips/micromips-size-0.l: New list test.
* gas/mips/micromips-size-1.l: New stderr output.
* gas/mips/micromips.s: New test source.
* gas/mips/micromips-branch-delay.s: Likewise.
* gas/mips/micromips-branch-relax.s: Likewise.
* gas/mips/micromips-size-0.s: Likewise.
* gas/mips/micromips-size-1.s: Likewise.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/dli.s: Use .p2align.
* gas/mips/elf_ase_micromips.d: New test.
* gas/mips/elf_ase_micromips-2.d: Likewise.
* gas/mips/micromips@abs.d: Likewise.
* gas/mips/micromips@add.d: Likewise.
* gas/mips/micromips@alnv_ps-swap.d: Likewise.
* gas/mips/micromips@and.d: Likewise.
* gas/mips/micromips@beq.d: Likewise.
* gas/mips/micromips@bge.d: Likewise.
* gas/mips/micromips@bgeu.d: Likewise.
* gas/mips/micromips@blt.d: Likewise.
* gas/mips/micromips@bltu.d: Likewise.
* gas/mips/micromips@branch-likely.d: Likewise.
* gas/mips/micromips@branch-misc-1.d: Likewise.
* gas/mips/micromips@branch-misc-2-64.d: Likewise.
* gas/mips/micromips@branch-misc-2.d: Likewise.
* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
* gas/mips/micromips@branch-misc-2pic.d: Likewise.
* gas/mips/micromips@branch-misc-4-64.d: Likewise.
* gas/mips/micromips@branch-misc-4.d: Likewise.
* gas/mips/micromips@branch-self.d: Likewise.
* gas/mips/micromips@cache.d: Likewise.
* gas/mips/micromips@daddi.d: Likewise.
* gas/mips/micromips@dli.d: Likewise.
* gas/mips/micromips@elf-jal.d: Likewise.
* gas/mips/micromips@elf-rel2.d: Likewise.
* gas/mips/micromips@elfel-rel2.d: Likewise.
* gas/mips/micromips@elf-rel4.d: Likewise.
* gas/mips/micromips@jal-svr4pic.d: Likewise.
* gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise.
* gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise.
* gas/mips/micromips@li.d: Likewise.
* gas/mips/micromips@loc-swap-dis.d: Likewise.
* gas/mips/micromips@loc-swap.d: Likewise.
* gas/mips/micromips@mips1-fp.d: Likewise.
* gas/mips/micromips@mips32-cp2.d: Likewise.
* gas/mips/micromips@mips32-imm.d: Likewise.
* gas/mips/micromips@mips32-sf32.d: Likewise.
* gas/mips/micromips@mips32.d: Likewise.
* gas/mips/micromips@mips32r2-cp2.d: Likewise.
* gas/mips/micromips@mips32r2-fp32.d: Likewise.
* gas/mips/micromips@mips32r2-sync.d: Likewise.
* gas/mips/micromips@mips32r2.d: Likewise.
* gas/mips/micromips@mips4-branch-likely.d: Likewise.
* gas/mips/micromips@mips4-fp.d: Likewise.
* gas/mips/micromips@mips4.d: Likewise.
* gas/mips/micromips@mips5.d: Likewise.
* gas/mips/micromips@mips64-cp2.d: Likewise.
* gas/mips/micromips@mips64.d: Likewise.
* gas/mips/micromips@mips64r2.d: Likewise.
* gas/mips/micromips@pref.d: Likewise.
* gas/mips/micromips@relax-at.d: Likewise.
* gas/mips/micromips@relax.d: Likewise.
* gas/mips/micromips@rol-hw.d: Likewise.
* gas/mips/micromips@uld2-eb.d: Likewise.
* gas/mips/micromips@uld2-el.d: Likewise.
* gas/mips/micromips@ulh2-eb.d: Likewise.
* gas/mips/micromips@ulh2-el.d: Likewise.
* gas/mips/micromips@ulw2-eb-ilocks.d: Likewise.
* gas/mips/micromips@ulw2-el-ilocks.d: Likewise.
* gas/mips/cache.d: Likewise.
* gas/mips/daddi.d: Likewise.
* gas/mips/mips32-imm.d: Likewise.
* gas/mips/pref.d: Likewise.
* gas/mips/elf-rel27.d: Handle microMIPS ASE.
* gas/mips/l_d.d: Likewise.
* gas/mips/l_d-n32.d: Likewise.
* gas/mips/l_d-n64.d: Likewise.
* gas/mips/ld.d: Likewise.
* gas/mips/ld-n32.d: Likewise.
* gas/mips/ld-n64.d: Likewise.
* gas/mips/s_d.d: Likewise.
* gas/mips/s_d-n32.d: Likewise.
* gas/mips/s_d-n64.d: Likewise.
* gas/mips/sd.d: Likewise.
* gas/mips/sd-n32.d: Likewise.
* gas/mips/sd-n64.d: Likewise.
* gas/mips/mips32.d: Update immediates.
* gas/mips/micromips@mips32-cp2.s: New test source.
* gas/mips/micromips@mips32-imm.s: Likewise.
* gas/mips/micromips@mips32r2-cp2.s: Likewise.
* gas/mips/micromips@mips64-cp2.s: Likewise.
* gas/mips/cache.s: Likewise.
* gas/mips/daddi.s: Likewise.
* gas/mips/mips32-imm.s: Likewise.
* gas/mips/elf-rel4.s: Handle microMIPS ASE.
* gas/mips/lb-pic.s: Likewise.
* gas/mips/ld.s: Likewise.
* gas/mips/mips32.s: Likewise.
* gas/mips/mips.exp: Add the micromips arch. Exclude mips16e
from micromips. Run mips32-imm.
* gas/mips/jal-mask-11.d: New test.
* gas/mips/jal-mask-12.d: Likewise.
* gas/mips/micromips@jal-mask-11.d: Likewise.
* gas/mips/jal-mask-1.s: Source for the new tests.
* gas/mips/jal-mask-21.d: New test.
* gas/mips/jal-mask-22.d: Likewise.
* gas/mips/micromips@jal-mask-12.d: Likewise.
* gas/mips/jal-mask-2.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/mips16-e.d: Add --special-syms to `objdump'.
* gas/mips/tmips16-e.d: Likewise.
* gas/mips/mipsel16-e.d: Likewise.
* gas/mips/tmipsel16-e.d: Likewise.
* gas/mips/and.s: Adjust padding.
* gas/mips/beq.s: Likewise.
* gas/mips/bge.s: Likewise.
* gas/mips/bgeu.s: Likewise.
* gas/mips/blt.s: Likewise.
* gas/mips/bltu.s: Likewise.
* gas/mips/branch-misc-2.s: Likewise.
* gas/mips/jal.s: Likewise.
* gas/mips/li.s: Likewise.
* gas/mips/mips4.s: Likewise.
* gas/mips/mips4-fp.s: Likewise.
* gas/mips/relax.s: Likewise.
* gas/mips/and.d: Update accordingly.
* gas/mips/elf-jal.d: Likewise.
* gas/mips/jal.d: Likewise.
* gas/mips/li.d: Likewise.
* gas/mips/relax-at.d: Likewise.
* gas/mips/relax.d: Likewise.
include/elf/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (R_MICROMIPS_min): New relocations.
(R_MICROMIPS_26_S1): Likewise.
(R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise.
(R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise.
(R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise.
(R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise.
(R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise.
(R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise.
(R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise.
(R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise.
(R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise.
(R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise.
(R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise.
(R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise.
(R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise.
(R_MICROMIPS_TLS_GOTTPREL): Likewise.
(R_MICROMIPS_TLS_TPREL_HI16): Likewise.
(R_MICROMIPS_TLS_TPREL_LO16): Likewise.
(R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise.
(R_MICROMIPS_max): Likewise.
(EF_MIPS_ARCH_ASE_MICROMIPS): New macro.
(STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise.
(ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise.
(STO_MICROMIPS): Likewise.
(ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise.
(ELF_ST_IS_COMPRESSED): Likewise.
(STO_MIPS_PLT, STO_MIPS_PIC): Rework.
(ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise.
(STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise.
include/opcode/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros.
(OP_MASK_STYPE, OP_SH_STYPE): Likewise.
(OP_MASK_CODE10, OP_SH_CODE10): Likewise.
(OP_MASK_TRAP, OP_SH_TRAP): Likewise.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise.
(OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise.
(OP_MASK_RS3, OP_SH_RS3): Likewise.
(OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise.
(OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise.
(OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise.
(OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise.
(OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise.
(OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise.
(OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise.
(OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise.
(OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise.
(OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise.
(OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise.
(OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise.
(OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise.
(OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise.
(INSN_WRITE_GPR_S): New macro.
(INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise.
(INSN2_READ_FPR_D): Likewise.
(INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise.
(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise.
(INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise.
(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise.
(INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise.
(INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise.
(INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise.
(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise.
(CPU_MICROMIPS): New macro.
(M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values.
(M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise.
(M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise.
(M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise.
(M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise.
(M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise.
(M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise.
(M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise.
(M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise.
(M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise.
(M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise.
(M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise.
(M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise.
(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros.
(MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise.
(MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise.
(MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise.
(MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise.
(MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise.
(MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise.
(MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise.
(MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise.
(MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise.
(MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise.
(MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise.
(MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise.
(MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise.
(MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise.
(MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise.
(MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise.
(MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise.
(MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise.
(MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise.
(MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise.
(MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise.
(MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise.
(MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise.
(MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise.
(MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise.
(MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise.
(MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise.
(MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise.
(MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise.
(MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise.
(MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise.
(MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise.
(MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise.
(MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise.
(MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise.
(MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise.
(MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise.
(MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise.
(MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise.
(MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise.
(MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise.
(MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise.
(MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise.
(MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise.
(MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise.
(MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise.
(MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise.
(MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise.
(MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise.
(MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise.
(MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise.
(MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise.
(MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise.
(MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise.
(MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise.
(MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise.
(MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise.
(MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise.
(MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise.
(MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise.
(MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise.
(MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise.
(MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise.
(MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
(MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise.
(MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise.
(MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise.
(MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise.
(MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise.
(MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise.
(MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise.
(MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise.
(micromips_opcodes): New declaration.
(bfd_micromips_num_opcodes): Likewise.
ld/testsuite/
2011-02-25 Catherine Moore <clm@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* lib/ld-lib.exp (run_dump_test): Support distinct assembler
flags for the same source named multiple times.
* ld-mips-elf/jalx-1.s: New test source.
* ld-mips-elf/jalx-1.d: New test output.
* ld-mips-elf/jalx-1.ld: New test linker script.
* ld-mips-elf/jalx-2-main.s: New test source.
* ld-mips-elf/jalx-2-ex.s: Likewise.
* ld-mips-elf/jalx-2-printf.s: Likewise.
* ld-mips-elf/jalx-2.dd: New test output.
* ld-mips-elf/jalx-2.ld: New test linker script.
* ld-mips-elf/mips16-and-micromips.d: New test.
* ld-mips-elf/mips-elf.exp: Run the new tests
opcodes/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* micromips-opc.c: New file.
* mips-dis.c (micromips_to_32_reg_b_map): New array.
(micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): Likewise.
(micromips_ase): New variable.
(is_micromips): New function.
(set_default_mips_dis_options): Handle microMIPS ASE.
(print_insn_micromips): New function.
(is_compressed_mode_p): Likewise.
(_print_insn_mips): Handle microMIPS instructions.
* Makefile.am (CFILES): Add micromips-opc.c.
* configure.in (bfd_mips_arch): Add micromips-opc.lo.
* Makefile.in: Regenerate.
* configure: Regenerate.
* mips-dis.c (micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_n_map): New macro.
2011-07-24 22:20:15 +08:00
|
|
|
.#define bfd_mach_mips_micromips 96
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_i386, {* Intel 386 *}
|
2011-08-02 07:04:23 +08:00
|
|
|
.#define bfd_mach_i386_intel_syntax (1 << 0)
|
|
|
|
.#define bfd_mach_i386_i8086 (1 << 1)
|
|
|
|
.#define bfd_mach_i386_i386 (1 << 2)
|
|
|
|
.#define bfd_mach_x86_64 (1 << 3)
|
|
|
|
.#define bfd_mach_x64_32 (1 << 4)
|
|
|
|
.#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax)
|
|
|
|
.#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax)
|
|
|
|
.#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax)
|
2009-07-25 22:58:58 +08:00
|
|
|
. bfd_arch_l1om, {* Intel L1OM *}
|
2011-08-02 07:04:23 +08:00
|
|
|
.#define bfd_mach_l1om (1 << 5)
|
|
|
|
.#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax)
|
2011-07-23 04:22:38 +08:00
|
|
|
. bfd_arch_k1om, {* Intel K1OM *}
|
2011-08-02 07:04:23 +08:00
|
|
|
.#define bfd_mach_k1om (1 << 6)
|
|
|
|
.#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax)
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_we32k, {* AT&T WE32xxx *}
|
|
|
|
. bfd_arch_tahoe, {* CCI/Harris Tahoe *}
|
|
|
|
. bfd_arch_i860, {* Intel 860 *}
|
2000-02-23 21:52:23 +08:00
|
|
|
. bfd_arch_i370, {* IBM 360/370 Mainframes *}
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_romp, {* IBM ROMP PC/RT *}
|
|
|
|
. bfd_arch_convex, {* Convex *}
|
|
|
|
. bfd_arch_m88k, {* Motorola 88xxx *}
|
2002-11-06 21:26:29 +08:00
|
|
|
. bfd_arch_m98k, {* Motorola 98xxx *}
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_pyramid, {* Pyramid Technology *}
|
2003-04-15 16:51:55 +08:00
|
|
|
. bfd_arch_h8300, {* Renesas H8/300 (formerly Hitachi H8/300) *}
|
2003-04-24 20:36:08 +08:00
|
|
|
.#define bfd_mach_h8300 1
|
|
|
|
.#define bfd_mach_h8300h 2
|
|
|
|
.#define bfd_mach_h8300s 3
|
|
|
|
.#define bfd_mach_h8300hn 4
|
|
|
|
.#define bfd_mach_h8300sn 5
|
2003-05-17 07:39:24 +08:00
|
|
|
.#define bfd_mach_h8300sx 6
|
2003-06-10 15:09:31 +08:00
|
|
|
.#define bfd_mach_h8300sxn 7
|
2001-02-19 07:33:11 +08:00
|
|
|
. bfd_arch_pdp11, {* DEC PDP-11 *}
|
2009-05-26 22:12:03 +08:00
|
|
|
. bfd_arch_plugin,
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_powerpc, {* PowerPC *}
|
* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
|
|
|
.#define bfd_mach_ppc 32
|
|
|
|
.#define bfd_mach_ppc64 64
|
2000-06-17 04:45:33 +08:00
|
|
|
.#define bfd_mach_ppc_403 403
|
|
|
|
.#define bfd_mach_ppc_403gc 4030
|
2009-07-27 10:32:49 +08:00
|
|
|
.#define bfd_mach_ppc_405 405
|
2000-06-17 04:45:33 +08:00
|
|
|
.#define bfd_mach_ppc_505 505
|
|
|
|
.#define bfd_mach_ppc_601 601
|
|
|
|
.#define bfd_mach_ppc_602 602
|
|
|
|
.#define bfd_mach_ppc_603 603
|
|
|
|
.#define bfd_mach_ppc_ec603e 6031
|
|
|
|
.#define bfd_mach_ppc_604 604
|
|
|
|
.#define bfd_mach_ppc_620 620
|
|
|
|
.#define bfd_mach_ppc_630 630
|
|
|
|
.#define bfd_mach_ppc_750 750
|
|
|
|
.#define bfd_mach_ppc_860 860
|
|
|
|
.#define bfd_mach_ppc_a35 35
|
|
|
|
.#define bfd_mach_ppc_rs64ii 642
|
|
|
|
.#define bfd_mach_ppc_rs64iii 643
|
|
|
|
.#define bfd_mach_ppc_7400 7400
|
2002-08-20 05:12:34 +08:00
|
|
|
.#define bfd_mach_ppc_e500 500
|
2008-04-14 19:01:38 +08:00
|
|
|
.#define bfd_mach_ppc_e500mc 5001
|
2010-02-08 09:59:38 +08:00
|
|
|
.#define bfd_mach_ppc_e500mc64 5005
|
|
|
|
.#define bfd_mach_ppc_titan 83
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_rs6000, {* IBM RS/6000 *}
|
* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
|
|
|
.#define bfd_mach_rs6k 6000
|
2000-06-17 04:45:33 +08:00
|
|
|
.#define bfd_mach_rs6k_rs1 6001
|
|
|
|
.#define bfd_mach_rs6k_rsc 6003
|
|
|
|
.#define bfd_mach_rs6k_rs2 6002
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_hppa, {* HP PA RISC *}
|
2003-09-09 00:46:02 +08:00
|
|
|
.#define bfd_mach_hppa10 10
|
|
|
|
.#define bfd_mach_hppa11 11
|
|
|
|
.#define bfd_mach_hppa20 20
|
|
|
|
.#define bfd_mach_hppa20w 25
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_d10v, {* Mitsubishi D10V *}
|
* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
|
|
|
.#define bfd_mach_d10v 1
|
1999-10-25 21:57:39 +08:00
|
|
|
.#define bfd_mach_d10v_ts2 2
|
|
|
|
.#define bfd_mach_d10v_ts3 3
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_d30v, {* Mitsubishi D30V *}
|
2002-05-28 22:08:47 +08:00
|
|
|
. bfd_arch_dlx, {* DLX *}
|
2000-06-19 09:22:44 +08:00
|
|
|
. bfd_arch_m68hc11, {* Motorola 68HC11 *}
|
|
|
|
. bfd_arch_m68hc12, {* Motorola 68HC12 *}
|
2002-12-01 20:18:29 +08:00
|
|
|
.#define bfd_mach_m6812_default 0
|
|
|
|
.#define bfd_mach_m6812 1
|
|
|
|
.#define bfd_mach_m6812s 2
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_z8k, {* Zilog Z8000 *}
|
|
|
|
.#define bfd_mach_z8001 1
|
|
|
|
.#define bfd_mach_z8002 2
|
2003-04-15 16:51:55 +08:00
|
|
|
. bfd_arch_h8500, {* Renesas H8/500 (formerly Hitachi H8/500) *}
|
2003-04-24 05:09:04 +08:00
|
|
|
. bfd_arch_sh, {* Renesas / SuperH SH (formerly Hitachi SH) *}
|
* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
|
|
|
.#define bfd_mach_sh 1
|
bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.
bfd:
* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
(bfd_mach_sh3_dsp): Likewise.
(bfd_mach_sh4): Reinstate.
(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
* bfd-in2.h: Regenerate.
* coff-sh.c (struct sh_opcode): flags is no longer short.
(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
(sh_opcodes): No longer const.
(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
(sh_insn_uses_reg): Check for USESAS and USESR8.
(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
(_bfd_sh_align_load_span): Return early for SH4.
Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
Take into account that field b of a parallel processing insn
could be mistaken for a separate insn.
* cpu-sh.c (arch_info_struct): New array elements for
sh2, sh-dsp and sh3-dsp.
Reinstate element for sh4.
(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
(SH4_NEXT): Reinstate.
(SH3_NEXT, SH3E_NEXT): Adjust.
* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
* elf32-sh.c (sh_elf_set_private_flags): New function.
(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
(sh_elf_merge_private_data): New function.
(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
(bfd_elf32_bfd_merge_private_bfd_data): Change to
sh_elf_merge_private_data.
gas:
* config/tc-sh.c ("elf/sh.h"): Include.
(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
(md.begin): Initialize target_arch.
Only include opcodes in has table that match selected architecture.
(parse_reg): Recognize register names for sh-dsp.
(parse_at): Recognize post-modify addressing.
(get_operands): The leading space is now optional.
(get_specific): Remove FDREG_N support. Add support for sh-dsp
arguments. Update valid_arch.
(build_Mytes): Add support for SDT_REG_N.
(find_cooked_opcode): New function, broken out of md_assemble.
(assemble_ppi, sh_elf_final_processing): New functions.
(md_assemble): Use find_cooked_opcode and assemble_ppi.
(md_longopts, md_parse_option): New option: -dsp.
* config/tc-sh.h (elf_tc_final_processing): Define.
(sh_elf_final_processing): Declare.
include/elf:
* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.
opcodes:
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 08:33:36 +08:00
|
|
|
.#define bfd_mach_sh2 0x20
|
|
|
|
.#define bfd_mach_sh_dsp 0x2d
|
2004-07-29 13:17:41 +08:00
|
|
|
.#define bfd_mach_sh2a 0x2a
|
|
|
|
.#define bfd_mach_sh2a_nofpu 0x2b
|
2005-01-17 22:08:17 +08:00
|
|
|
.#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
|
|
|
|
.#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
|
|
|
|
.#define bfd_mach_sh2a_or_sh4 0x2a3
|
|
|
|
.#define bfd_mach_sh2a_or_sh3e 0x2a4
|
2003-01-24 02:50:57 +08:00
|
|
|
.#define bfd_mach_sh2e 0x2e
|
1999-05-03 15:29:11 +08:00
|
|
|
.#define bfd_mach_sh3 0x30
|
2004-05-28 20:32:10 +08:00
|
|
|
.#define bfd_mach_sh3_nommu 0x31
|
bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.
bfd:
* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
(bfd_mach_sh3_dsp): Likewise.
(bfd_mach_sh4): Reinstate.
(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
* bfd-in2.h: Regenerate.
* coff-sh.c (struct sh_opcode): flags is no longer short.
(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
(sh_opcodes): No longer const.
(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
(sh_insn_uses_reg): Check for USESAS and USESR8.
(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
(_bfd_sh_align_load_span): Return early for SH4.
Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
Take into account that field b of a parallel processing insn
could be mistaken for a separate insn.
* cpu-sh.c (arch_info_struct): New array elements for
sh2, sh-dsp and sh3-dsp.
Reinstate element for sh4.
(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
(SH4_NEXT): Reinstate.
(SH3_NEXT, SH3E_NEXT): Adjust.
* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
* elf32-sh.c (sh_elf_set_private_flags): New function.
(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
(sh_elf_merge_private_data): New function.
(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
(bfd_elf32_bfd_merge_private_bfd_data): Change to
sh_elf_merge_private_data.
gas:
* config/tc-sh.c ("elf/sh.h"): Include.
(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
(md.begin): Initialize target_arch.
Only include opcodes in has table that match selected architecture.
(parse_reg): Recognize register names for sh-dsp.
(parse_at): Recognize post-modify addressing.
(get_operands): The leading space is now optional.
(get_specific): Remove FDREG_N support. Add support for sh-dsp
arguments. Update valid_arch.
(build_Mytes): Add support for SDT_REG_N.
(find_cooked_opcode): New function, broken out of md_assemble.
(assemble_ppi, sh_elf_final_processing): New functions.
(md_assemble): Use find_cooked_opcode and assemble_ppi.
(md_longopts, md_parse_option): New option: -dsp.
* config/tc-sh.h (elf_tc_final_processing): Define.
(sh_elf_final_processing): Declare.
include/elf:
* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.
opcodes:
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 08:33:36 +08:00
|
|
|
.#define bfd_mach_sh3_dsp 0x3d
|
1999-05-03 15:29:11 +08:00
|
|
|
.#define bfd_mach_sh3e 0x3e
|
bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.
bfd:
* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
(bfd_mach_sh3_dsp): Likewise.
(bfd_mach_sh4): Reinstate.
(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
* bfd-in2.h: Regenerate.
* coff-sh.c (struct sh_opcode): flags is no longer short.
(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
(sh_opcodes): No longer const.
(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
(sh_insn_uses_reg): Check for USESAS and USESR8.
(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
(_bfd_sh_align_load_span): Return early for SH4.
Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
Take into account that field b of a parallel processing insn
could be mistaken for a separate insn.
* cpu-sh.c (arch_info_struct): New array elements for
sh2, sh-dsp and sh3-dsp.
Reinstate element for sh4.
(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
(SH4_NEXT): Reinstate.
(SH3_NEXT, SH3E_NEXT): Adjust.
* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
* elf32-sh.c (sh_elf_set_private_flags): New function.
(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
(sh_elf_merge_private_data): New function.
(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
(bfd_elf32_bfd_merge_private_bfd_data): Change to
sh_elf_merge_private_data.
gas:
* config/tc-sh.c ("elf/sh.h"): Include.
(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
(md.begin): Initialize target_arch.
Only include opcodes in has table that match selected architecture.
(parse_reg): Recognize register names for sh-dsp.
(parse_at): Recognize post-modify addressing.
(get_operands): The leading space is now optional.
(get_specific): Remove FDREG_N support. Add support for sh-dsp
arguments. Update valid_arch.
(build_Mytes): Add support for SDT_REG_N.
(find_cooked_opcode): New function, broken out of md_assemble.
(assemble_ppi, sh_elf_final_processing): New functions.
(md_assemble): Use find_cooked_opcode and assemble_ppi.
(md_longopts, md_parse_option): New option: -dsp.
* config/tc-sh.h (elf_tc_final_processing): Define.
(sh_elf_final_processing): Declare.
include/elf:
* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.
opcodes:
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 08:33:36 +08:00
|
|
|
.#define bfd_mach_sh4 0x40
|
2003-10-21 23:49:45 +08:00
|
|
|
.#define bfd_mach_sh4_nofpu 0x41
|
2004-03-04 02:01:49 +08:00
|
|
|
.#define bfd_mach_sh4_nommu_nofpu 0x42
|
2003-10-21 23:49:45 +08:00
|
|
|
.#define bfd_mach_sh4a 0x4a
|
|
|
|
.#define bfd_mach_sh4a_nofpu 0x4b
|
|
|
|
.#define bfd_mach_sh4al_dsp 0x4d
|
Contribute sh64-elf.
2002-01-23 Alexandre Oliva <aoliva@redhat.com>
* reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16,
R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16,
R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16,
R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16,
R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16,
R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16,
R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16,
R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8,
R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64):
New relocs.
* libbfd.h, bfd-in2.h: Rebuilt.
* elf32-sh.c (sh_elf_howto_table): Define new relocs.
(sh_reloc_map): Map them.
(PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le,
elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be,
elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry,
elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset,
elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset,
elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset,
movi_shori_putval) [INCLUDE_SHMEDIA]: New.
(elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add
datalabel_got_offset.
(sh_elf_link_hash_newfunc): Initialize it.
(sh_elf_relocate_section): Augment the scope of
seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT,
GOT and GOTOFF handling to new SHmedia relocation types. Support
GOT_BIAS.
(sh_elf_check_relocs): Likewise.
(sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in
PLT entries using movi_shori_putval. Support GOT_BIAS.
(sh_elf_finish_dynamic_sections): Likewise.
* elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to
relocation, it's now done by the caller.
(GOT_BIAS): New.
* elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt,
elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset,
elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset,
elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER,
elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry,
elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse,
sh64_elf64_hash_table): New.
(sh_elf64_howto_table): Introduce new relocs.
(sh_elf64_info_to_howto): Accept new PIC relocs.
(sh_elf64_relocate_section): Augment the scope of
seen_stt_datalabel. Support new PIC relocs.
(sh_elf64_check_relocs): Support new PIC relocs.
(elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le,
elf_sh64_plt_entry_be, elf_sh64_plt_entry_le,
elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le,
elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry,
sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create,
movi_shori_putval, movi_3shori_putval,
sh64_elf64_create_dynamic_sections,
sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies,
sh64_elf64_size_dynamic_sections,
sh64_elf64_finish_dynamic_symbol,
sh64_elf64_finish_dynamic_sections): New.
(elf_backend_create_dynamic-sections,
bfd_elf64_bfd_link_hash_table_create,
elf_backend_adjust_dynamic_symbol,
elf_backend_size_dynamic_sections,
elf_backend_finish_dynamic_symbol,
elf_backend_finish_dynamic_sections, elf_backend_want_got_plt,
elf_backend_plt_readonly, elf_backend_want_plt_sym,
elf_backend_got_header_size, elf_backend_plt_header_size):
Define.
2001-05-16 Alexandre Oliva <aoliva@redhat.com>
* elf32-sh.c: Renumbered and renamed some SH5 relocations to
match official numbers and names; moved unmaching ones to the
range 0xf2-0xff.
* elf32-sh64.c, elf64-sh64.c: Likewise.
2001-03-12 DJ Delorie <dj@redhat.com>
* elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia
sections.
2001-03-12 DJ Delorie <dj@redhat.com>
* elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must
be aligned.
* elf64-sh64.c (sh_elf64_relocate_section): Ditto.
2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com>
* elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define.
(sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a
.cranges section with SEC_SORT_ENTRIES set.
(sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an
incoming sorted .cranges section.
(sh64_bfd_elf_copy_private_section_data): New.
(sh64_elf_final_write_processing): Only sort .cranges and modify
start address if called by linker.
2001-01-08 Ben Elliston <bje@redhat.com>
* elf32-sh64.c (sh64_elf_final_write_processing): Activate
Hans-Peter Nilsson's set bit 0 patch from 2001-01-06.
* elf64-sh64.c (sh64_elf64_final_write_processing): Ditto.
2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com>
* elf64-sh64.c (sh_elf64_howto_table): No open brace at start of
line. Add comments before all entries.
<R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing
comment.
(sh_elf64_reloc): Correct head comment.
(sh_elf64_relocate_section): Correct spacing.
<relocating for a local symbol>: Do not honour STO_SH5_ISA32;
instead call reloc_dangerous callback.
<case R_SH_SHMEDIA_CODE>: New case.
(sh_elf64_gc_mark_hook): Correct spacing.
(sh_elf64_check_relocs): Ditto.
* elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>:
New case.
* elf32-sh.c: Correct #endif comments for #ifndef-wrapped
functions.
(sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct,
clarify describing comment. Add comments before all entries.
(sh_elf_relocate_section) <relocating for a local symbol>: Do not
honour STO_SH5_ISA32; instead call reloc_dangerous callback.
2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com>
Sort .cranges section in final link. Prepare to set bit 0 on
entry address.
* elf32-sh64.c (struct sh64_find_section_vma_data): New.
(sh64_elf_link_output_symbol_hook): Fix typo in prototype.
(sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming
.cranges section.
(sh64_backend_section_from_shdr): New, to recognize
SHT_SH5_CR_SORTED on incoming .cranges section.
(elf_backend_section_from_shdr): Define.
(sh64_elf_final_write_processing): Sort outgoing .cranges
section. (New, temporarily disabled:) Set bit 0 on entry address
according to ISA type.
(sh64_find_section_for_address): New.
(crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb,
crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c.
(sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use
bfd_malloc, not xmalloc.
(sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make
global.
* elf32-sh64.c (sh64_elf64_final_write_processing): New, (but
temporarily disabled) setting bit 0 on entry address.
(elf_backend_final_write_processing): Define.
2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com>
* elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to
be a proper relocation for PTA and PTB rather than a marker.
<R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2,
R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16,
R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16,
R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL,
R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>:
Zero src_mask.
* elf64-sh64.c: Ditto.
(sh_elf64_relocate_section) <case R_SH_PT_16>: New case.
* elf32-sh64.c: Include opcodes/sh64-opc.h
(shmedia_prepare_reloc): Take a bfd_link_info pointer as first
argument. Drop const qualifiers from "bfd *" and "bfd_byte *"
parameters. No unused parameters. Caller changed.
<case R_SH_PT_16>: New case.
* Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h.
* Makefile.in: Regenerate.
2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com>
* elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for
all code sections.
(sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5.
(sh64_elf_merge_private_data): Ditto.
* elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data
to access stored section flags.
(sh64_elf_final_write_processing): Return immediately unless
called by linker. Use sh64_elf_section_data (cranges) to get size
of linker-generated cranges entries.
(sh64_elf_copy_private_data): Add missing "return true".
(sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5.
(sh_elf64_merge_private_data): Ditto.
2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com>
* elf64-sh64.c (sh64_elf64_fake_sections): New, copy of
elf64-sh64.c:sh64_elf_fake_sections.
(elf_backend_fake_sections): Define as sh64_elf64_fake_sections.
2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com>
* elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete.
(sh64_elf_final_write_processing): New.
(elf_backend_final_write_processing): Define.
(sh64_elf_fake_sections): Get header flags from tdata field.
(sh64_elf_copy_private_data): Do not call
sh64_elf_copy_private_data_internal, just copy e_flags field.
(sh64_elf_merge_private_data): Do not call
sh64_elf_copy_private_data_internal.
2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com>
Remove EF_SH64_ABI64, let ELF size make difference.
Remove SH64-specific BFD section flag.
* elf32-sh64.c (sh64_elf_fake_sections): Recognize section as
containing SHmedia through elf_section_data (asect)->tdata
non-zero, not using a BFD section flag.
(sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64.
(sh64_elf_merge_private_data): Similar.
(elf_backend_section_flags): Don't define.
(sh64_elf_backend_section_flags): Delete.
* elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64,
not EF_SH64_ABI64.
(sh_elf64_merge_private_data): Similar.
* section.c (Section flags definitions): Don't define
SEC_SH_ISA_SHMEDIA.
(bfd-in2.h): Regenerate.
2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com>
Make DataLabel references work with partial linking.
* elf32-sh64.c: Fix formatting.
(sh64_elf_link_output_symbol_hook): New.
(elf_backend_link_output_symbol_hook): Define to
sh64_elf_link_output_symbol_hook.
(sh64_elf_add_symbol_hook): Make DataLabel symbol just global
undefined if partial linking. Adjust sanity check.
* elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New.
(elf_backend_link_output_symbol_hook): Define to
sh64_elf64_link_output_symbol_hook.
(sh64_elf64_add_symbol_hook): Make DataLabel symbol just global
undefined if partial linking. Adjust sanity check.
2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com>
Implement semantics for inter-file DataLabel references.
* elf64-sh64.c (DATALABEL_SUFFIX): Define.
(sh64_elf64_add_symbol_hook): New.
(sh_elf64_relocate_section): If passing an indirect symbol with
st_type STT_DATALABEL on the way to a symbol with st_other
STO_SH5_ISA32, do not bitor 1 to the relocation.
(elf_backend_add_symbol_hook): Define to
sh64_elf64_add_symbol_hook.
* elf64-sh32.c: Tweak comments.
(DATALABEL_SUFFIX): Define.
(sh64_elf_add_symbol_hook): New.
(elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook.
* elf32-sh.c (sh_elf_relocate_section): If passing an indirect
symbol with st_type STT_DATALABEL on the way to a symbol with
st_other STO_SH5_ISA32, do not bitor 1 to the relocation.
2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com>
Pass through STT_DATALABEL.
* elf32-sh64.c (sh64_elf_get_symbol_type): New.
(elf_backend_get_symbol_type): Define.
* elf64-sh64.c (sh64_elf64_get_symbol_type): New.
(elf_backend_get_symbol_type): Define.
2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com>
* elf32-sh64.c: Tweak comments.
(sh64_elf_copy_private_data_internal): Add prototype.
(bfd_elf32_bfd_set_private_flags): Define.
(sh64_elf_copy_private_data_internal): Compare machine name, not
textual BFD target name, to check whether to copy section flag
SHF_SH5_ISA32.
(sh64_elf_merge_private_data): Validize bfd_get_arch_size.
Tweak section-contents-type-mismatch message.
(shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers.
Validize reloc-types.
* elf64-sh64.c: New file.
* targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare.
* Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo.
(BFD64_BACKENDS_CFILES): Add elf64-sh64.c.
Regenerate dependencies.
* Makefile.in: Regenerate.
* config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and
bfd_elf64_sh64l_vec.
* configure.in: Handle bfd_elf64_sh64_vec and
bfd_elf64_sh64l_vec.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
* po/bfd.pot: Regenerate.
2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com>
* elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize
anything else but EF_SH64 and EF_SH64_ABI64.
(sh64_elf_merge_private_data): Emit error for anything else but
EF_SH64 and EF_SH64_ABI64.
* config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec
from targ_selvecs.
* configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and
bfd_elf32_sh64l_vec as a temporary measure.
* configure: Regenerate.
2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com>
* cpu-sh.c (arch_info_struct): Include sh5 item
unconditionalized.
* config.bfd (sh64-*-elf*): Do not set targ_cflags.
Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec,
bfd_elf32_shblin_vec and bfd_elf32_shlin_vec.
* elf32-sh64.c: Tweak comments.
(sh64_elf_set_mach_from_flags): Recognize all machine flags that
are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64.
(sh64_elf_copy_private_data_internal): Wrap long line.
(sh64_elf_merge_private_data): Rewrite to allow objects from
SH64 subsets to be linked together.
(INCLUDE_SHMEDIA): Define.
* elf32-sh.c (sh_elf_relocate_section) <local symbol>:
Parenthesize plus-expression inside or-expression.
<global symbol>: Ditto.
(sh_elf_set_mach_from_flags): Remove code refusing
deleted EF_SH64_32BIT_ABI flag.
2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com>
* elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL,
R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL,
R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true.
(sh_elf_relocate_section) <local symbol>: Or 1 in
calculation of relocation if sym->st_other & STO_SH5_ISA32.
<global symbol>: Ditto if h->other & STO_SH5_ISA32.
* elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to
relocation.
2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com>
* Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo.
(BFD32_BACKENDS_CFILES): Add elf32-sh64.c.
Regenerate dependencies.
* Makefile.in: Regenerate.
* archures.c: Add bfd_mach_sh5.
* config.bfd: Map targ_cpu sh* to bfd_sh_arch.
Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA.
* configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec.
* configure: Regenerate.
* reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5,
BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6,
BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2,
BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8,
BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16,
BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16,
BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16,
BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16,
BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations.
* cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link
in item for SH5.
* elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items
for SHmedia relocs.
[INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs.
[INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call
shmedia_prepare_reloc, goto final_link_relocate if it returns
non-zero, else fail as before.
(sh_elf_set_mach_from_flags): Provide function only if not defined
as macro. Do not recognize objects with EF_SH64_32BIT_ABI set.
(sh_elf_set_private_flags): Provide function only if not defined
as a macro.
(sh_elf_copy_private_data): Similar.
(sh_elf_merge_private_data): Similar.
* section.c (SEC_SH_ISA_SHMEDIA): New.
* targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare.
* elf32-sh64.c: New file.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* po/POTFILES.in: Regenerate.
* po/bfd.pot: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
2002-02-08 13:33:27 +08:00
|
|
|
.#define bfd_mach_sh5 0x50
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_alpha, {* Dec Alpha *}
|
|
|
|
.#define bfd_mach_alpha_ev4 0x10
|
|
|
|
.#define bfd_mach_alpha_ev5 0x20
|
|
|
|
.#define bfd_mach_alpha_ev6 0x30
|
2002-01-31 17:24:16 +08:00
|
|
|
. bfd_arch_arm, {* Advanced Risc Machines ARM. *}
|
2003-04-01 21:08:06 +08:00
|
|
|
.#define bfd_mach_arm_unknown 0
|
1999-05-03 15:29:11 +08:00
|
|
|
.#define bfd_mach_arm_2 1
|
1999-07-05 15:28:24 +08:00
|
|
|
.#define bfd_mach_arm_2a 2
|
1999-05-03 15:29:11 +08:00
|
|
|
.#define bfd_mach_arm_3 3
|
|
|
|
.#define bfd_mach_arm_3M 4
|
1999-07-05 15:28:24 +08:00
|
|
|
.#define bfd_mach_arm_4 5
|
1999-05-03 15:29:11 +08:00
|
|
|
.#define bfd_mach_arm_4T 6
|
1999-07-05 15:28:24 +08:00
|
|
|
.#define bfd_mach_arm_5 7
|
|
|
|
.#define bfd_mach_arm_5T 8
|
2000-11-25 08:21:40 +08:00
|
|
|
.#define bfd_mach_arm_5TE 9
|
|
|
|
.#define bfd_mach_arm_XScale 10
|
2003-02-10 18:44:48 +08:00
|
|
|
.#define bfd_mach_arm_ep9312 11
|
2003-03-26 04:56:01 +08:00
|
|
|
.#define bfd_mach_arm_iWMMXt 12
|
bfd/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
(arch_info_struct, bfd_arm_update_notes): Likewise.
(architectures): Likewise.
(bfd_arm_merge_machines): Check for iWMMXt2.
* bfd-in2.h: Rebuild.
gas/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* config/tc-arm.c (arm_cext_iwmmxt2): New.
(enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
include/opcode/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
opcodes/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
2006-09-26 20:04:45 +08:00
|
|
|
.#define bfd_mach_arm_iWMMXt2 13
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
|
|
|
|
. bfd_arch_w65, {* WDC 65816 *}
|
|
|
|
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
|
2002-08-28 18:38:51 +08:00
|
|
|
. bfd_arch_tic4x, {* Texas Instruments TMS320C3X/4X *}
|
2003-04-04 16:15:15 +08:00
|
|
|
.#define bfd_mach_tic3x 30
|
|
|
|
.#define bfd_mach_tic4x 40
|
2000-04-08 01:06:58 +08:00
|
|
|
. bfd_arch_tic54x, {* Texas Instruments TMS320C54X *}
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
binutils:
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
gas/testsuite:
* gas/tic6x: New directory and testcases.
include:
* dis-asm.h (print_insn_tic6x): Declare.
include/elf:
* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
* tic6x.h: New.
include/opcode:
* tic6x-control-registers.h, tic6x-insn-formats.h,
tic6x-opcode-table.h, tic6x.h: New.
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
eelf32_tic6x_le.o.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
* NEWS: Add news entry for TI C6X support.
* configure.tgt (tic6x-*-*): New.
* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
ld/testsuite:
* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
* ld-tic6x: New directory and testcases.
opcodes:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
* Makefile.in: Regenerate.
* configure.in (bfd_tic6x_arch): New.
* configure: Regenerate.
* disassemble.c (ARCH_tic6x): Define if ARCH_all.
(disassembler): Handle TI C6X.
* tic6x-dis.c: New.
2010-03-26 05:12:36 +08:00
|
|
|
. bfd_arch_tic6x, {* Texas Instruments TMS320C6X *}
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
|
|
|
|
. bfd_arch_v850, {* NEC V850 *}
|
* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
|
|
|
.#define bfd_mach_v850 1
|
1999-05-03 15:29:11 +08:00
|
|
|
.#define bfd_mach_v850e 'E'
|
2010-07-23 22:52:54 +08:00
|
|
|
.#define bfd_mach_v850e1 '1'
|
|
|
|
.#define bfd_mach_v850e2 0x4532
|
|
|
|
.#define bfd_mach_v850e2v3 0x45325633
|
2001-01-12 05:20:20 +08:00
|
|
|
. bfd_arch_arc, {* ARC Cores *}
|
* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
|
|
|
.#define bfd_mach_arc_5 5
|
|
|
|
.#define bfd_mach_arc_6 6
|
|
|
|
.#define bfd_mach_arc_7 7
|
|
|
|
.#define bfd_mach_arc_8 8
|
ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
2005-07-15 06:52:28 +08:00
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|
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. bfd_arch_m32c, {* Renesas M16C/M32C. *}
|
|
|
|
.#define bfd_mach_m16c 0x75
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|
|
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.#define bfd_mach_m32c 0x78
|
2003-04-23 00:22:26 +08:00
|
|
|
. bfd_arch_m32r, {* Renesas M32R (formerly Mitsubishi M32R/D) *}
|
* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
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|
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.#define bfd_mach_m32r 1 {* For backwards compatibility. *}
|
1999-10-05 09:14:20 +08:00
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.#define bfd_mach_m32rx 'x'
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2003-12-04 01:38:48 +08:00
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.#define bfd_mach_m32r2 '2'
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1999-05-03 15:29:11 +08:00
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. bfd_arch_mn10200, {* Matsushita MN10200 *}
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. bfd_arch_mn10300, {* Matsushita MN10300 *}
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|
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.#define bfd_mach_mn10300 300
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1999-12-01 18:14:02 +08:00
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|
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.#define bfd_mach_am33 330
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2003-07-10 10:53:10 +08:00
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.#define bfd_mach_am33_2 332
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1999-05-03 15:29:11 +08:00
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. bfd_arch_fr30,
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.#define bfd_mach_fr30 0x46523330
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2002-06-19 05:10:55 +08:00
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. bfd_arch_frv,
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* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
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|
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.#define bfd_mach_frv 1
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.#define bfd_mach_frvsimple 2
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2002-06-19 05:10:55 +08:00
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.#define bfd_mach_fr300 300
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.#define bfd_mach_fr400 400
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2004-03-01 18:11:46 +08:00
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.#define bfd_mach_fr450 450
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2002-06-19 05:10:55 +08:00
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.#define bfd_mach_frvtomcat 499 {* fr500 prototype *}
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.#define bfd_mach_fr500 500
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2003-10-09 01:57:59 +08:00
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.#define bfd_mach_fr550 550
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2009-04-16 23:39:48 +08:00
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. bfd_arch_moxie, {* The moxie processor *}
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.#define bfd_mach_moxie 1
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1999-05-03 15:29:11 +08:00
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. bfd_arch_mcore,
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2007-02-06 03:50:12 +08:00
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. bfd_arch_mep,
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.#define bfd_mach_mep 1
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.#define bfd_mach_mep_h1 0x6831
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2009-04-08 10:24:23 +08:00
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.#define bfd_mach_mep_c5 0x6335
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2000-04-22 04:22:24 +08:00
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. bfd_arch_ia64, {* HP/Intel ia64 *}
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* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
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.#define bfd_mach_ia64_elf64 64
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.#define bfd_mach_ia64_elf32 32
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2002-07-17 22:15:52 +08:00
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. bfd_arch_ip2k, {* Ubicom IP2K microcontrollers. *}
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* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
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.#define bfd_mach_ip2022 1
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.#define bfd_mach_ip2022ext 2
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2003-01-04 05:12:28 +08:00
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. bfd_arch_iq2000, {* Vitesse IQ2000. *}
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.#define bfd_mach_iq2000 1
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.#define bfd_mach_iq10 2
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bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 19:18:16 +08:00
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|
|
. bfd_arch_epiphany, {* Adapteva EPIPHANY *}
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|
|
|
.#define bfd_mach_epiphany16 1
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|
|
|
.#define bfd_mach_epiphany32 2
|
Second part of ms1 to mt renaming.
* bfd/archures.c (bfd_arch_mt): Renamed.
(bfd_mt_arch): Renamed.
(bfd_archures_list): Adjusted.
* bfd/bfd-in2.h: Rebuilt.
* bfd/config.bfd (mt): Remove special case targ_archs.
(mt-*-elf): Rename bfd_elf32_mt_vec.
* bfd/configure: Rebuilt.
* bfd/configure.in (bfd_elf32_mt_vec): Renamed.
(selarchs) Remove mt special case.
* bfd/cpu-mt.c (arch_info_struct): Adjust.
(bfd_mt_arch): Renamed, adjust.
* bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
mt_elf_howto_table): Renamed, adjusted.
(mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
mt_elf_print_private_bfd_data): Renamed, adjusted.
(TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
elf_backend_gc_sweep_hook, elf_backend_check_relocs,
eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
bfd_elf32_bfd_copy_private_bfd_data,
bfd_elf32_bfd_merge_private_bfd_data,
bfd_elf32_bfd_print_private_bfd_data): Adjusted.
* bfd/libbfd.h: Regenerated.
* bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
* bfd/targets.c (bfd_elf32_mt_vec): Renamed.
(_bfd_target_vector): Adjusted.
* binutils/readelf.c (guess_is_rela): Use EM_MT.
(dump_relocations, get_machine_name): Adjust.
* cpu/mt.cpu (define-arch, define-isa): Set name to mt.
(define-mach): Adjust.
* cpu/mt.opc (CGEN_ASM_HASH): Update.
(mt_asm_hash, mt_cgen_insn_supported): Renamed.
(parse_loopsize, parse_imm16): Adjust.
* gas/configure: Rebuilt.
* gas/configure.in (mt): Remove special case.
* gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
#includes.
(mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
Rename, adjust.
(md_parse_option, md_show_usage, md_begin, md_assemble,
md_cgen_lookup_reloc, md_atof): Adjust.
(mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
* gas/config/tc-mt.h (TC_MT): Rename.
(LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
(md_apply_fix): Adjust.
(mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
(TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.
* gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust.
(mt_register_name, mt_register_type, mt_register_reggroup_p,
mt_return_value, mt_skip_prologue, mt_breapoint_from_pc,
mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align,
mt_registers_info, mt_push_dummy_call, mt_unwind_cache,
mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id,
mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address,
mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init,
_initialize_mt_tdep): Rename & adjust.
* include/dis-asm.h (print_insn_mt): Renamed.
* include/elf/common.h (EM_MT): Renamed.
* include/elf/mt.h: Rename relocs, cpu & other defines.
* ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.
* opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
(stamp-mt): Adjust rule.
(mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
adjust.
* opcodes/Makefile.in: Rebuilt.
* opcodes/configure: Rebuilt.
* opcodes/configure.in (bfd_mt_arch): Rename & adjust.
* opcodes/disassemble.c (ARCH_mt): Renamed.
(disassembler): Adjust.
* opcodes/mt-asm.c: Renamed, rebuilt.
* opcodes/mt-desc.c: Renamed, rebuilt.
* opcodes/mt-desc.h: Renamed, rebuilt.
* opcodes/mt-dis.c: Renamed, rebuilt.
* opcodes/mt-ibld.c: Renamed, rebuilt.
* opcodes/mt-opc.c: Renamed, rebuilt.
* opcodes/mt-opc.h: Renamed, rebuilt.
* sid/Makefile.in: Rebuilt.
* sid/aclocal.m4: Rebuilt.
* sid/configure: Rebuilt.
* sid/sid.spec: Adjust.
* sid/bsp/Makefile.am: Adjust.
* sid/bsp/Makefile.in: Rebuilt.
* sid/bsp/aclocal.m4: Rebuilt.
* sid/bsp/configrun-sid.in: Adjust.
* sid/bsp/pregen/Makefile.in: Rebuilt.
* sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt.
* sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt.
* sid/bsp/pregen/pregen-configs.in: Adjust.
* sid/component/aclocal.m4: Rebuilt.
* sid/component/configure: Rebuilt.
* sid/component/tconfig.in: Adjust.
* sid/component/bochs/aclocal.m4: Rebuilt.
* sid/component/cache/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/aclocal.m4: Rebuilt.
* sid/component/cgen-cpu/compCGEN.cxx: Adjust.
* sid/component/cgen-cpu/configure: Rebuilt.
* sid/component/cgen-cpu/configure.in: Rebult.
* sid/component/cgen-cpu/mt/Makefile.am: Adjust.
* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust.
* sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt.cxx: Adjust.
* sid/component/cgen-cpu/mt/mt.h: Adjust.
* sid/component/consoles/Makefile.in: Rebuilt.
* sid/component/families/aclocal.m4: Rebuilt.
* sid/component/families/configure: Rebuilt.
* sid/component/gdb/Makefile.in: Rebuilt.
* sid/component/gloss/Makefile.in: Rebuilt.
* sid/component/glue/Makefile.in: Rebuilt.
* sid/component/ide/Makefile.in: Rebuilt.
* sid/component/interrupt/Makefile.in: Rebuilt.
* sid/component/lcd/Makefile.in: Rebuilt.
* sid/component/lcd/testsuite/Makefile.in: Rebuilt.
* sid/component/loader/Makefile.am: Rebuilt.
* sid/component/loader/Makefile.in: Rebuilt.
* sid/component/mapper/Makefile.in: Rebuilt.
* sid/component/mapper/testsuite/Makefile.in: Rebuilt.
* sid/component/memory/Makefile.in: Rebuilt.
* sid/component/mmu/Makefile.in: Rebuilt.
* sid/component/parport/Makefile.in: Rebuilt.
* sid/component/profiling/Makefile.in: Rebuilt.
* sid/component/rtc/Makefile.in: Rebuilt.
* sid/component/sched/Makefile.in: Rebuilt.
* sid/component/testsuite/Makefile.in: Rebuilt.
* sid/component/timers/aclocal.m4: Rebuilt.
* sid/component/timers/configure: Rebuilt.
* sid/component/uart/Makefile.in: Rebuilt.
* sid/component/uart/testsuite/Makefile.in: Rebuilt.
* sid/config/config.sub: Adjust.
* sid/config/info.tcl.in: Adjust.
* sid/config/sidtargets.m4: Adjust.
* sid/doc/Makefile.in: Rebuilt.
* sid/main/dynamic/Makefile.am: Rebuilt.
* sid/main/dynamic/Makefile.in: Rebuilt.
* sid/main/dynamic/aclocal.m4: Rebuilt.
* sid/main/dynamic/configure: Rebuilt.
2005-12-16 18:23:12 +08:00
|
|
|
. bfd_arch_mt,
|
2005-06-08 05:07:32 +08:00
|
|
|
.#define bfd_mach_ms1 1
|
|
|
|
.#define bfd_mach_mrisc2 2
|
bfd:
Add ms2.
* archures.c (bfd_mach_ms2): Define.
* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
(ms1_elf_merge_private_bfd_data): Remove unused variables. Add
correct merging logic, with workaround.
(ms1_elf_print_private_bfd_data): Add ms2 case.
* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
cpu:
Add ms2
* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
model.
(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
f-cb2incr, f-rc3): New fields.
(LOOP): New instruction.
(JAL-HAZARD): New hazard.
(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
New operands.
(mul, muli, dbnz, iflush): Enable for ms2
(jal, reti): Has JAL-HAZARD.
(ldctxt, ldfb, stfb): Only ms1.
(fbcb): Only ms1,ms1-003.
(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
fbcbincrs, mfbcbincrs): Enable for ms2.
(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
* ms1.opc (parse_loopsize): New.
(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
(print_pcrel): New.
gas:
Add ms2.
* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
(ms1_architectures): Add ms2.
(md_parse_option): Add ms2.
(md_show_usage): Add ms2.
(md_assemble): Add JAL_HAZARD detection logic.
(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
* doc/c-ms1.texi: New.
* doc/all.texi: Add MS1.
* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
* doc/Makefile.in: Rebuilt.
* doc/Makefile: Rebuilt.
gas/testsuite:
Add ms2.
* gas/ms1/allinsn.d: Adjust pcrel disassembly.
* gas/ms1/errors.exp: Fix target triplet.
* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
* gas/ms1/ms1-16-003.s: Tweak label.
* gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test.
* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
* gas/ms1/relocs.d: Adjust expected machine name and pcrel
disassembly.
* gas/ms1/relocs.exp: Adjust target triplet.
include:
Add ms2.
* elf/ms1.h (EF_MS1_CPU_MS2): New.
opcodes:
Add ms2.
* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
ms1-opc.c, ms1-opc.h: Regenerated.
2005-11-08 19:15:13 +08:00
|
|
|
.#define bfd_mach_ms2 3
|
1999-09-05 01:07:46 +08:00
|
|
|
. bfd_arch_pj,
|
2002-01-31 17:24:16 +08:00
|
|
|
. bfd_arch_avr, {* Atmel AVR microcontrollers. *}
|
2000-03-27 16:39:14 +08:00
|
|
|
.#define bfd_mach_avr1 1
|
|
|
|
.#define bfd_mach_avr2 2
|
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 13:35:13 +08:00
|
|
|
.#define bfd_mach_avr25 25
|
2000-03-27 16:39:14 +08:00
|
|
|
.#define bfd_mach_avr3 3
|
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 13:35:13 +08:00
|
|
|
.#define bfd_mach_avr31 31
|
|
|
|
.#define bfd_mach_avr35 35
|
2000-03-27 16:39:14 +08:00
|
|
|
.#define bfd_mach_avr4 4
|
2000-06-27 09:45:30 +08:00
|
|
|
.#define bfd_mach_avr5 5
|
Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
2008-08-09 13:35:13 +08:00
|
|
|
.#define bfd_mach_avr51 51
|
2006-05-24 15:36:12 +08:00
|
|
|
.#define bfd_mach_avr6 6
|
2011-03-23 02:10:48 +08:00
|
|
|
.#define bfd_mach_avrxmega1 101
|
|
|
|
.#define bfd_mach_avrxmega2 102
|
|
|
|
.#define bfd_mach_avrxmega3 103
|
|
|
|
.#define bfd_mach_avrxmega4 104
|
|
|
|
.#define bfd_mach_avrxmega5 105
|
|
|
|
.#define bfd_mach_avrxmega6 106
|
|
|
|
.#define bfd_mach_avrxmega7 107
|
2005-09-30 23:36:41 +08:00
|
|
|
. bfd_arch_bfin, {* ADI Blackfin *}
|
|
|
|
.#define bfd_mach_bfin 1
|
2007-06-29 22:09:34 +08:00
|
|
|
. bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
|
|
|
|
.#define bfd_mach_cr16 1
|
2004-03-30 22:04:32 +08:00
|
|
|
. bfd_arch_cr16c, {* National Semiconductor CompactRISC. *}
|
|
|
|
.#define bfd_mach_cr16c 1
|
2004-07-08 01:28:53 +08:00
|
|
|
. bfd_arch_crx, {* National Semiconductor CRX. *}
|
|
|
|
.#define bfd_mach_crx 1
|
2000-07-21 00:21:07 +08:00
|
|
|
. bfd_arch_cris, {* Axis CRIS *}
|
* config.bfd: Support crisv32-*-* like cris-*-*.
* archures.c (bfd_mach_cris_v0_v10, bfd_mach_cris_v32)
(bfd_mach_cris_v10_v32): New macros.
* cpu-cris.c: Tweak formatting.
(get_compatible): New function.
(N): New macro.
(bfd_cris_arch_compat_v10_v32, bfd_cris_arch_v32): New
bfd_arch_info_type:s.
(bfd_cris_arch): Use bfd_mach_cris_v0_v10 for member mach,
get_compatible for member compatible and link bfd_cris_arch_v32 as
next.
* elf32-cris.c (cris_elf_pcrel_reloc)
(cris_elf_set_mach_from_flags): New functions.
(cris_elf_howto_table) <R_CRIS_8_PCREL, R_CRIS_16_PCREL>
<R_CRIS_32_PCREL>: Use cris_elf_pcrel_reloc.
(cris_elf_grok_prstatus, cris_elf_grok_psinfo): Give correct
numbers for bfd_mach_cris_v32.
(PLT_ENTRY_SIZE_V32): New macro.
(elf_cris_plt0_entry): Drop last comma in initializer.
(elf_cris_plt0_entry_v32, elf_cris_plt_entry_v32)
(elf_cris_pic_plt0_entry_v32, elf_cris_pic_plt_entry_v32): New
PLT initializers.
(cris_elf_relocate_section): Change all "%B(%A)" messages to
"%B, section %A".
(elf_cris_finish_dynamic_symbol): Do V32-specific PLT entries.
(elf_cris_finish_dynamic_sections): Similar.
(elf_cris_adjust_dynamic_symbol): Similar.
(cris_elf_check_relocs): Change all "%B(%A)" messages to "%B,
section %A".
<switch with PIC relocs>: Emit error and return FALSE for
bfd_mach_cris_v10_v32.
<case R_CRIS_8_PCREL, case R_CRIS_16_PCREL, case R_CRIS_32_PCREL>:
Emit warning when generating textrel reloc.
(cris_elf_object_p): Call cris_elf_set_mach_from_flags.
(cris_elf_final_write_processing): Set flags according to mach.
(cris_elf_print_private_bfd_data): Display
EF_CRIS_VARIANT_COMMON_V10_V32 and EF_CRIS_VARIANT_V32.
(cris_elf_merge_private_bfd_data): Drop variables old_flags,
new_flags. Don't call cris_elf_final_write_processing. Don't
look at the actual elf header flags at all; use
bfd_get_symbol_leading_char to check ibfd, obfd. Trap difference
in bfd_get_mach for ibfd and obfd and handle merging of compatible
objects.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
* reloc.c (BFD_RELOC_CRIS_SIGNED_8, BFD_RELOC_CRIS_UNSIGNED_8)
(BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_UNSIGNED_16)
(BFD_RELOC_CRIS_LAPCQ_OFFSET): New relocs.
* bfd-in2.h, libbfd.h: Regenerate.
2004-11-04 22:58:13 +08:00
|
|
|
.#define bfd_mach_cris_v0_v10 255
|
|
|
|
.#define bfd_mach_cris_v32 32
|
|
|
|
.#define bfd_mach_cris_v10_v32 1032
|
2011-11-02 11:09:11 +08:00
|
|
|
. bfd_arch_rl78,
|
|
|
|
.#define bfd_mach_rl78 0x75
|
2009-09-29 22:17:19 +08:00
|
|
|
. bfd_arch_rx, {* Renesas RX. *}
|
|
|
|
.#define bfd_mach_rx 0x75
|
2001-02-10 08:58:38 +08:00
|
|
|
. bfd_arch_s390, {* IBM s390 *}
|
* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
|
|
|
.#define bfd_mach_s390_31 31
|
|
|
|
.#define bfd_mach_s390_64 64
|
2006-09-17 07:51:50 +08:00
|
|
|
. bfd_arch_score, {* Sunplus score *}
|
2009-03-02 18:33:08 +08:00
|
|
|
.#define bfd_mach_score3 3
|
|
|
|
.#define bfd_mach_score7 7
|
2001-04-24 23:08:16 +08:00
|
|
|
. bfd_arch_openrisc, {* OpenRISC *}
|
2002-01-31 17:24:16 +08:00
|
|
|
. bfd_arch_mmix, {* Donald Knuth's educational processor. *}
|
2001-12-08 11:46:03 +08:00
|
|
|
. bfd_arch_xstormy16,
|
* archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
bfd_mach_ip2022, bfd_mach_ip2022ext,
bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
* bfd-in2.h: Regenerate.
2002-10-14 13:16:42 +08:00
|
|
|
.#define bfd_mach_xstormy16 1
|
2002-12-31 03:25:13 +08:00
|
|
|
. bfd_arch_msp430, {* Texas Instruments MSP430 architecture. *}
|
|
|
|
.#define bfd_mach_msp11 11
|
2003-08-08 18:14:52 +08:00
|
|
|
.#define bfd_mach_msp110 110
|
2002-12-31 03:25:13 +08:00
|
|
|
.#define bfd_mach_msp12 12
|
|
|
|
.#define bfd_mach_msp13 13
|
|
|
|
.#define bfd_mach_msp14 14
|
2003-08-08 18:14:52 +08:00
|
|
|
.#define bfd_mach_msp15 15
|
2006-02-17 22:36:28 +08:00
|
|
|
.#define bfd_mach_msp16 16
|
2005-08-09 01:08:04 +08:00
|
|
|
.#define bfd_mach_msp21 21
|
2002-12-31 03:25:13 +08:00
|
|
|
.#define bfd_mach_msp31 31
|
|
|
|
.#define bfd_mach_msp32 32
|
|
|
|
.#define bfd_mach_msp33 33
|
2003-08-08 18:14:52 +08:00
|
|
|
.#define bfd_mach_msp41 41
|
|
|
|
.#define bfd_mach_msp42 42
|
2002-12-31 03:25:13 +08:00
|
|
|
.#define bfd_mach_msp43 43
|
|
|
|
.#define bfd_mach_msp44 44
|
2006-02-17 22:36:28 +08:00
|
|
|
. bfd_arch_xc16x, {* Infineon's XC16X Series. *}
|
|
|
|
.#define bfd_mach_xc16x 1
|
|
|
|
.#define bfd_mach_xc16xl 2
|
|
|
|
.#define bfd_mach_xc16xs 3
|
2003-04-01 23:50:31 +08:00
|
|
|
. bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
|
|
|
|
.#define bfd_mach_xtensa 1
|
2005-10-26 01:40:19 +08:00
|
|
|
. bfd_arch_z80,
|
|
|
|
.#define bfd_mach_z80strict 1 {* No undocumented opcodes. *}
|
|
|
|
.#define bfd_mach_z80 3 {* With ixl, ixh, iyl, and iyh. *}
|
|
|
|
.#define bfd_mach_z80full 7 {* All undocumented instructions. *}
|
|
|
|
.#define bfd_mach_r800 11 {* R800: successor with multiplication. *}
|
2008-12-24 03:10:25 +08:00
|
|
|
. bfd_arch_lm32, {* Lattice Mico32 *}
|
|
|
|
.#define bfd_mach_lm32 1
|
Add support for Xilinx MicroBlaze processor.
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-07 01:38:04 +08:00
|
|
|
. bfd_arch_microblaze,{* Xilinx MicroBlaze. *}
|
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
2011-06-13 23:18:54 +08:00
|
|
|
. bfd_arch_tilepro, {* Tilera TILEPro *}
|
|
|
|
. bfd_arch_tilegx, {* Tilera TILE-Gx *}
|
|
|
|
.#define bfd_mach_tilepro 1
|
|
|
|
.#define bfd_mach_tilegx 1
|
1999-05-03 15:29:11 +08:00
|
|
|
. bfd_arch_last
|
|
|
|
. };
|
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
SUBSECTION
|
|
|
|
bfd_arch_info
|
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
This structure contains information on architectures for use
|
|
|
|
within BFD.
|
|
|
|
|
|
|
|
.
|
2000-11-08 03:11:31 +08:00
|
|
|
.typedef struct bfd_arch_info
|
1999-05-03 15:29:11 +08:00
|
|
|
.{
|
|
|
|
. int bits_per_word;
|
|
|
|
. int bits_per_address;
|
|
|
|
. int bits_per_byte;
|
|
|
|
. enum bfd_architecture arch;
|
|
|
|
. unsigned long mach;
|
|
|
|
. const char *arch_name;
|
|
|
|
. const char *printable_name;
|
|
|
|
. unsigned int section_align_power;
|
2002-11-30 16:39:46 +08:00
|
|
|
. {* TRUE if this is the default machine for the architecture.
|
2002-04-20 11:25:20 +08:00
|
|
|
. The default arch should be the first entry for an arch so that
|
|
|
|
. all the entries for that arch can be accessed via <<next>>. *}
|
2002-11-30 16:39:46 +08:00
|
|
|
. bfd_boolean the_default;
|
1999-05-03 15:29:11 +08:00
|
|
|
. const struct bfd_arch_info * (*compatible)
|
2003-06-29 18:06:40 +08:00
|
|
|
. (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
|
1999-05-03 15:29:11 +08:00
|
|
|
.
|
2003-06-29 18:06:40 +08:00
|
|
|
. bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
|
1999-05-03 15:29:11 +08:00
|
|
|
.
|
|
|
|
. const struct bfd_arch_info *next;
|
2002-02-01 01:33:08 +08:00
|
|
|
.}
|
|
|
|
.bfd_arch_info_type;
|
|
|
|
.
|
1999-05-03 15:29:11 +08:00
|
|
|
*/
|
|
|
|
|
|
|
|
extern const bfd_arch_info_type bfd_alpha_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_arc_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_arm_arch;
|
2002-02-01 01:33:08 +08:00
|
|
|
extern const bfd_arch_info_type bfd_avr_arch;
|
2005-09-30 23:36:41 +08:00
|
|
|
extern const bfd_arch_info_type bfd_bfin_arch;
|
2007-06-29 22:09:34 +08:00
|
|
|
extern const bfd_arch_info_type bfd_cr16_arch;
|
2004-03-30 22:04:32 +08:00
|
|
|
extern const bfd_arch_info_type bfd_cr16c_arch;
|
2000-07-21 00:21:07 +08:00
|
|
|
extern const bfd_arch_info_type bfd_cris_arch;
|
2004-07-08 01:28:53 +08:00
|
|
|
extern const bfd_arch_info_type bfd_crx_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_d10v_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_d30v_arch;
|
2002-05-28 22:08:47 +08:00
|
|
|
extern const bfd_arch_info_type bfd_dlx_arch;
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 19:18:16 +08:00
|
|
|
extern const bfd_arch_info_type bfd_epiphany_arch;
|
2002-02-01 01:33:08 +08:00
|
|
|
extern const bfd_arch_info_type bfd_fr30_arch;
|
2002-06-19 05:10:55 +08:00
|
|
|
extern const bfd_arch_info_type bfd_frv_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_h8300_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_h8500_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_hppa_arch;
|
2000-02-23 21:52:23 +08:00
|
|
|
extern const bfd_arch_info_type bfd_i370_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_i386_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_i860_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_i960_arch;
|
2002-02-01 01:33:08 +08:00
|
|
|
extern const bfd_arch_info_type bfd_ia64_arch;
|
2002-07-17 22:15:52 +08:00
|
|
|
extern const bfd_arch_info_type bfd_ip2k_arch;
|
2003-01-04 05:12:28 +08:00
|
|
|
extern const bfd_arch_info_type bfd_iq2000_arch;
|
2011-07-23 04:22:38 +08:00
|
|
|
extern const bfd_arch_info_type bfd_k1om_arch;
|
2009-07-27 22:06:34 +08:00
|
|
|
extern const bfd_arch_info_type bfd_l1om_arch;
|
2008-12-24 03:10:25 +08:00
|
|
|
extern const bfd_arch_info_type bfd_lm32_arch;
|
ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
2005-07-15 06:52:28 +08:00
|
|
|
extern const bfd_arch_info_type bfd_m32c_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_m32r_arch;
|
2000-06-19 09:22:44 +08:00
|
|
|
extern const bfd_arch_info_type bfd_m68hc11_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_m68hc12_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_m68k_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_m88k_arch;
|
2002-02-01 01:33:08 +08:00
|
|
|
extern const bfd_arch_info_type bfd_mcore_arch;
|
2007-02-06 03:50:12 +08:00
|
|
|
extern const bfd_arch_info_type bfd_mep_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_mips_arch;
|
Add support for Xilinx MicroBlaze processor.
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-07 01:38:04 +08:00
|
|
|
extern const bfd_arch_info_type bfd_microblaze_arch;
|
2002-02-01 01:33:08 +08:00
|
|
|
extern const bfd_arch_info_type bfd_mmix_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_mn10200_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_mn10300_arch;
|
2009-07-27 22:06:34 +08:00
|
|
|
extern const bfd_arch_info_type bfd_moxie_arch;
|
2002-12-31 03:25:13 +08:00
|
|
|
extern const bfd_arch_info_type bfd_msp430_arch;
|
Second part of ms1 to mt renaming.
* bfd/archures.c (bfd_arch_mt): Renamed.
(bfd_mt_arch): Renamed.
(bfd_archures_list): Adjusted.
* bfd/bfd-in2.h: Rebuilt.
* bfd/config.bfd (mt): Remove special case targ_archs.
(mt-*-elf): Rename bfd_elf32_mt_vec.
* bfd/configure: Rebuilt.
* bfd/configure.in (bfd_elf32_mt_vec): Renamed.
(selarchs) Remove mt special case.
* bfd/cpu-mt.c (arch_info_struct): Adjust.
(bfd_mt_arch): Renamed, adjust.
* bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
mt_elf_howto_table): Renamed, adjusted.
(mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
mt_elf_print_private_bfd_data): Renamed, adjusted.
(TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
elf_backend_gc_sweep_hook, elf_backend_check_relocs,
eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
bfd_elf32_bfd_copy_private_bfd_data,
bfd_elf32_bfd_merge_private_bfd_data,
bfd_elf32_bfd_print_private_bfd_data): Adjusted.
* bfd/libbfd.h: Regenerated.
* bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
* bfd/targets.c (bfd_elf32_mt_vec): Renamed.
(_bfd_target_vector): Adjusted.
* binutils/readelf.c (guess_is_rela): Use EM_MT.
(dump_relocations, get_machine_name): Adjust.
* cpu/mt.cpu (define-arch, define-isa): Set name to mt.
(define-mach): Adjust.
* cpu/mt.opc (CGEN_ASM_HASH): Update.
(mt_asm_hash, mt_cgen_insn_supported): Renamed.
(parse_loopsize, parse_imm16): Adjust.
* gas/configure: Rebuilt.
* gas/configure.in (mt): Remove special case.
* gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
#includes.
(mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
Rename, adjust.
(md_parse_option, md_show_usage, md_begin, md_assemble,
md_cgen_lookup_reloc, md_atof): Adjust.
(mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
* gas/config/tc-mt.h (TC_MT): Rename.
(LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
(md_apply_fix): Adjust.
(mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
(TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.
* gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust.
(mt_register_name, mt_register_type, mt_register_reggroup_p,
mt_return_value, mt_skip_prologue, mt_breapoint_from_pc,
mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align,
mt_registers_info, mt_push_dummy_call, mt_unwind_cache,
mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id,
mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address,
mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init,
_initialize_mt_tdep): Rename & adjust.
* include/dis-asm.h (print_insn_mt): Renamed.
* include/elf/common.h (EM_MT): Renamed.
* include/elf/mt.h: Rename relocs, cpu & other defines.
* ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.
* opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
(stamp-mt): Adjust rule.
(mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
adjust.
* opcodes/Makefile.in: Rebuilt.
* opcodes/configure: Rebuilt.
* opcodes/configure.in (bfd_mt_arch): Rename & adjust.
* opcodes/disassemble.c (ARCH_mt): Renamed.
(disassembler): Adjust.
* opcodes/mt-asm.c: Renamed, rebuilt.
* opcodes/mt-desc.c: Renamed, rebuilt.
* opcodes/mt-desc.h: Renamed, rebuilt.
* opcodes/mt-dis.c: Renamed, rebuilt.
* opcodes/mt-ibld.c: Renamed, rebuilt.
* opcodes/mt-opc.c: Renamed, rebuilt.
* opcodes/mt-opc.h: Renamed, rebuilt.
* sid/Makefile.in: Rebuilt.
* sid/aclocal.m4: Rebuilt.
* sid/configure: Rebuilt.
* sid/sid.spec: Adjust.
* sid/bsp/Makefile.am: Adjust.
* sid/bsp/Makefile.in: Rebuilt.
* sid/bsp/aclocal.m4: Rebuilt.
* sid/bsp/configrun-sid.in: Adjust.
* sid/bsp/pregen/Makefile.in: Rebuilt.
* sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt.
* sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt.
* sid/bsp/pregen/pregen-configs.in: Adjust.
* sid/component/aclocal.m4: Rebuilt.
* sid/component/configure: Rebuilt.
* sid/component/tconfig.in: Adjust.
* sid/component/bochs/aclocal.m4: Rebuilt.
* sid/component/cache/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/aclocal.m4: Rebuilt.
* sid/component/cgen-cpu/compCGEN.cxx: Adjust.
* sid/component/cgen-cpu/configure: Rebuilt.
* sid/component/cgen-cpu/configure.in: Rebult.
* sid/component/cgen-cpu/mt/Makefile.am: Adjust.
* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
* sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust.
* sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt.
* sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt.
* sid/component/cgen-cpu/mt/mt.cxx: Adjust.
* sid/component/cgen-cpu/mt/mt.h: Adjust.
* sid/component/consoles/Makefile.in: Rebuilt.
* sid/component/families/aclocal.m4: Rebuilt.
* sid/component/families/configure: Rebuilt.
* sid/component/gdb/Makefile.in: Rebuilt.
* sid/component/gloss/Makefile.in: Rebuilt.
* sid/component/glue/Makefile.in: Rebuilt.
* sid/component/ide/Makefile.in: Rebuilt.
* sid/component/interrupt/Makefile.in: Rebuilt.
* sid/component/lcd/Makefile.in: Rebuilt.
* sid/component/lcd/testsuite/Makefile.in: Rebuilt.
* sid/component/loader/Makefile.am: Rebuilt.
* sid/component/loader/Makefile.in: Rebuilt.
* sid/component/mapper/Makefile.in: Rebuilt.
* sid/component/mapper/testsuite/Makefile.in: Rebuilt.
* sid/component/memory/Makefile.in: Rebuilt.
* sid/component/mmu/Makefile.in: Rebuilt.
* sid/component/parport/Makefile.in: Rebuilt.
* sid/component/profiling/Makefile.in: Rebuilt.
* sid/component/rtc/Makefile.in: Rebuilt.
* sid/component/sched/Makefile.in: Rebuilt.
* sid/component/testsuite/Makefile.in: Rebuilt.
* sid/component/timers/aclocal.m4: Rebuilt.
* sid/component/timers/configure: Rebuilt.
* sid/component/uart/Makefile.in: Rebuilt.
* sid/component/uart/testsuite/Makefile.in: Rebuilt.
* sid/config/config.sub: Adjust.
* sid/config/info.tcl.in: Adjust.
* sid/config/sidtargets.m4: Adjust.
* sid/doc/Makefile.in: Rebuilt.
* sid/main/dynamic/Makefile.am: Rebuilt.
* sid/main/dynamic/Makefile.in: Rebuilt.
* sid/main/dynamic/aclocal.m4: Rebuilt.
* sid/main/dynamic/configure: Rebuilt.
2005-12-16 18:23:12 +08:00
|
|
|
extern const bfd_arch_info_type bfd_mt_arch;
|
2002-02-01 01:33:08 +08:00
|
|
|
extern const bfd_arch_info_type bfd_ns32k_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_openrisc_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_or32_arch;
|
2001-02-19 07:33:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_pdp11_arch;
|
2002-02-01 01:33:08 +08:00
|
|
|
extern const bfd_arch_info_type bfd_pj_arch;
|
2009-05-26 22:12:03 +08:00
|
|
|
extern const bfd_arch_info_type bfd_plugin_arch;
|
2002-02-05 11:35:19 +08:00
|
|
|
extern const bfd_arch_info_type bfd_powerpc_archs[];
|
|
|
|
#define bfd_powerpc_arch bfd_powerpc_archs[0]
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_rs6000_arch;
|
2011-11-02 11:09:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_rl78_arch;
|
2009-09-29 22:17:19 +08:00
|
|
|
extern const bfd_arch_info_type bfd_rx_arch;
|
2002-02-01 01:33:08 +08:00
|
|
|
extern const bfd_arch_info_type bfd_s390_arch;
|
2006-09-17 07:51:50 +08:00
|
|
|
extern const bfd_arch_info_type bfd_score_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_sh_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_sparc_arch;
|
2006-10-25 14:49:21 +08:00
|
|
|
extern const bfd_arch_info_type bfd_spu_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_tic30_arch;
|
2002-08-28 18:38:51 +08:00
|
|
|
extern const bfd_arch_info_type bfd_tic4x_arch;
|
2000-04-08 01:06:58 +08:00
|
|
|
extern const bfd_arch_info_type bfd_tic54x_arch;
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
binutils:
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
gas/testsuite:
* gas/tic6x: New directory and testcases.
include:
* dis-asm.h (print_insn_tic6x): Declare.
include/elf:
* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
* tic6x.h: New.
include/opcode:
* tic6x-control-registers.h, tic6x-insn-formats.h,
tic6x-opcode-table.h, tic6x.h: New.
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
eelf32_tic6x_le.o.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
* NEWS: Add news entry for TI C6X support.
* configure.tgt (tic6x-*-*): New.
* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
ld/testsuite:
* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
* ld-tic6x: New directory and testcases.
opcodes:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
* Makefile.in: Regenerate.
* configure.in (bfd_tic6x_arch): New.
* configure: Regenerate.
* disassemble.c (ARCH_tic6x): Define if ARCH_all.
(disassembler): Handle TI C6X.
* tic6x-dis.c: New.
2010-03-26 05:12:36 +08:00
|
|
|
extern const bfd_arch_info_type bfd_tic6x_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_tic80_arch;
|
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
2011-06-13 23:18:54 +08:00
|
|
|
extern const bfd_arch_info_type bfd_tilegx_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_tilepro_arch;
|
2002-02-01 01:33:08 +08:00
|
|
|
extern const bfd_arch_info_type bfd_v850_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
extern const bfd_arch_info_type bfd_vax_arch;
|
|
|
|
extern const bfd_arch_info_type bfd_w65_arch;
|
2009-07-27 22:06:34 +08:00
|
|
|
extern const bfd_arch_info_type bfd_we32k_arch;
|
2001-12-08 11:46:03 +08:00
|
|
|
extern const bfd_arch_info_type bfd_xstormy16_arch;
|
2003-04-01 23:50:31 +08:00
|
|
|
extern const bfd_arch_info_type bfd_xtensa_arch;
|
2006-02-17 22:36:28 +08:00
|
|
|
extern const bfd_arch_info_type bfd_xc16x_arch;
|
2005-10-26 01:40:19 +08:00
|
|
|
extern const bfd_arch_info_type bfd_z80_arch;
|
2002-02-01 01:33:08 +08:00
|
|
|
extern const bfd_arch_info_type bfd_z8k_arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
|
2002-02-01 01:33:08 +08:00
|
|
|
static const bfd_arch_info_type * const bfd_archures_list[] =
|
|
|
|
{
|
1999-05-03 15:29:11 +08:00
|
|
|
#ifdef SELECT_ARCHITECTURES
|
2002-02-01 01:33:08 +08:00
|
|
|
SELECT_ARCHITECTURES,
|
1999-05-03 15:29:11 +08:00
|
|
|
#else
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_alpha_arch,
|
|
|
|
&bfd_arc_arch,
|
|
|
|
&bfd_arm_arch,
|
|
|
|
&bfd_avr_arch,
|
2005-09-30 23:36:41 +08:00
|
|
|
&bfd_bfin_arch,
|
2007-06-29 22:09:34 +08:00
|
|
|
&bfd_cr16_arch,
|
2004-03-30 22:04:32 +08:00
|
|
|
&bfd_cr16c_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_cris_arch,
|
2004-07-08 01:28:53 +08:00
|
|
|
&bfd_crx_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_d10v_arch,
|
|
|
|
&bfd_d30v_arch,
|
2002-05-28 22:08:47 +08:00
|
|
|
&bfd_dlx_arch,
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 19:18:16 +08:00
|
|
|
&bfd_epiphany_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_fr30_arch,
|
2002-06-19 05:10:55 +08:00
|
|
|
&bfd_frv_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_h8300_arch,
|
|
|
|
&bfd_h8500_arch,
|
|
|
|
&bfd_hppa_arch,
|
|
|
|
&bfd_i370_arch,
|
|
|
|
&bfd_i386_arch,
|
|
|
|
&bfd_i860_arch,
|
|
|
|
&bfd_i960_arch,
|
|
|
|
&bfd_ia64_arch,
|
2002-07-17 22:15:52 +08:00
|
|
|
&bfd_ip2k_arch,
|
2003-01-04 05:12:28 +08:00
|
|
|
&bfd_iq2000_arch,
|
2011-07-23 04:22:38 +08:00
|
|
|
&bfd_k1om_arch,
|
2009-07-27 22:06:34 +08:00
|
|
|
&bfd_l1om_arch,
|
2008-12-24 03:10:25 +08:00
|
|
|
&bfd_lm32_arch,
|
2005-07-18 22:13:36 +08:00
|
|
|
&bfd_m32c_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_m32r_arch,
|
|
|
|
&bfd_m68hc11_arch,
|
|
|
|
&bfd_m68hc12_arch,
|
|
|
|
&bfd_m68k_arch,
|
|
|
|
&bfd_m88k_arch,
|
|
|
|
&bfd_mcore_arch,
|
2007-02-06 03:50:12 +08:00
|
|
|
&bfd_mep_arch,
|
Add support for Xilinx MicroBlaze processor.
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-07 01:38:04 +08:00
|
|
|
&bfd_microblaze_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_mips_arch,
|
|
|
|
&bfd_mmix_arch,
|
|
|
|
&bfd_mn10200_arch,
|
|
|
|
&bfd_mn10300_arch,
|
2009-07-27 22:06:34 +08:00
|
|
|
&bfd_moxie_arch,
|
2002-12-31 03:25:13 +08:00
|
|
|
&bfd_msp430_arch,
|
2009-07-27 22:06:34 +08:00
|
|
|
&bfd_mt_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_ns32k_arch,
|
|
|
|
&bfd_openrisc_arch,
|
|
|
|
&bfd_or32_arch,
|
|
|
|
&bfd_pdp11_arch,
|
|
|
|
&bfd_powerpc_arch,
|
|
|
|
&bfd_rs6000_arch,
|
2011-11-02 11:09:11 +08:00
|
|
|
&bfd_rl78_arch,
|
2009-09-29 22:17:19 +08:00
|
|
|
&bfd_rx_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_s390_arch,
|
2006-09-17 07:51:50 +08:00
|
|
|
&bfd_score_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_sh_arch,
|
|
|
|
&bfd_sparc_arch,
|
2006-10-25 14:49:21 +08:00
|
|
|
&bfd_spu_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_tic30_arch,
|
2002-08-28 18:38:51 +08:00
|
|
|
&bfd_tic4x_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_tic54x_arch,
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
binutils:
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
gas/testsuite:
* gas/tic6x: New directory and testcases.
include:
* dis-asm.h (print_insn_tic6x): Declare.
include/elf:
* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
* tic6x.h: New.
include/opcode:
* tic6x-control-registers.h, tic6x-insn-formats.h,
tic6x-opcode-table.h, tic6x.h: New.
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
eelf32_tic6x_le.o.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
* NEWS: Add news entry for TI C6X support.
* configure.tgt (tic6x-*-*): New.
* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
ld/testsuite:
* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
* ld-tic6x: New directory and testcases.
opcodes:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
* Makefile.in: Regenerate.
* configure.in (bfd_tic6x_arch): New.
* configure: Regenerate.
* disassemble.c (ARCH_tic6x): Define if ARCH_all.
(disassembler): Handle TI C6X.
* tic6x-dis.c: New.
2010-03-26 05:12:36 +08:00
|
|
|
&bfd_tic6x_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_tic80_arch,
|
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
2011-06-13 23:18:54 +08:00
|
|
|
&bfd_tilegx_arch,
|
|
|
|
&bfd_tilepro_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_v850_arch,
|
|
|
|
&bfd_vax_arch,
|
|
|
|
&bfd_w65_arch,
|
|
|
|
&bfd_we32k_arch,
|
|
|
|
&bfd_xstormy16_arch,
|
2003-04-01 23:50:31 +08:00
|
|
|
&bfd_xtensa_arch,
|
2006-02-17 22:36:28 +08:00
|
|
|
&bfd_xc16x_arch,
|
2005-10-26 01:40:19 +08:00
|
|
|
&bfd_z80_arch,
|
2002-02-01 01:33:08 +08:00
|
|
|
&bfd_z8k_arch,
|
1999-05-03 15:29:11 +08:00
|
|
|
#endif
|
|
|
|
0
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_printable_name
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
const char *bfd_printable_name (bfd *abfd);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Return a printable string representing the architecture and machine
|
|
|
|
from the pointer to the architecture info structure.
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
const char *
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_printable_name (bfd *abfd)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
return abfd->arch_info->printable_name;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_scan_arch
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
const bfd_arch_info_type *bfd_scan_arch (const char *string);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Figure out if BFD supports any cpu which could be described with
|
|
|
|
the name @var{string}. Return a pointer to an <<arch_info>>
|
|
|
|
structure if a machine is found, otherwise NULL.
|
|
|
|
*/
|
|
|
|
|
|
|
|
const bfd_arch_info_type *
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_scan_arch (const char *string)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
const bfd_arch_info_type * const *app, *ap;
|
|
|
|
|
2000-11-10 12:28:20 +08:00
|
|
|
/* Look through all the installed architectures. */
|
1999-05-03 15:29:11 +08:00
|
|
|
for (app = bfd_archures_list; *app != NULL; app++)
|
|
|
|
{
|
|
|
|
for (ap = *app; ap != NULL; ap = ap->next)
|
|
|
|
{
|
|
|
|
if (ap->scan (ap, string))
|
|
|
|
return ap;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_arch_list
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
const char **bfd_arch_list (void);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Return a freshly malloced NULL-terminated vector of the names
|
|
|
|
of all the valid BFD architectures. Do not modify the names.
|
|
|
|
*/
|
|
|
|
|
|
|
|
const char **
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_arch_list (void)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
int vec_length = 0;
|
|
|
|
const char **name_ptr;
|
|
|
|
const char **name_list;
|
|
|
|
const bfd_arch_info_type * const *app;
|
Touches most files in bfd/, so likely will be blamed for everything..
o bfd_read and bfd_write lose an unnecessary param and become
bfd_bread and bfd_bwrite.
o bfd_*alloc now all take a bfd_size_type arg, and will error if
size_t is too small. eg. 32 bit host, 64 bit bfd, verrry big files
or bugs in linker scripts etc.
o file_ptr becomes a bfd_signed_vma. Besides matching sizes with
various other types involved in handling sections, this should make
it easier for bfd to support a 64 bit off_t on 32 bit hosts that
provide it.
o I've made the H_GET_* and H_PUT_* macros (which invoke bfd_h_{get,put}_*)
generally available. They now cast their args to bfd_vma and
bfd_byte * as appropriate, which removes a swag of casts from the
source.
o Bug fixes to bfd_get8, aix386_core_vec, elf32_h8_relax_section, and
aout-encap.c.
o Zillions of formatting and -Wconversion fixes.
2001-09-18 17:57:26 +08:00
|
|
|
bfd_size_type amt;
|
1999-05-03 15:29:11 +08:00
|
|
|
|
2000-11-10 12:28:20 +08:00
|
|
|
/* Determine the number of architectures. */
|
1999-05-03 15:29:11 +08:00
|
|
|
vec_length = 0;
|
|
|
|
for (app = bfd_archures_list; *app != NULL; app++)
|
|
|
|
{
|
|
|
|
const bfd_arch_info_type *ap;
|
|
|
|
for (ap = *app; ap != NULL; ap = ap->next)
|
|
|
|
{
|
|
|
|
vec_length++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
Touches most files in bfd/, so likely will be blamed for everything..
o bfd_read and bfd_write lose an unnecessary param and become
bfd_bread and bfd_bwrite.
o bfd_*alloc now all take a bfd_size_type arg, and will error if
size_t is too small. eg. 32 bit host, 64 bit bfd, verrry big files
or bugs in linker scripts etc.
o file_ptr becomes a bfd_signed_vma. Besides matching sizes with
various other types involved in handling sections, this should make
it easier for bfd to support a 64 bit off_t on 32 bit hosts that
provide it.
o I've made the H_GET_* and H_PUT_* macros (which invoke bfd_h_{get,put}_*)
generally available. They now cast their args to bfd_vma and
bfd_byte * as appropriate, which removes a swag of casts from the
source.
o Bug fixes to bfd_get8, aix386_core_vec, elf32_h8_relax_section, and
aout-encap.c.
o Zillions of formatting and -Wconversion fixes.
2001-09-18 17:57:26 +08:00
|
|
|
amt = (vec_length + 1) * sizeof (char **);
|
2009-09-10 05:38:59 +08:00
|
|
|
name_list = (const char **) bfd_malloc (amt);
|
1999-05-03 15:29:11 +08:00
|
|
|
if (name_list == NULL)
|
|
|
|
return NULL;
|
|
|
|
|
2000-11-10 12:28:20 +08:00
|
|
|
/* Point the list at each of the names. */
|
1999-05-03 15:29:11 +08:00
|
|
|
name_ptr = name_list;
|
|
|
|
for (app = bfd_archures_list; *app != NULL; app++)
|
|
|
|
{
|
|
|
|
const bfd_arch_info_type *ap;
|
|
|
|
for (ap = *app; ap != NULL; ap = ap->next)
|
|
|
|
{
|
|
|
|
*name_ptr = ap->printable_name;
|
|
|
|
name_ptr++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
*name_ptr = NULL;
|
|
|
|
|
|
|
|
return name_list;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_arch_get_compatible
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
const bfd_arch_info_type *bfd_arch_get_compatible
|
|
|
|
(const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
2002-12-23 18:45:03 +08:00
|
|
|
Determine whether two BFDs' architectures and machine types
|
|
|
|
are compatible. Calculates the lowest common denominator
|
|
|
|
between the two architectures and machine types implied by
|
|
|
|
the BFDs and returns a pointer to an <<arch_info>> structure
|
|
|
|
describing the compatible machine.
|
1999-05-03 15:29:11 +08:00
|
|
|
*/
|
|
|
|
|
|
|
|
const bfd_arch_info_type *
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_arch_get_compatible (const bfd *abfd,
|
|
|
|
const bfd *bbfd,
|
|
|
|
bfd_boolean accept_unknowns)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
2011-06-04 12:07:54 +08:00
|
|
|
const bfd *ubfd, *kbfd;
|
2002-12-23 18:45:03 +08:00
|
|
|
|
|
|
|
/* Look for an unknown architecture. */
|
2011-06-04 12:07:54 +08:00
|
|
|
if (abfd->arch_info->arch == bfd_arch_unknown)
|
|
|
|
ubfd = abfd, kbfd = bbfd;
|
|
|
|
else if (bbfd->arch_info->arch == bfd_arch_unknown)
|
|
|
|
ubfd = bbfd, kbfd = abfd;
|
|
|
|
else
|
|
|
|
/* Otherwise architecture-specific code has to decide. */
|
|
|
|
return abfd->arch_info->compatible (abfd->arch_info, bbfd->arch_info);
|
|
|
|
|
|
|
|
/* We can allow an unknown architecture if accept_unknowns
|
|
|
|
is true, or if the target is the "binary" format, which
|
|
|
|
has an unknown architecture. Since the binary format can
|
|
|
|
only be set by explicit request from the user, it is safe
|
|
|
|
to assume that they know what they are doing. */
|
|
|
|
if (accept_unknowns
|
|
|
|
|| strcmp (bfd_get_target (ubfd), "binary") == 0)
|
|
|
|
return kbfd->arch_info;
|
|
|
|
return NULL;
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
INTERNAL_DEFINITION
|
|
|
|
bfd_default_arch_struct
|
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
The <<bfd_default_arch_struct>> is an item of
|
|
|
|
<<bfd_arch_info_type>> which has been initialized to a fairly
|
|
|
|
generic state. A BFD starts life by pointing to this
|
|
|
|
structure, until the correct back end has determined the real
|
|
|
|
architecture of the file.
|
|
|
|
|
|
|
|
.extern const bfd_arch_info_type bfd_default_arch_struct;
|
|
|
|
*/
|
|
|
|
|
2000-11-10 12:28:20 +08:00
|
|
|
const bfd_arch_info_type bfd_default_arch_struct = {
|
2002-11-30 16:39:46 +08:00
|
|
|
32, 32, 8, bfd_arch_unknown, 0, "unknown", "unknown", 2, TRUE,
|
2000-11-10 12:28:20 +08:00
|
|
|
bfd_default_compatible,
|
|
|
|
bfd_default_scan,
|
|
|
|
0,
|
1999-05-03 15:29:11 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_set_arch_info
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Set the architecture info of @var{abfd} to @var{arg}.
|
|
|
|
*/
|
|
|
|
|
|
|
|
void
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
abfd->arch_info = arg;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
INTERNAL_FUNCTION
|
|
|
|
bfd_default_set_arch_mach
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_boolean bfd_default_set_arch_mach
|
|
|
|
(bfd *abfd, enum bfd_architecture arch, unsigned long mach);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Set the architecture and machine type in BFD @var{abfd}
|
|
|
|
to @var{arch} and @var{mach}. Find the correct
|
|
|
|
pointer to a structure and insert it into the <<arch_info>>
|
2000-11-08 03:11:31 +08:00
|
|
|
pointer.
|
1999-05-03 15:29:11 +08:00
|
|
|
*/
|
|
|
|
|
2002-11-30 16:39:46 +08:00
|
|
|
bfd_boolean
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_default_set_arch_mach (bfd *abfd,
|
|
|
|
enum bfd_architecture arch,
|
|
|
|
unsigned long mach)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
2002-04-20 10:54:26 +08:00
|
|
|
abfd->arch_info = bfd_lookup_arch (arch, mach);
|
|
|
|
if (abfd->arch_info != NULL)
|
2002-11-30 16:39:46 +08:00
|
|
|
return TRUE;
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
abfd->arch_info = &bfd_default_arch_struct;
|
|
|
|
bfd_set_error (bfd_error_bad_value);
|
2002-11-30 16:39:46 +08:00
|
|
|
return FALSE;
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_get_arch
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
enum bfd_architecture bfd_get_arch (bfd *abfd);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Return the enumerated type which describes the BFD @var{abfd}'s
|
|
|
|
architecture.
|
|
|
|
*/
|
|
|
|
|
|
|
|
enum bfd_architecture
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_get_arch (bfd *abfd)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
2000-11-10 12:28:20 +08:00
|
|
|
return abfd->arch_info->arch;
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_get_mach
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
unsigned long bfd_get_mach (bfd *abfd);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Return the long type which describes the BFD @var{abfd}'s
|
|
|
|
machine.
|
|
|
|
*/
|
|
|
|
|
2000-11-08 03:11:31 +08:00
|
|
|
unsigned long
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_get_mach (bfd *abfd)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
2000-11-10 12:28:20 +08:00
|
|
|
return abfd->arch_info->mach;
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_arch_bits_per_byte
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
unsigned int bfd_arch_bits_per_byte (bfd *abfd);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Return the number of bits in one of the BFD @var{abfd}'s
|
|
|
|
architecture's bytes.
|
|
|
|
*/
|
|
|
|
|
|
|
|
unsigned int
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_arch_bits_per_byte (bfd *abfd)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
return abfd->arch_info->bits_per_byte;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_arch_bits_per_address
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
unsigned int bfd_arch_bits_per_address (bfd *abfd);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Return the number of bits in one of the BFD @var{abfd}'s
|
|
|
|
architecture's addresses.
|
|
|
|
*/
|
|
|
|
|
|
|
|
unsigned int
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_arch_bits_per_address (bfd *abfd)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
return abfd->arch_info->bits_per_address;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2000-11-08 03:11:31 +08:00
|
|
|
INTERNAL_FUNCTION
|
1999-05-03 15:29:11 +08:00
|
|
|
bfd_default_compatible
|
|
|
|
|
|
|
|
SYNOPSIS
|
|
|
|
const bfd_arch_info_type *bfd_default_compatible
|
2003-06-29 18:06:40 +08:00
|
|
|
(const bfd_arch_info_type *a, const bfd_arch_info_type *b);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
The default function for testing for compatibility.
|
|
|
|
*/
|
|
|
|
|
|
|
|
const bfd_arch_info_type *
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_default_compatible (const bfd_arch_info_type *a,
|
|
|
|
const bfd_arch_info_type *b)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
if (a->arch != b->arch)
|
|
|
|
return NULL;
|
|
|
|
|
2002-03-13 15:30:45 +08:00
|
|
|
if (a->bits_per_word != b->bits_per_word)
|
|
|
|
return NULL;
|
|
|
|
|
1999-05-03 15:29:11 +08:00
|
|
|
if (a->mach > b->mach)
|
|
|
|
return a;
|
|
|
|
|
|
|
|
if (b->mach > a->mach)
|
|
|
|
return b;
|
|
|
|
|
|
|
|
return a;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
INTERNAL_FUNCTION
|
|
|
|
bfd_default_scan
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_boolean bfd_default_scan
|
|
|
|
(const struct bfd_arch_info *info, const char *string);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
The default function for working out whether this is an
|
|
|
|
architecture hit and a machine hit.
|
|
|
|
*/
|
|
|
|
|
2002-11-30 16:39:46 +08:00
|
|
|
bfd_boolean
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_default_scan (const bfd_arch_info_type *info, const char *string)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
const char *ptr_src;
|
|
|
|
const char *ptr_tst;
|
|
|
|
unsigned long number;
|
|
|
|
enum bfd_architecture arch;
|
|
|
|
const char *printable_name_colon;
|
|
|
|
|
|
|
|
/* Exact match of the architecture name (ARCH_NAME) and also the
|
2000-11-10 12:28:20 +08:00
|
|
|
default architecture? */
|
1999-05-03 15:29:11 +08:00
|
|
|
if (strcasecmp (string, info->arch_name) == 0
|
|
|
|
&& info->the_default)
|
2002-11-30 16:39:46 +08:00
|
|
|
return TRUE;
|
1999-05-03 15:29:11 +08:00
|
|
|
|
2000-11-10 12:28:20 +08:00
|
|
|
/* Exact match of the machine name (PRINTABLE_NAME)? */
|
1999-05-03 15:29:11 +08:00
|
|
|
if (strcasecmp (string, info->printable_name) == 0)
|
2002-11-30 16:39:46 +08:00
|
|
|
return TRUE;
|
2000-11-08 03:11:31 +08:00
|
|
|
|
1999-05-03 15:29:11 +08:00
|
|
|
/* Given that printable_name contains no colon, attempt to match:
|
2000-11-10 12:28:20 +08:00
|
|
|
ARCH_NAME [ ":" ] PRINTABLE_NAME? */
|
1999-05-03 15:29:11 +08:00
|
|
|
printable_name_colon = strchr (info->printable_name, ':');
|
|
|
|
if (printable_name_colon == NULL)
|
|
|
|
{
|
Touches most files in bfd/, so likely will be blamed for everything..
o bfd_read and bfd_write lose an unnecessary param and become
bfd_bread and bfd_bwrite.
o bfd_*alloc now all take a bfd_size_type arg, and will error if
size_t is too small. eg. 32 bit host, 64 bit bfd, verrry big files
or bugs in linker scripts etc.
o file_ptr becomes a bfd_signed_vma. Besides matching sizes with
various other types involved in handling sections, this should make
it easier for bfd to support a 64 bit off_t on 32 bit hosts that
provide it.
o I've made the H_GET_* and H_PUT_* macros (which invoke bfd_h_{get,put}_*)
generally available. They now cast their args to bfd_vma and
bfd_byte * as appropriate, which removes a swag of casts from the
source.
o Bug fixes to bfd_get8, aix386_core_vec, elf32_h8_relax_section, and
aout-encap.c.
o Zillions of formatting and -Wconversion fixes.
2001-09-18 17:57:26 +08:00
|
|
|
size_t strlen_arch_name = strlen (info->arch_name);
|
1999-05-03 15:29:11 +08:00
|
|
|
if (strncasecmp (string, info->arch_name, strlen_arch_name) == 0)
|
|
|
|
{
|
|
|
|
if (string[strlen_arch_name] == ':')
|
|
|
|
{
|
|
|
|
if (strcasecmp (string + strlen_arch_name + 1,
|
|
|
|
info->printable_name) == 0)
|
2002-11-30 16:39:46 +08:00
|
|
|
return TRUE;
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
if (strcasecmp (string + strlen_arch_name,
|
|
|
|
info->printable_name) == 0)
|
2002-11-30 16:39:46 +08:00
|
|
|
return TRUE;
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>;
|
2000-11-10 12:28:20 +08:00
|
|
|
Attempt to match: <arch> <mach>? */
|
1999-05-03 15:29:11 +08:00
|
|
|
if (printable_name_colon != NULL)
|
|
|
|
{
|
Touches most files in bfd/, so likely will be blamed for everything..
o bfd_read and bfd_write lose an unnecessary param and become
bfd_bread and bfd_bwrite.
o bfd_*alloc now all take a bfd_size_type arg, and will error if
size_t is too small. eg. 32 bit host, 64 bit bfd, verrry big files
or bugs in linker scripts etc.
o file_ptr becomes a bfd_signed_vma. Besides matching sizes with
various other types involved in handling sections, this should make
it easier for bfd to support a 64 bit off_t on 32 bit hosts that
provide it.
o I've made the H_GET_* and H_PUT_* macros (which invoke bfd_h_{get,put}_*)
generally available. They now cast their args to bfd_vma and
bfd_byte * as appropriate, which removes a swag of casts from the
source.
o Bug fixes to bfd_get8, aix386_core_vec, elf32_h8_relax_section, and
aout-encap.c.
o Zillions of formatting and -Wconversion fixes.
2001-09-18 17:57:26 +08:00
|
|
|
size_t colon_index = printable_name_colon - info->printable_name;
|
1999-05-03 15:29:11 +08:00
|
|
|
if (strncasecmp (string, info->printable_name, colon_index) == 0
|
|
|
|
&& strcasecmp (string + colon_index,
|
|
|
|
info->printable_name + colon_index + 1) == 0)
|
2002-11-30 16:39:46 +08:00
|
|
|
return TRUE;
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>; Do not
|
2003-11-25 02:06:40 +08:00
|
|
|
attempt to match just <mach>, it could be ambiguous. This test
|
2000-11-08 03:11:31 +08:00
|
|
|
is left until later. */
|
1999-05-03 15:29:11 +08:00
|
|
|
|
2000-11-10 12:28:20 +08:00
|
|
|
/* NOTE: The below is retained for compatibility only. Please do
|
|
|
|
not add to this code. */
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
/* See how much of the supplied string matches with the
|
|
|
|
architecture, eg the string m68k:68020 would match the 68k entry
|
2000-11-10 12:28:20 +08:00
|
|
|
up to the :, then we get left with the machine number. */
|
1999-05-03 15:29:11 +08:00
|
|
|
|
2000-11-08 03:11:31 +08:00
|
|
|
for (ptr_src = string, ptr_tst = info->arch_name;
|
1999-05-03 15:29:11 +08:00
|
|
|
*ptr_src && *ptr_tst;
|
2000-11-08 03:11:31 +08:00
|
|
|
ptr_src++, ptr_tst++)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
2000-11-10 12:28:20 +08:00
|
|
|
if (*ptr_src != *ptr_tst)
|
|
|
|
break;
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Chewed up as much of the architecture as will match, skip any
|
2000-11-10 12:28:20 +08:00
|
|
|
colons. */
|
1999-05-03 15:29:11 +08:00
|
|
|
if (*ptr_src == ':')
|
|
|
|
ptr_src++;
|
2000-11-08 03:11:31 +08:00
|
|
|
|
1999-05-03 15:29:11 +08:00
|
|
|
if (*ptr_src == 0)
|
|
|
|
{
|
2000-11-10 12:28:20 +08:00
|
|
|
/* Nothing more, then only keep this one if it is the default
|
|
|
|
machine for this architecture. */
|
1999-05-03 15:29:11 +08:00
|
|
|
return info->the_default;
|
|
|
|
}
|
|
|
|
|
|
|
|
number = 0;
|
2001-09-19 13:33:36 +08:00
|
|
|
while (ISDIGIT (*ptr_src))
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
2000-11-10 12:28:20 +08:00
|
|
|
number = number * 10 + *ptr_src - '0';
|
1999-05-03 15:29:11 +08:00
|
|
|
ptr_src++;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* NOTE: The below is retained for compatibility only.
|
2000-11-08 03:11:31 +08:00
|
|
|
PLEASE DO NOT ADD TO THIS CODE. */
|
1999-05-03 15:29:11 +08:00
|
|
|
|
2000-11-08 03:11:31 +08:00
|
|
|
switch (number)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
/* FIXME: These are needed to parse IEEE objects. */
|
2000-07-11 02:29:39 +08:00
|
|
|
/* The following seven case's are here only for compatibility with
|
|
|
|
older binutils (at least IEEE objects from binutils 2.9.1 require
|
|
|
|
them). */
|
|
|
|
case bfd_mach_m68000:
|
|
|
|
case bfd_mach_m68010:
|
|
|
|
case bfd_mach_m68020:
|
|
|
|
case bfd_mach_m68030:
|
|
|
|
case bfd_mach_m68040:
|
|
|
|
case bfd_mach_m68060:
|
|
|
|
case bfd_mach_cpu32:
|
|
|
|
arch = bfd_arch_m68k;
|
|
|
|
break;
|
2000-11-08 03:11:31 +08:00
|
|
|
case 68000:
|
1999-05-03 15:29:11 +08:00
|
|
|
arch = bfd_arch_m68k;
|
|
|
|
number = bfd_mach_m68000;
|
|
|
|
break;
|
|
|
|
case 68010:
|
|
|
|
arch = bfd_arch_m68k;
|
|
|
|
number = bfd_mach_m68010;
|
|
|
|
break;
|
|
|
|
case 68020:
|
|
|
|
arch = bfd_arch_m68k;
|
|
|
|
number = bfd_mach_m68020;
|
|
|
|
break;
|
|
|
|
case 68030:
|
|
|
|
arch = bfd_arch_m68k;
|
|
|
|
number = bfd_mach_m68030;
|
|
|
|
break;
|
|
|
|
case 68040:
|
|
|
|
arch = bfd_arch_m68k;
|
|
|
|
number = bfd_mach_m68040;
|
|
|
|
break;
|
|
|
|
case 68060:
|
|
|
|
arch = bfd_arch_m68k;
|
|
|
|
number = bfd_mach_m68060;
|
|
|
|
break;
|
|
|
|
case 68332:
|
|
|
|
arch = bfd_arch_m68k;
|
|
|
|
number = bfd_mach_cpu32;
|
|
|
|
break;
|
2001-03-07 04:15:27 +08:00
|
|
|
case 5200:
|
|
|
|
arch = bfd_arch_m68k;
|
2006-03-06 21:42:05 +08:00
|
|
|
number = bfd_mach_mcf_isa_a_nodiv;
|
2001-03-07 04:15:27 +08:00
|
|
|
break;
|
|
|
|
case 5206:
|
|
|
|
arch = bfd_arch_m68k;
|
2006-03-06 21:42:05 +08:00
|
|
|
number = bfd_mach_mcf_isa_a_mac;
|
2001-03-07 04:15:27 +08:00
|
|
|
break;
|
|
|
|
case 5307:
|
|
|
|
arch = bfd_arch_m68k;
|
2006-03-06 21:42:05 +08:00
|
|
|
number = bfd_mach_mcf_isa_a_mac;
|
2001-03-07 04:15:27 +08:00
|
|
|
break;
|
|
|
|
case 5407:
|
|
|
|
arch = bfd_arch_m68k;
|
2006-03-06 21:42:05 +08:00
|
|
|
number = bfd_mach_mcf_isa_b_nousp_mac;
|
2001-03-07 04:15:27 +08:00
|
|
|
break;
|
2003-10-21 21:28:59 +08:00
|
|
|
case 5282:
|
|
|
|
arch = bfd_arch_m68k;
|
2006-03-06 21:42:05 +08:00
|
|
|
number = bfd_mach_mcf_isa_aplus_emac;
|
2003-10-21 21:28:59 +08:00
|
|
|
break;
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
case 32000:
|
|
|
|
arch = bfd_arch_we32k;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 3000:
|
|
|
|
arch = bfd_arch_mips;
|
|
|
|
number = bfd_mach_mips3000;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 4000:
|
|
|
|
arch = bfd_arch_mips;
|
|
|
|
number = bfd_mach_mips4000;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 6000:
|
|
|
|
arch = bfd_arch_rs6000;
|
|
|
|
break;
|
|
|
|
|
bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.
bfd:
* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
(bfd_mach_sh3_dsp): Likewise.
(bfd_mach_sh4): Reinstate.
(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
* bfd-in2.h: Regenerate.
* coff-sh.c (struct sh_opcode): flags is no longer short.
(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
(sh_opcodes): No longer const.
(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
(sh_insn_uses_reg): Check for USESAS and USESR8.
(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
(_bfd_sh_align_load_span): Return early for SH4.
Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
Take into account that field b of a parallel processing insn
could be mistaken for a separate insn.
* cpu-sh.c (arch_info_struct): New array elements for
sh2, sh-dsp and sh3-dsp.
Reinstate element for sh4.
(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
(SH4_NEXT): Reinstate.
(SH3_NEXT, SH3E_NEXT): Adjust.
* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
* elf32-sh.c (sh_elf_set_private_flags): New function.
(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
(sh_elf_merge_private_data): New function.
(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
(bfd_elf32_bfd_merge_private_bfd_data): Change to
sh_elf_merge_private_data.
gas:
* config/tc-sh.c ("elf/sh.h"): Include.
(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
(md.begin): Initialize target_arch.
Only include opcodes in has table that match selected architecture.
(parse_reg): Recognize register names for sh-dsp.
(parse_at): Recognize post-modify addressing.
(get_operands): The leading space is now optional.
(get_specific): Remove FDREG_N support. Add support for sh-dsp
arguments. Update valid_arch.
(build_Mytes): Add support for SDT_REG_N.
(find_cooked_opcode): New function, broken out of md_assemble.
(assemble_ppi, sh_elf_final_processing): New functions.
(md_assemble): Use find_cooked_opcode and assemble_ppi.
(md_longopts, md_parse_option): New option: -dsp.
* config/tc-sh.h (elf_tc_final_processing): Define.
(sh_elf_final_processing): Declare.
include/elf:
* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.
opcodes:
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 08:33:36 +08:00
|
|
|
case 7410:
|
|
|
|
arch = bfd_arch_sh;
|
|
|
|
number = bfd_mach_sh_dsp;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 7708:
|
|
|
|
arch = bfd_arch_sh;
|
|
|
|
number = bfd_mach_sh3;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 7729:
|
|
|
|
arch = bfd_arch_sh;
|
|
|
|
number = bfd_mach_sh3_dsp;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 7750:
|
|
|
|
arch = bfd_arch_sh;
|
|
|
|
number = bfd_mach_sh4;
|
|
|
|
break;
|
|
|
|
|
2000-11-08 03:11:31 +08:00
|
|
|
default:
|
2002-11-30 16:39:46 +08:00
|
|
|
return FALSE;
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
|
|
|
|
2000-11-08 03:11:31 +08:00
|
|
|
if (arch != info->arch)
|
2002-11-30 16:39:46 +08:00
|
|
|
return FALSE;
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
if (number != info->mach)
|
2002-11-30 16:39:46 +08:00
|
|
|
return FALSE;
|
1999-05-03 15:29:11 +08:00
|
|
|
|
2002-11-30 16:39:46 +08:00
|
|
|
return TRUE;
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_get_arch_info
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Return the architecture info struct in @var{abfd}.
|
|
|
|
*/
|
|
|
|
|
|
|
|
const bfd_arch_info_type *
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_get_arch_info (bfd *abfd)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
return abfd->arch_info;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_lookup_arch
|
|
|
|
|
|
|
|
SYNOPSIS
|
|
|
|
const bfd_arch_info_type *bfd_lookup_arch
|
2003-06-29 18:06:40 +08:00
|
|
|
(enum bfd_architecture arch, unsigned long machine);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
2003-11-25 02:06:40 +08:00
|
|
|
Look for the architecture info structure which matches the
|
1999-05-03 15:29:11 +08:00
|
|
|
arguments @var{arch} and @var{machine}. A machine of 0 matches the
|
|
|
|
machine/architecture structure which marks itself as the
|
2002-04-20 11:25:20 +08:00
|
|
|
default.
|
1999-05-03 15:29:11 +08:00
|
|
|
*/
|
|
|
|
|
2000-11-08 03:11:31 +08:00
|
|
|
const bfd_arch_info_type *
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_lookup_arch (enum bfd_architecture arch, unsigned long machine)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
|
|
|
const bfd_arch_info_type * const *app, *ap;
|
|
|
|
|
|
|
|
for (app = bfd_archures_list; *app != NULL; app++)
|
|
|
|
{
|
|
|
|
for (ap = *app; ap != NULL; ap = ap->next)
|
|
|
|
{
|
|
|
|
if (ap->arch == arch
|
|
|
|
&& (ap->mach == machine
|
|
|
|
|| (machine == 0 && ap->the_default)))
|
|
|
|
return ap;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_printable_arch_mach
|
|
|
|
|
|
|
|
SYNOPSIS
|
|
|
|
const char *bfd_printable_arch_mach
|
2003-06-29 18:06:40 +08:00
|
|
|
(enum bfd_architecture arch, unsigned long machine);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Return a printable string representing the architecture and
|
2000-11-08 03:11:31 +08:00
|
|
|
machine type.
|
1999-05-03 15:29:11 +08:00
|
|
|
|
|
|
|
This routine is depreciated.
|
|
|
|
*/
|
|
|
|
|
|
|
|
const char *
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_printable_arch_mach (enum bfd_architecture arch, unsigned long machine)
|
1999-05-03 15:29:11 +08:00
|
|
|
{
|
2000-11-10 12:28:20 +08:00
|
|
|
const bfd_arch_info_type *ap = bfd_lookup_arch (arch, machine);
|
1999-05-03 15:29:11 +08:00
|
|
|
|
2000-11-10 12:28:20 +08:00
|
|
|
if (ap)
|
|
|
|
return ap->printable_name;
|
|
|
|
return "UNKNOWN!";
|
1999-05-03 15:29:11 +08:00
|
|
|
}
|
2000-01-14 06:10:36 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_octets_per_byte
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
unsigned int bfd_octets_per_byte (bfd *abfd);
|
2000-01-14 06:10:36 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
Return the number of octets (8-bit quantities) per target byte
|
|
|
|
(minimum addressable unit). In most cases, this will be one, but some
|
|
|
|
DSP targets have 16, 32, or even 48 bits per byte.
|
|
|
|
*/
|
|
|
|
|
2000-02-21 20:01:27 +08:00
|
|
|
unsigned int
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_octets_per_byte (bfd *abfd)
|
2000-01-14 06:10:36 +08:00
|
|
|
{
|
2000-11-10 12:28:20 +08:00
|
|
|
return bfd_arch_mach_octets_per_byte (bfd_get_arch (abfd),
|
|
|
|
bfd_get_mach (abfd));
|
2000-01-14 06:10:36 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
FUNCTION
|
|
|
|
bfd_arch_mach_octets_per_byte
|
|
|
|
|
|
|
|
SYNOPSIS
|
2003-06-29 18:06:40 +08:00
|
|
|
unsigned int bfd_arch_mach_octets_per_byte
|
|
|
|
(enum bfd_architecture arch, unsigned long machine);
|
2000-01-14 06:10:36 +08:00
|
|
|
|
|
|
|
DESCRIPTION
|
|
|
|
See bfd_octets_per_byte.
|
2000-11-08 03:11:31 +08:00
|
|
|
|
2000-01-14 06:10:36 +08:00
|
|
|
This routine is provided for those cases where a bfd * is not
|
|
|
|
available
|
|
|
|
*/
|
|
|
|
|
2000-02-21 20:01:27 +08:00
|
|
|
unsigned int
|
2003-06-29 18:06:40 +08:00
|
|
|
bfd_arch_mach_octets_per_byte (enum bfd_architecture arch,
|
|
|
|
unsigned long mach)
|
2000-01-14 06:10:36 +08:00
|
|
|
{
|
2000-11-10 12:28:20 +08:00
|
|
|
const bfd_arch_info_type *ap = bfd_lookup_arch (arch, mach);
|
2000-11-08 03:11:31 +08:00
|
|
|
|
2000-11-10 12:28:20 +08:00
|
|
|
if (ap)
|
|
|
|
return ap->bits_per_byte / 8;
|
|
|
|
return 1;
|
2000-01-14 06:10:36 +08:00
|
|
|
}
|