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fix(ast2700): fix mpll calculate statement

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pll_reg.b.bypass equal to 1U, bypass the mpll calculating
pll_reg.b.bypass equal to 0U, need to calculate mpll

Change-Id: I6cace1509d9429a97c7c9481dc1e2e4f95134d6c
Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>
This commit is contained in:
Kevin Chen 2024-07-09 18:15:28 +08:00
parent 80cd7dd1bb
commit aa09622233
1 changed files with 1 additions and 1 deletions
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2
plat/aspeed/ast2700/plat_bl31_setup.c
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@ -174,7 +174,7 @@ static uint32_t plat_get_pll_rate(int pll_idx)
break;
}
} else {
if (pll_reg.b.bypass != 0U) {
if (pll_reg.b.bypass == 0U) {
if (pll_idx == PLAT_CLK_MPLL) {
/* F = 25Mhz * [M / (n + 1)] / (p + 1) */
mul = (pll_reg.b.m) / ((pll_reg.b.n + 1));