From 1b1b40a941b62a845e57ca8d2bf754396b1b5dcb Mon Sep 17 00:00:00 2001 From: Jens Wiklander Date: Thu, 31 Oct 2024 16:34:37 +0100 Subject: [PATCH 1/3] fix(qemu): fix build error with spmd Currently when building with PLAT=qemu SPD=spmd SPMC_AT_EL3=1 SPMD_SPM_AT_SEL2=0, there is a build error since plat_spmd_handle_group0_interrupt() is called irrespective of SPMC_AT_EL3. Fix this by making plat_spmd_handle_group0_interrupt() available if SPD_spmd is defined only. Change-Id: If5f650d2bd3675cbb4b509e9e3743d3865d7c812 Signed-off-by: Jens Wiklander --- plat/qemu/common/qemu_common.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/plat/qemu/common/qemu_common.c b/plat/qemu/common/qemu_common.c index 068c69c0d..07026730c 100644 --- a/plat/qemu/common/qemu_common.c +++ b/plat/qemu/common/qemu_common.c @@ -198,16 +198,17 @@ int plat_spmc_shmem_reclaim(struct ffa_mtd *desc) } #endif -#if defined(SPD_spmd) && (SPMC_AT_EL3 == 0) -/* - * A dummy implementation of the platform handler for Group0 secure interrupt. - */ +#if defined(SPD_spmd) int plat_spmd_handle_group0_interrupt(uint32_t intid) { + /* + * Currently, there are no sources of Group0 secure interrupt + * enabled for QEMU. + */ (void)intid; return -1; } -#endif /*defined(SPD_spmd) && (SPMC_AT_EL3 == 0)*/ +#endif /*defined(SPD_spmd)*/ #if ENABLE_RME /* From eee52dac2c3e6b7c9ac51624c6200d2201e65bc2 Mon Sep 17 00:00:00 2001 From: Jens Wiklander Date: Fri, 1 Nov 2024 15:58:28 +0100 Subject: [PATCH 2/3] fix(qemu): fix EL3-SPMC data store alignment With PLAT=qemu, the EL3-SPMC data store is provided as an array of uint8_t and implicitly with a 1 byte alignment. But the way the data store is used it must have a larger alignment, so change to double-word alignment for maximum compatibility. Change-Id: I4e9b901889078fee4b87f8333257bdc076386572 Signed-off-by: Jens Wiklander --- plat/qemu/common/qemu_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plat/qemu/common/qemu_common.c b/plat/qemu/common/qemu_common.c index 07026730c..9ccb2c8a3 100644 --- a/plat/qemu/common/qemu_common.c +++ b/plat/qemu/common/qemu_common.c @@ -178,7 +178,7 @@ int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size) */ #define PLAT_SPMC_SHMEM_DATASTORE_SIZE 64 * 1024 -uint8_t plat_spmc_shmem_datastore[PLAT_SPMC_SHMEM_DATASTORE_SIZE]; +uint8_t plat_spmc_shmem_datastore[PLAT_SPMC_SHMEM_DATASTORE_SIZE] __aligned(2 * sizeof(long)); int plat_spmc_shmem_datastore_get(uint8_t **datastore, size_t *size) { From 78a91582b0254ab8ea53a38e5f833c8b2ebb26a9 Mon Sep 17 00:00:00 2001 From: Jens Wiklander Date: Fri, 1 Nov 2024 16:07:02 +0100 Subject: [PATCH 3/3] feat(qemu): increase size of bl31 Increase BL31 size to have room to spare for debugging with EL3 SPMC. Change-Id: I6e260a284ed2aa5d515b45be90ee2cdeded9c6a9 Signed-off-by: Jens Wiklander --- plat/qemu/qemu/include/platform_def.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plat/qemu/qemu/include/platform_def.h b/plat/qemu/qemu/include/platform_def.h index f78be908f..0c85b1edc 100644 --- a/plat/qemu/qemu/include/platform_def.h +++ b/plat/qemu/qemu/include/platform_def.h @@ -150,7 +150,7 @@ * Put BL3-1 at the top of the Trusted SRAM. BL31_BASE is calculated using the * current BL3-1 debug size plus a little space for growth. */ -#define BL31_BASE (BL31_LIMIT - 0x60000) +#define BL31_BASE (BL31_LIMIT - 0x70000) #define BL31_LIMIT (BL_RAM_BASE + BL_RAM_SIZE - FW_HANDOFF_SIZE) #define BL31_PROGBITS_LIMIT BL1_RW_BASE