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Add neon SIMD alpha blending blitter
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@ -1176,6 +1176,114 @@ static void SDL_TARGETING("avx2") Blit8888to8888PixelAlphaSwizzleAVX2(SDL_BlitIn
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#endif
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#if defined(SDL_NEON_INTRINSICS) && (__ARM_ARCH >= 8)
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static void Blit8888to8888PixelAlphaSwizzleNEON(SDL_BlitInfo *info)
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{
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int width = info->dst_w;
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int height = info->dst_h;
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Uint8 *src = info->src;
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int srcskip = info->src_skip;
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Uint8 *dst = info->dst;
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int dstskip = info->dst_skip;
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const SDL_PixelFormatDetails *srcfmt = info->src_fmt;
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const SDL_PixelFormatDetails *dstfmt = info->dst_fmt;
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// The byte offsets for the start of each pixel
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const uint8x16_t mask_offsets = vreinterpretq_u8_u64(vcombine_u64(
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vcreate_u64(0x0404040400000000), vcreate_u64(0x0c0c0c0c08080808)));
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const uint8x16_t convert_mask = vreinterpretq_u8_u32(vaddq_u32(
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vreinterpretq_u32_u8(mask_offsets),
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vdupq_n_u32(
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((srcfmt->Rshift >> 3) << dstfmt->Rshift) |
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((srcfmt->Gshift >> 3) << dstfmt->Gshift) |
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((srcfmt->Bshift >> 3) << dstfmt->Bshift))));
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const uint8x16_t alpha_splat_mask = vaddq_u8(vdupq_n_u8(srcfmt->Ashift >> 3), mask_offsets);
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const uint8x16_t alpha_fill_mask = vreinterpretq_u8_u32(vdupq_n_u32(dstfmt->Amask));
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while (height--) {
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int i = 0;
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for (; i + 4 <= width; i += 4) {
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// Load 4 src pixels
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uint8x16_t src128 = vld1q_u8(src);
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// Load 4 dst pixels
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uint8x16_t dst128 = vld1q_u8(dst);
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// Extract the alpha from each pixel and splat it into all the channels
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uint8x16_t srcA = vqtbl1q_u8(src128, alpha_splat_mask);
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// Convert to dst format
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src128 = vqtbl1q_u8(src128, convert_mask);
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// Set the alpha channels of src to 255
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src128 = vorrq_u8(src128, alpha_fill_mask);
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// 255 - srcA = ~srcA
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uint8x16_t srcInvA = vmvnq_u8(srcA);
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// Result initialized with 1, this is for truncated divide later
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uint16x8_t res_lo = vdupq_n_u16(1);
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uint16x8_t res_hi = vdupq_n_u16(1);
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// res = alpha * src + (255 - alpha) * dst
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res_lo = vmlal_u8(res_lo, vget_low_u8(srcA), vget_low_u8(src128));
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res_lo = vmlal_u8(res_lo, vget_low_u8(srcInvA), vget_low_u8(dst128));
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res_hi = vmlal_high_u8(res_hi, srcA, src128);
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res_hi = vmlal_high_u8(res_hi, srcInvA, dst128);
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// Now result has +1 already added for truncated division
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// dst = (res + (res >> 8)) >> 8
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uint8x8_t temp;
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temp = vaddhn_u16(res_lo, vshrq_n_u16(res_lo, 8));
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dst128 = vaddhn_high_u16(temp, res_hi, vshrq_n_u16(res_hi, 8));
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// For rounded division remove the constant 1 and change first two vmlal_u8 to vmull_u8
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// Then replace two previous lines with following code:
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// temp = vraddhn_u16(res_lo, vrshrq_n_u16(res_lo, 8));
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// dst128 = vraddhn_high_u16(temp, res_hi, vrshrq_n_u16(res_hi, 8));
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// Save the result
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vst1q_u8(dst, dst128);
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src += 16;
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dst += 16;
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}
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// Process 1 pixel per iteration, max 3 iterations, same calculations as above
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for (; i < width; ++i) {
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// Top 32-bits will be not used in src32 & dst32
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uint8x8_t src32 = vreinterpret_u8_u32(vld1_dup_u32((Uint32*)src));
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uint8x8_t dst32 = vreinterpret_u8_u32(vld1_dup_u32((Uint32*)dst));
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uint8x8_t srcA = vtbl1_u8(src32, vget_low_u8(alpha_splat_mask));
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src32 = vtbl1_u8(src32, vget_low_u8(convert_mask));
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src32 = vorr_u8(src32, vget_low_u8(alpha_fill_mask));
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uint8x8_t srcInvA = vmvn_u8(srcA);
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uint16x8_t res = vdupq_n_u16(1);
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res = vmlal_u8(res, srcA, src32);
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res = vmlal_u8(res, srcInvA, dst32);
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dst32 = vaddhn_u16(res, vshrq_n_u16(res, 8));
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// Save the result, only low 32-bits
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vst1_lane_u32((Uint32*)dst, vreinterpret_u32_u8(dst32), 0);
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src += 4;
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dst += 4;
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}
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src += srcskip;
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dst += dstskip;
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}
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}
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#endif
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// General (slow) N->N blending with pixel alpha
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static void BlitNtoNPixelAlpha(SDL_BlitInfo *info)
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{
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@ -1256,11 +1364,18 @@ SDL_BlitFunc SDL_CalculateBlitA(SDL_Surface *surface)
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return Blit8888to8888PixelAlphaSwizzleSSE41;
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}
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#endif
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#if defined(SDL_NEON_INTRINSICS) && (__ARM_ARCH >= 8)
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// To prevent "unused function" compiler warnings/errors
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(void)Blit8888to8888PixelAlpha;
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(void)Blit8888to8888PixelAlphaSwizzle;
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return Blit8888to8888PixelAlphaSwizzleNEON;
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#else
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if (sf->format == df->format) {
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return Blit8888to8888PixelAlpha;
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} else {
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return Blit8888to8888PixelAlphaSwizzle;
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}
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#endif
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}
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return BlitNtoNPixelAlpha;
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