Samuel Holland ffe597d04d phy: rockchip-inno-usb2: Support multi-bit mask properties ... The "bvalid" and "id" interrupts can trigger on either the rising edge or the falling edge, so each interrupt has two enable bits and two status bits. This change allows using a single property for both bits, checking whether either bit is set. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-5-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>		2022-04-20 14:44:03 +05:30
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Kconfig	phy: rockchip: add naneng combo phy for RK3568	2022-02-24 20:13:52 +05:30
Makefile	phy: rockchip: add naneng combo phy for RK3568	2022-02-24 20:13:52 +05:30
phy-rockchip-dp.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 178	2019-05-30 11:29:19 -07:00
phy-rockchip-dphy-rx0.c	phy/rockchip: Use of_device_get_match_data()	2022-04-13 15:23:23 +05:30
phy-rockchip-emmc.c	phy: rockchip: emmc, add vendor prefix to dts properties	2021-01-13 17:28:24 +05:30
phy-rockchip-inno-csidphy.c	phy/rockchip: add Innosilicon-based CSI dphy	2021-06-21 09:26:13 +05:30
phy-rockchip-inno-dsidphy.c	phy: dphy: Correct clk_pre parameter	2022-02-02 10:33:04 +05:30
phy-rockchip-inno-hdmi.c	phy: rockchip: remove redundant initialization of pointer cfg	2021-06-21 09:22:37 +05:30
phy-rockchip-inno-usb2.c	phy: rockchip-inno-usb2: Support multi-bit mask properties	2022-04-20 14:44:03 +05:30
phy-rockchip-naneng-combphy.c	phy: rockchip: add naneng combo phy for RK3568	2022-02-24 20:13:52 +05:30
phy-rockchip-pcie.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 235	2019-06-19 17:09:07 +02:00
phy-rockchip-typec.c	phy/rockchip: Use of_device_get_match_data()	2022-04-13 15:23:23 +05:30
phy-rockchip-usb.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 235	2019-06-19 17:09:07 +02:00