linux/drivers/clk/rockchip
Sebastian Reichel ff94c8660d clk: rockchip: simplify rockchip_clk_add_lookup
rockchip_clk_add_lookup is only called from within the file,
so it can be made static. The additional checks are removed
with the following reasoning:

1. The data structure is initialized by rockchip_clk_init(),
   which is called by all rockchip platforms before the clocks
   are registered. Not doing so would result in an incomplete
   clock tree at the moment, which is a fatal error. In other
   parts of the kernel these kind of checks are usually
   omitted, so this was done here. The alternative is adding
   a pr_err to inform the kernel programmer adding a new platform
   about his incorrect code. Apart from that we are also not
   checking if the clock id is within the array boundings.

2. While not used so far by any rockchip platform, 0 is a valid
   clock identifier. To align rockchip closer to other ARM
   platforms we will start using it with rk3588.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20221018151407.63395-8-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-11-14 15:35:07 +01:00
..
clk-cpu.c clk: rockchip: allow additional mux options for cpu-clock frequency changes 2022-11-14 15:34:18 +01:00
clk-ddr.c clk: rockchip: Export rockchip_clk_register_ddrclk() 2020-09-22 15:16:37 +02:00
clk-half-divider.c clk: rockchip: Demote non-conformant kernel-doc header in half-divider 2021-01-26 00:24:05 +01:00
clk-inverter.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
clk-mmc-phase.c clk: rockchip: fix mmc get phase 2020-03-06 12:06:01 -08:00
clk-muxgrf.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 2019-06-05 17:36:37 +02:00
clk-pll.c clk: rockchip: add pll type for RK3588 2022-11-14 15:33:46 +01:00
clk-px30.c clk: rockchip: support more core div setting 2021-03-21 11:10:58 +01:00
clk-rk3036.c clk: rockchip: Add support for hclk_sfc on rk3036 2021-07-16 00:33:42 +02:00
clk-rk3128.c clk: rockchip: support more core div setting 2021-03-21 11:10:58 +01:00
clk-rk3188.c clk: rockchip: support more core div setting 2021-03-21 11:10:58 +01:00
clk-rk3228.c clk: rockchip: support more core div setting 2021-03-21 11:10:58 +01:00
clk-rk3288.c clk: rockchip: support more core div setting 2021-03-21 11:10:58 +01:00
clk-rk3308.c clk: rockchip: make rk3308 ddrphy4x clock critical 2021-07-29 12:43:11 +02:00
clk-rk3328.c clk: rockchip: support more core div setting 2021-03-21 11:10:58 +01:00
clk-rk3368.c clk: rockchip: support more core div setting 2021-03-21 11:10:58 +01:00
clk-rk3399.c clk: rockchip: drop module parts from rk3399 and rk3568 drivers 2021-11-02 17:59:00 -07:00
clk-rk3568.c clk: rockchip: Mark hclk_vo as critical on rk3568 2022-05-03 11:16:48 +02:00
clk-rv1108.c clk: rockchip: support more core div setting 2021-03-21 11:10:58 +01:00
clk-rv1126.c clk: rockchip: Add clock controller support for RV1126 SoC 2022-09-23 11:15:30 +02:00
clk.c clk: rockchip: simplify rockchip_clk_add_lookup 2022-11-14 15:35:07 +01:00
clk.h clk: rockchip: simplify rockchip_clk_add_lookup 2022-11-14 15:35:07 +01:00
Kconfig clk: rockchip: Add clock controller support for RV1126 SoC 2022-09-23 11:15:30 +02:00
Makefile clk: rockchip: Add clock controller support for RV1126 SoC 2022-09-23 11:15:30 +02:00
softrst.c clk: rockchip: Export rockchip_register_softrst() 2020-09-22 15:16:38 +02:00