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18efddee4f
cppcheck complains about potential null pointer dereference but it's rather an unnecessary assignment to NULL before walking through a list. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20210326215927.936377-7-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
340 lines
9.9 KiB
C
340 lines
9.9 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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//
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// Copyright (c) 2018 BayLibre, SAS.
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// Author: Jerome Brunet <jbrunet@baylibre.com>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/regmap.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include "axg-tdm-formatter.h"
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#define TDMOUT_CTRL0 0x00
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#define TDMOUT_CTRL0_BITNUM_MASK GENMASK(4, 0)
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#define TDMOUT_CTRL0_BITNUM(x) ((x) << 0)
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#define TDMOUT_CTRL0_SLOTNUM_MASK GENMASK(9, 5)
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#define TDMOUT_CTRL0_SLOTNUM(x) ((x) << 5)
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#define TDMOUT_CTRL0_INIT_BITNUM_MASK GENMASK(19, 15)
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#define TDMOUT_CTRL0_INIT_BITNUM(x) ((x) << 15)
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#define TDMOUT_CTRL0_ENABLE BIT(31)
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#define TDMOUT_CTRL0_RST_OUT BIT(29)
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#define TDMOUT_CTRL0_RST_IN BIT(28)
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#define TDMOUT_CTRL1 0x04
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#define TDMOUT_CTRL1_TYPE_MASK GENMASK(6, 4)
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#define TDMOUT_CTRL1_TYPE(x) ((x) << 4)
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#define SM1_TDMOUT_CTRL1_GAIN_EN 7
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#define TDMOUT_CTRL1_MSB_POS_MASK GENMASK(12, 8)
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#define TDMOUT_CTRL1_MSB_POS(x) ((x) << 8)
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#define TDMOUT_CTRL1_SEL_SHIFT 24
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#define TDMOUT_CTRL1_GAIN_EN 26
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#define TDMOUT_CTRL1_WS_INV BIT(28)
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#define TDMOUT_SWAP 0x08
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#define TDMOUT_MASK0 0x0c
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#define TDMOUT_MASK1 0x10
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#define TDMOUT_MASK2 0x14
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#define TDMOUT_MASK3 0x18
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#define TDMOUT_STAT 0x1c
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#define TDMOUT_GAIN0 0x20
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#define TDMOUT_GAIN1 0x24
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#define TDMOUT_MUTE_VAL 0x28
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#define TDMOUT_MUTE0 0x2c
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#define TDMOUT_MUTE1 0x30
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#define TDMOUT_MUTE2 0x34
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#define TDMOUT_MUTE3 0x38
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#define TDMOUT_MASK_VAL 0x3c
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static const struct regmap_config axg_tdmout_regmap_cfg = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = TDMOUT_MASK_VAL,
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};
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static struct snd_soc_dai *
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axg_tdmout_get_be(struct snd_soc_dapm_widget *w)
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{
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struct snd_soc_dapm_path *p;
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struct snd_soc_dai *be;
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snd_soc_dapm_widget_for_each_sink_path(w, p) {
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if (!p->connect)
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continue;
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if (p->sink->id == snd_soc_dapm_dai_in)
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return (struct snd_soc_dai *)p->sink->priv;
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be = axg_tdmout_get_be(p->sink);
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if (be)
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return be;
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}
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return NULL;
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}
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static struct axg_tdm_stream *
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axg_tdmout_get_tdm_stream(struct snd_soc_dapm_widget *w)
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{
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struct snd_soc_dai *be = axg_tdmout_get_be(w);
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if (!be)
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return NULL;
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return be->playback_dma_data;
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}
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static void axg_tdmout_enable(struct regmap *map)
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{
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/* Apply both reset */
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regmap_update_bits(map, TDMOUT_CTRL0,
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TDMOUT_CTRL0_RST_OUT | TDMOUT_CTRL0_RST_IN, 0);
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/* Clear out reset before in reset */
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regmap_update_bits(map, TDMOUT_CTRL0,
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TDMOUT_CTRL0_RST_OUT, TDMOUT_CTRL0_RST_OUT);
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regmap_update_bits(map, TDMOUT_CTRL0,
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TDMOUT_CTRL0_RST_IN, TDMOUT_CTRL0_RST_IN);
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/* Actually enable tdmout */
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regmap_update_bits(map, TDMOUT_CTRL0,
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TDMOUT_CTRL0_ENABLE, TDMOUT_CTRL0_ENABLE);
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}
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static void axg_tdmout_disable(struct regmap *map)
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{
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regmap_update_bits(map, TDMOUT_CTRL0, TDMOUT_CTRL0_ENABLE, 0);
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}
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static int axg_tdmout_prepare(struct regmap *map,
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const struct axg_tdm_formatter_hw *quirks,
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struct axg_tdm_stream *ts)
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{
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unsigned int val, skew = quirks->skew_offset;
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/* Set the stream skew */
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switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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case SND_SOC_DAIFMT_DSP_A:
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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case SND_SOC_DAIFMT_DSP_B:
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skew += 1;
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break;
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default:
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pr_err("Unsupported format: %u\n",
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ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK);
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return -EINVAL;
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}
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val = TDMOUT_CTRL0_INIT_BITNUM(skew);
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/* Set the slot width */
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val |= TDMOUT_CTRL0_BITNUM(ts->iface->slot_width - 1);
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/* Set the slot number */
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val |= TDMOUT_CTRL0_SLOTNUM(ts->iface->slots - 1);
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regmap_update_bits(map, TDMOUT_CTRL0,
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TDMOUT_CTRL0_INIT_BITNUM_MASK |
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TDMOUT_CTRL0_BITNUM_MASK |
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TDMOUT_CTRL0_SLOTNUM_MASK, val);
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/* Set the sample width */
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val = TDMOUT_CTRL1_MSB_POS(ts->width - 1);
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/* FIFO data are arranged in chunks of 64bits */
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switch (ts->physical_width) {
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case 8:
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/* 8 samples of 8 bits */
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val |= TDMOUT_CTRL1_TYPE(0);
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break;
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case 16:
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/* 4 samples of 16 bits - right justified */
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val |= TDMOUT_CTRL1_TYPE(2);
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break;
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case 32:
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/* 2 samples of 32 bits - right justified */
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val |= TDMOUT_CTRL1_TYPE(4);
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break;
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default:
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pr_err("Unsupported physical width: %u\n",
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ts->physical_width);
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return -EINVAL;
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}
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/* If the sample clock is inverted, invert it back for the formatter */
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if (axg_tdm_lrclk_invert(ts->iface->fmt))
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val |= TDMOUT_CTRL1_WS_INV;
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regmap_update_bits(map, TDMOUT_CTRL1,
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(TDMOUT_CTRL1_TYPE_MASK | TDMOUT_CTRL1_MSB_POS_MASK |
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TDMOUT_CTRL1_WS_INV), val);
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/* Set static swap mask configuration */
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regmap_write(map, TDMOUT_SWAP, 0x76543210);
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return axg_tdm_formatter_set_channel_masks(map, ts, TDMOUT_MASK0);
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}
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static const struct snd_kcontrol_new axg_tdmout_controls[] = {
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SOC_DOUBLE("Lane 0 Volume", TDMOUT_GAIN0, 0, 8, 255, 0),
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SOC_DOUBLE("Lane 1 Volume", TDMOUT_GAIN0, 16, 24, 255, 0),
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SOC_DOUBLE("Lane 2 Volume", TDMOUT_GAIN1, 0, 8, 255, 0),
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SOC_DOUBLE("Lane 3 Volume", TDMOUT_GAIN1, 16, 24, 255, 0),
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SOC_SINGLE("Gain Enable Switch", TDMOUT_CTRL1,
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TDMOUT_CTRL1_GAIN_EN, 1, 0),
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};
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static const char * const axg_tdmout_sel_texts[] = {
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"IN 0", "IN 1", "IN 2",
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};
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static SOC_ENUM_SINGLE_DECL(axg_tdmout_sel_enum, TDMOUT_CTRL1,
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TDMOUT_CTRL1_SEL_SHIFT, axg_tdmout_sel_texts);
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static const struct snd_kcontrol_new axg_tdmout_in_mux =
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SOC_DAPM_ENUM("Input Source", axg_tdmout_sel_enum);
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static const struct snd_soc_dapm_widget axg_tdmout_dapm_widgets[] = {
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SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_tdmout_in_mux),
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SND_SOC_DAPM_PGA_E("ENC", SND_SOC_NOPM, 0, 0, NULL, 0,
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axg_tdm_formatter_event,
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(SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
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SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
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};
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static const struct snd_soc_dapm_route axg_tdmout_dapm_routes[] = {
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{ "SRC SEL", "IN 0", "IN 0" },
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{ "SRC SEL", "IN 1", "IN 1" },
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{ "SRC SEL", "IN 2", "IN 2" },
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{ "ENC", NULL, "SRC SEL" },
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{ "OUT", NULL, "ENC" },
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};
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static const struct snd_soc_component_driver axg_tdmout_component_drv = {
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.controls = axg_tdmout_controls,
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.num_controls = ARRAY_SIZE(axg_tdmout_controls),
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.dapm_widgets = axg_tdmout_dapm_widgets,
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.num_dapm_widgets = ARRAY_SIZE(axg_tdmout_dapm_widgets),
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.dapm_routes = axg_tdmout_dapm_routes,
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.num_dapm_routes = ARRAY_SIZE(axg_tdmout_dapm_routes),
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};
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static const struct axg_tdm_formatter_ops axg_tdmout_ops = {
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.get_stream = axg_tdmout_get_tdm_stream,
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.prepare = axg_tdmout_prepare,
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.enable = axg_tdmout_enable,
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.disable = axg_tdmout_disable,
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};
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static const struct axg_tdm_formatter_driver axg_tdmout_drv = {
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.component_drv = &axg_tdmout_component_drv,
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.regmap_cfg = &axg_tdmout_regmap_cfg,
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.ops = &axg_tdmout_ops,
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.quirks = &(const struct axg_tdm_formatter_hw) {
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.skew_offset = 1,
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},
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};
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static const struct axg_tdm_formatter_driver g12a_tdmout_drv = {
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.component_drv = &axg_tdmout_component_drv,
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.regmap_cfg = &axg_tdmout_regmap_cfg,
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.ops = &axg_tdmout_ops,
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.quirks = &(const struct axg_tdm_formatter_hw) {
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.skew_offset = 2,
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},
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};
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static const struct snd_kcontrol_new sm1_tdmout_controls[] = {
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SOC_DOUBLE("Lane 0 Volume", TDMOUT_GAIN0, 0, 8, 255, 0),
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SOC_DOUBLE("Lane 1 Volume", TDMOUT_GAIN0, 16, 24, 255, 0),
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SOC_DOUBLE("Lane 2 Volume", TDMOUT_GAIN1, 0, 8, 255, 0),
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SOC_DOUBLE("Lane 3 Volume", TDMOUT_GAIN1, 16, 24, 255, 0),
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SOC_SINGLE("Gain Enable Switch", TDMOUT_CTRL1,
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SM1_TDMOUT_CTRL1_GAIN_EN, 1, 0),
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};
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static const char * const sm1_tdmout_sel_texts[] = {
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"IN 0", "IN 1", "IN 2", "IN 3", "IN 4",
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};
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static SOC_ENUM_SINGLE_DECL(sm1_tdmout_sel_enum, TDMOUT_CTRL1,
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TDMOUT_CTRL1_SEL_SHIFT, sm1_tdmout_sel_texts);
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static const struct snd_kcontrol_new sm1_tdmout_in_mux =
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SOC_DAPM_ENUM("Input Source", sm1_tdmout_sel_enum);
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static const struct snd_soc_dapm_widget sm1_tdmout_dapm_widgets[] = {
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SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &sm1_tdmout_in_mux),
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SND_SOC_DAPM_PGA_E("ENC", SND_SOC_NOPM, 0, 0, NULL, 0,
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axg_tdm_formatter_event,
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(SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
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SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
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};
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static const struct snd_soc_dapm_route sm1_tdmout_dapm_routes[] = {
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{ "SRC SEL", "IN 0", "IN 0" },
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{ "SRC SEL", "IN 1", "IN 1" },
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{ "SRC SEL", "IN 2", "IN 2" },
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{ "SRC SEL", "IN 3", "IN 3" },
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{ "SRC SEL", "IN 4", "IN 4" },
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{ "ENC", NULL, "SRC SEL" },
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{ "OUT", NULL, "ENC" },
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};
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static const struct snd_soc_component_driver sm1_tdmout_component_drv = {
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.controls = sm1_tdmout_controls,
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.num_controls = ARRAY_SIZE(sm1_tdmout_controls),
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.dapm_widgets = sm1_tdmout_dapm_widgets,
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.num_dapm_widgets = ARRAY_SIZE(sm1_tdmout_dapm_widgets),
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.dapm_routes = sm1_tdmout_dapm_routes,
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.num_dapm_routes = ARRAY_SIZE(sm1_tdmout_dapm_routes),
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};
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static const struct axg_tdm_formatter_driver sm1_tdmout_drv = {
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.component_drv = &sm1_tdmout_component_drv,
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.regmap_cfg = &axg_tdmout_regmap_cfg,
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.ops = &axg_tdmout_ops,
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.quirks = &(const struct axg_tdm_formatter_hw) {
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.skew_offset = 2,
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},
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};
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static const struct of_device_id axg_tdmout_of_match[] = {
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{
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.compatible = "amlogic,axg-tdmout",
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.data = &axg_tdmout_drv,
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}, {
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.compatible = "amlogic,g12a-tdmout",
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.data = &g12a_tdmout_drv,
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}, {
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.compatible = "amlogic,sm1-tdmout",
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.data = &sm1_tdmout_drv,
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}, {}
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};
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MODULE_DEVICE_TABLE(of, axg_tdmout_of_match);
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static struct platform_driver axg_tdmout_pdrv = {
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.probe = axg_tdm_formatter_probe,
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.driver = {
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.name = "axg-tdmout",
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.of_match_table = axg_tdmout_of_match,
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},
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};
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module_platform_driver(axg_tdmout_pdrv);
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MODULE_DESCRIPTION("Amlogic AXG TDM output formatter driver");
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MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
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MODULE_LICENSE("GPL v2");
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