linux/include/dt-bindings/reset
Stephen Boyd b2ac878acd Merge branches 'clk-davinci-psc-da830', 'clk-renesas', 'clk-at91-recalc', 'clk-davinci' and 'clk-meson' into clk-next
* clk-davinci-psc-da830:
  clk: davinci: psc-da830: fix USB0 48MHz PHY clock registration

* clk-renesas:
  clk: renesas: cpg-mssr: Add support for R-Car E3
  clk: renesas: Add r8a77990 CPG Core Clock Definitions
  clk: renesas: rcar-gen2: Centralize quirks handling
  clk: renesas: r8a77980: Correct parent clock of PCIEC0
  clk: renesas: r8a7794: Fix LB clock divider
  clk: renesas: r8a7792: Fix LB clock divider
  clk: renesas: r8a7791/r8a7793: Fix LB clock divider
  clk: renesas: r8a7745: Fix LB clock divider
  clk: renesas: r8a7743: Fix LB clock divider
  clk: renesas: cpg-mssr: Add r8a77470 support
  clk: renesas: Add r8a77470 CPG Core Clock Definitions
  clk: renesas: r8a77965: Add MSIOF controller clocks

* clk-at91-recalc:
  clk: at91: PLL recalc_rate() now using cached MUL and DIV values

* clk-davinci:
  clk: davinci: Fix link errors when not all SoCs are enabled
  clk: davinci: psc: allow for dev == NULL
  clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE
  clk: davinci: pll: allow dev == NULL
  clk: davinci: psc-dm365: fix few clocks
  clk: davinci: pll-dm646x: keep PLL2 SYSCLK1 always enabled
  clk: davinci: psc-dm355: fix ASP0/1 clkdev lookups
  clk: davinci: pll-dm355: fix SYSCLKn parent names
  clk: davinci: pll-dm355: drop pll2_sysclk2

* clk-meson:
  clk: meson: axg: let mpll clocks round closest
  clk: meson: mpll: add round closest support
  clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICAL
  clk: meson: use SPDX license identifiers consistently
  clk: meson: drop CLK_SET_RATE_PARENT flag
  clk: meson-axg: Add AO Clock and Reset controller driver
  clk: meson: aoclk: refactor common code into dedicated file
  clk: meson: migrate to devm_of_clk_add_hw_provider API
  clk: meson: gxbb: add the video decoder clocks
  clk: meson: meson8b: add support for the NAND clocks
  dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings
  dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC
  clk: meson: gxbb: expose VDEC_1 and VDEC_HEVC clocks
  dt-bindings: clock: meson8b: export the NAND clock
2018-06-04 12:37:41 -07:00
..
altr,rst-mgr-a10.h dt-bindings: Add reset manager offsets for Arria10 2015-08-09 21:58:33 -05:00
altr,rst-mgr-a10sr.h dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets 2017-03-15 12:19:10 +01:00
altr,rst-mgr-s10.h dt-bindings: reset: Add reset manager offsets for Stratix10 2017-06-01 19:16:06 +02:00
altr,rst-mgr.h
amlogic,meson8b-clkc-reset.h dt-bindings: clock: meson8b: describe the embedded reset controller 2017-07-31 10:48:39 +02:00
amlogic,meson8b-reset.h dt-bindings: reset: Add bindings for the Meson SoC Reset Controller 2016-06-01 08:21:12 +02:00
amlogic,meson-axg-reset.h dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset Controller 2017-11-27 09:16:40 +01:00
amlogic,meson-gxbb-reset.h dt-bindings: reset: Add bindings for the Meson SoC Reset Controller 2016-06-01 08:21:12 +02:00
axg-aoclkc.h dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings 2018-05-15 14:07:11 +02:00
cortina,gemini-reset.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
gxbb-aoclkc.h dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings 2016-08-19 12:49:00 -07:00
hisi,hi6220-resets.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
imx7-reset.h reset: Add i.MX7 SRC reset driver 2017-03-15 12:18:49 +01:00
mt2701-resets.h dt-bindings: reset: mediatek: add entry for Mali-450 node to refer 2018-05-15 15:21:46 -07:00
mt7622-reset.h reset: mediatek: add reset controller dt-bindings required header for MT7622 SoC 2017-10-04 12:13:29 +02:00
mt8135-resets.h ARM: mediatek: DT: Move reset controller constants into common location 2015-11-24 18:58:12 +01:00
mt8173-resets.h ARM: mediatek: DT: Move reset controller constants into common location 2015-11-24 18:58:12 +01:00
oxsemi,ox810se.h dt-bindings: reset: oxnas: Add include file with reset indexes 2016-10-20 11:55:09 +02:00
oxsemi,ox820.h dt-bindings: reset: oxnas: Add include file with reset indexes 2016-10-20 11:55:09 +02:00
pistachio-resets.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
qcom,gcc-apq8084.h
qcom,gcc-ipq806x.h clk: qcom: Add support for NSS/GMAC clocks and resets 2015-05-30 17:04:36 -07:00
qcom,gcc-mdm9615.h dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC 2016-08-15 15:51:18 -07:00
qcom,gcc-msm8660.h
qcom,gcc-msm8916.h dt-bindings: Add #defines for MSM8916 clocks and resets 2015-03-23 16:09:20 -07:00
qcom,gcc-msm8960.h
qcom,gcc-msm8974.h
qcom,mmcc-apq8084.h clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support 2014-07-15 16:38:57 -07:00
qcom,mmcc-msm8960.h clk: qcom: Add support for APQ8064 multimedia clocks 2014-07-15 16:39:03 -07:00
qcom,mmcc-msm8974.h
snps,hsdk-reset.h ARC: reset: remove the misleading v1 suffix all over 2017-09-18 13:02:03 +02:00
stih407-resets.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
stih415-resets.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
stih416-resets.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
stm32mp1-resets.h dt-bindings: reset: add STM32MP1 resets 2018-03-27 10:44:03 +02:00
sun4i-a10-ccu.h clk: sunxi-ng: Add sun4i/sun7i CCU driver 2017-08-24 10:15:54 +02:00
sun5i-ccu.h clk: sunxi-ng: Add sun5i CCU driver 2017-01-23 11:45:29 +01:00
sun6i-a31-ccu.h clk: sunxi-ng: Add A31/A31s clocks 2016-08-25 22:31:43 +02:00
sun8i-a23-a33-ccu.h clk: sunxi-ng: Add A33 CCU support 2016-09-10 11:41:19 +02:00
sun8i-a83t-ccu.h clk: sunxi-ng: Add driver for A83T CCU 2017-06-07 15:32:16 +02:00
sun8i-de2.h dt-bindings: add binding for the Allwinner DE2 CCU 2017-06-07 15:32:12 +02:00
sun8i-h3-ccu.h clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver 2017-03-06 10:25:56 +01:00
sun8i-r40-ccu.h clk: sunxi-ng: support R40 SoC 2017-08-19 17:04:37 +08:00
sun8i-r-ccu.h clk: sunxi-ng: add support for PRCM CCUs 2017-04-04 17:43:52 +02:00
sun8i-v3s-ccu.h clk: sunxi-ng: add support for V3s CCU 2017-01-20 21:39:03 +01:00
sun9i-a80-ccu.h clk: sunxi-ng: Add A80 CCU 2017-01-30 08:37:30 +01:00
sun9i-a80-de.h clk: sunxi-ng: Add A80 Display Engine CCU 2017-01-30 08:38:30 +01:00
sun9i-a80-usb.h clk: sunxi-ng: Add A80 USB CCU 2017-01-30 08:37:51 +01:00
sun50i-a64-ccu.h clk: sunxi-ng: Add A64 clocks 2016-11-03 09:06:18 +01:00
sun50i-h6-ccu.h clk: sunxi-ng: add support for the Allwinner H6 CCU 2018-03-18 21:17:07 +01:00
sun50i-h6-r-ccu.h clk: sunxi-ng: add support for H6 PRCM CCU 2018-05-04 17:05:46 +02:00
tegra124-car.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
tegra186-reset.h dt-bindings: firmware: Add bindings for Tegra BPMP 2016-11-18 14:33:41 +01:00
tegra194-reset.h arm64: tegra: Add Tegra194 chip device tree 2018-03-08 14:31:13 +01:00
tegra210-car.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
ti-syscon.h Documentation: dt: reset: Add TI syscon reset binding 2016-06-29 23:39:10 +02:00