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This is on a custom board with a mapping driver access to an ST M50LPW080 chip. This chip is probed successfully with do_map_probe("jedec_probe",...). If I use the mtdchar interface to perform unlock->erase->program->lock on any of the 16 eraseblocks in the chip, the chip is left in FL_STATUS mode while the data structures believe that the chip is in FL_READY mode. Hence, any subsequent reads to any flash byte results in 0x80 being read. Signed-off-by: Shashi Rao <shashi@sun.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
109 lines
2.8 KiB
C
109 lines
2.8 KiB
C
#ifndef FWH_LOCK_H
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#define FWH_LOCK_H
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enum fwh_lock_state {
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FWH_UNLOCKED = 0,
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FWH_DENY_WRITE = 1,
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FWH_IMMUTABLE = 2,
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FWH_DENY_READ = 4,
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};
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struct fwh_xxlock_thunk {
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enum fwh_lock_state val;
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flstate_t state;
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};
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#define FWH_XXLOCK_ONEBLOCK_LOCK ((struct fwh_xxlock_thunk){ FWH_DENY_WRITE, FL_LOCKING})
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#define FWH_XXLOCK_ONEBLOCK_UNLOCK ((struct fwh_xxlock_thunk){ FWH_UNLOCKED, FL_UNLOCKING})
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/*
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* This locking/unlock is specific to firmware hub parts. Only one
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* is known that supports the Intel command set. Firmware
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* hub parts cannot be interleaved as they are on the LPC bus
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* so this code has not been tested with interleaved chips,
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* and will likely fail in that context.
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*/
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static int fwh_xxlock_oneblock(struct map_info *map, struct flchip *chip,
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unsigned long adr, int len, void *thunk)
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{
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struct cfi_private *cfi = map->fldrv_priv;
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struct fwh_xxlock_thunk *xxlt = (struct fwh_xxlock_thunk *)thunk;
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int ret;
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/* Refuse the operation if the we cannot look behind the chip */
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if (chip->start < 0x400000) {
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DEBUG( MTD_DEBUG_LEVEL3,
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"MTD %s(): chip->start: %lx wanted >= 0x400000\n",
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__func__, chip->start );
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return -EIO;
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}
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/*
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* lock block registers:
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* - on 64k boundariesand
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* - bit 1 set high
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* - block lock registers are 4MiB lower - overflow subtract (danger)
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*
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* The address manipulation is first done on the logical address
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* which is 0 at the start of the chip, and then the offset of
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* the individual chip is addted to it. Any other order a weird
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* map offset could cause problems.
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*/
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adr = (adr & ~0xffffUL) | 0x2;
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adr += chip->start - 0x400000;
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/*
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* This is easy because these are writes to registers and not writes
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* to flash memory - that means that we don't have to check status
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* and timeout.
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*/
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spin_lock(chip->mutex);
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ret = get_chip(map, chip, adr, FL_LOCKING);
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if (ret) {
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spin_unlock(chip->mutex);
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return ret;
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}
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chip->oldstate = chip->state;
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chip->state = xxlt->state;
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map_write(map, CMD(xxlt->val), adr);
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/* Done and happy. */
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chip->state = chip->oldstate;
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put_chip(map, chip, adr);
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spin_unlock(chip->mutex);
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return 0;
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}
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static int fwh_lock_varsize(struct mtd_info *mtd, loff_t ofs, size_t len)
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{
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int ret;
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ret = cfi_varsize_frob(mtd, fwh_xxlock_oneblock, ofs, len,
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(void *)&FWH_XXLOCK_ONEBLOCK_LOCK);
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return ret;
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}
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static int fwh_unlock_varsize(struct mtd_info *mtd, loff_t ofs, size_t len)
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{
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int ret;
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ret = cfi_varsize_frob(mtd, fwh_xxlock_oneblock, ofs, len,
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(void *)&FWH_XXLOCK_ONEBLOCK_UNLOCK);
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return ret;
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}
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static void fixup_use_fwh_lock(struct mtd_info *mtd, void *param)
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{
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printk(KERN_NOTICE "using fwh lock/unlock method\n");
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/* Setup for the chips with the fwh lock method */
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mtd->lock = fwh_lock_varsize;
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mtd->unlock = fwh_unlock_varsize;
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}
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#endif /* FWH_LOCK_H */
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