Alexandre Ghiti fdf3a7a1e0 riscv: Fix comment regarding kernel mapping overlapping with IS_ERR_VALUE ... The current comment states that we check if the 64-bit kernel mapping overlaps with the last 4K of the address space that is reserved to error values in create_kernel_page_table, which is not the case since it is done in setup_vm. But anyway, remove the reference to any function and simply note that in 64-bit kernel, the check should be done as soon as the kernel mapping base address is known. Fixes: db6b84a368 ("riscv: Make sure the kernel mapping does not overlap with IS_ERR_VALUE") Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2021-08-12 07:16:58 -07:00
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boot	riscv: dts: fix memory size for the SiFive HiFive Unmatched	2021-08-03 21:15:31 -07:00
configs	RISC-V: Enable Microchip PolarFire ICICLE SoC	2021-04-26 08:31:32 -07:00
errata	riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled	2021-06-01 21:16:41 -07:00
include	riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion	2021-08-06 22:41:28 -07:00
kernel	riscv: kexec: do not add '-mno-relax' flag if compiler doesn't support it	2021-08-12 07:16:52 -07:00
lib	riscv: __asm_copy_to-from_user: Fix: Typos in comments	2021-07-23 17:49:12 -07:00
mm	riscv: Fix comment regarding kernel mapping overlapping with IS_ERR_VALUE	2021-08-12 07:16:58 -07:00
net	riscv: bpf: Avoid breaking W^X	2021-04-26 08:25:14 -07:00
Kbuild	riscv: Allow device trees to be built into the kernel	2020-05-18 11:38:05 -07:00
Kconfig	Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED"	2021-08-06 22:41:39 -07:00
Kconfig.debug	RISC-V: Remove EARLY_PRINTK support	2018-12-17 10:23:46 -08:00
Kconfig.erratas	riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y	2021-05-06 09:40:13 -07:00
Kconfig.socs	riscv: sifive: fix Kconfig errata warning	2021-06-12 17:20:50 -07:00
Makefile	Kbuild updates for v5.14	2021-07-10 11:01:38 -07:00