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959f85f8a3
This cleans up quite a lot of the PCI mess that we currently have, and attempts to consolidate the duplication in the SH7780 and SH7751 PCI controllers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
95 lines
2.3 KiB
C
95 lines
2.3 KiB
C
/*
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* arch/sh/drivers/pci/ops-snapgear.c
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*
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* Author: David McCullough <davidm@snapgear.com>
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*
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* Ported to new API by Paul Mundt <lethal@linux-sh.org>
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*
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* Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* PCI initialization for the SnapGear boards
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include "pci-sh4.h"
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#define SNAPGEAR_PCI_IO 0x4000
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#define SNAPGEAR_PCI_MEM 0xfd000000
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/* PCI: default LOCAL memory window sizes (seen from PCI bus) */
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#define SNAPGEAR_LSR0_SIZE (64*(1<<20)) //64MB
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#define SNAPGEAR_LSR1_SIZE (64*(1<<20)) //64MB
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static struct resource sh7751_io_resource = {
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.name = "SH7751 IO",
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.start = SNAPGEAR_PCI_IO,
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.end = SNAPGEAR_PCI_IO + (64*1024) - 1, /* 64KiB I/O */
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.flags = IORESOURCE_IO,
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};
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static struct resource sh7751_mem_resource = {
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.name = "SH7751 mem",
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.start = SNAPGEAR_PCI_MEM,
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.end = SNAPGEAR_PCI_MEM + (64*1024*1024) - 1, /* 64MiB mem */
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.flags = IORESOURCE_MEM,
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};
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struct pci_channel board_pci_channels[] = {
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{ &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
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{ 0, }
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};
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static struct sh4_pci_address_map sh7751_pci_map = {
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.window0 = {
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.base = SH7751_CS2_BASE_ADDR,
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.size = SNAPGEAR_LSR0_SIZE,
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},
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.window1 = {
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.base = SH7751_CS2_BASE_ADDR,
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.size = SNAPGEAR_LSR1_SIZE,
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},
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.flags = SH4_PCIC_NO_RESET,
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};
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/*
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* Initialize the SnapGear PCI interface
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* Setup hardware to be Central Funtion
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* Copy the BSR regs to the PCI interface
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* Setup PCI windows into local RAM
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*/
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int __init pcibios_init_platform(void)
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{
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return sh7751_pcic_init(&sh7751_pci_map);
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}
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int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
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{
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int irq = -1;
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switch (slot) {
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case 8: /* the PCI bridge */ break;
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case 11: irq = 8; break; /* USB */
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case 12: irq = 11; break; /* PCMCIA */
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case 13: irq = 5; break; /* eth0 */
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case 14: irq = 8; break; /* eth1 */
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case 15: irq = 11; break; /* safenet (unused) */
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}
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printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n",
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slot, pin - 1 + 'A', irq);
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return irq;
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}
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void __init pcibios_fixup(void)
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{
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/* Nothing to fixup .. */
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}
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