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Most of the logic here is in the documentation file. Please take a look at it. I know we've come full-circle here back to a tunable, but this new one is *WAY* simpler. I challenge anyone to describe in one sentence how the old one worked. Here's the way the new one works: If we are flushing more pages than the ceiling, we use the full flush, otherwise we use per-page flushes. Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Link: http://lkml.kernel.org/r/20140731154101.12B52CAF@viggo.jf.intel.com Acked-by: Rik van Riel <riel@redhat.com> Acked-by: Mel Gorman <mgorman@suse.de> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
76 lines
3.6 KiB
Plaintext
76 lines
3.6 KiB
Plaintext
When the kernel unmaps or modified the attributes of a range of
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memory, it has two choices:
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1. Flush the entire TLB with a two-instruction sequence. This is
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a quick operation, but it causes collateral damage: TLB entries
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from areas other than the one we are trying to flush will be
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destroyed and must be refilled later, at some cost.
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2. Use the invlpg instruction to invalidate a single page at a
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time. This could potentialy cost many more instructions, but
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it is a much more precise operation, causing no collateral
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damage to other TLB entries.
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Which method to do depends on a few things:
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1. The size of the flush being performed. A flush of the entire
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address space is obviously better performed by flushing the
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entire TLB than doing 2^48/PAGE_SIZE individual flushes.
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2. The contents of the TLB. If the TLB is empty, then there will
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be no collateral damage caused by doing the global flush, and
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all of the individual flush will have ended up being wasted
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work.
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3. The size of the TLB. The larger the TLB, the more collateral
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damage we do with a full flush. So, the larger the TLB, the
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more attrative an individual flush looks. Data and
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instructions have separate TLBs, as do different page sizes.
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4. The microarchitecture. The TLB has become a multi-level
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cache on modern CPUs, and the global flushes have become more
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expensive relative to single-page flushes.
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There is obviously no way the kernel can know all these things,
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especially the contents of the TLB during a given flush. The
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sizes of the flush will vary greatly depending on the workload as
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well. There is essentially no "right" point to choose.
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You may be doing too many individual invalidations if you see the
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invlpg instruction (or instructions _near_ it) show up high in
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profiles. If you believe that individual invalidations being
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called too often, you can lower the tunable:
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/sys/debug/kernel/x86/tlb_single_page_flush_ceiling
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This will cause us to do the global flush for more cases.
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Lowering it to 0 will disable the use of the individual flushes.
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Setting it to 1 is a very conservative setting and it should
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never need to be 0 under normal circumstances.
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Despite the fact that a single individual flush on x86 is
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guaranteed to flush a full 2MB [1], hugetlbfs always uses the full
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flushes. THP is treated exactly the same as normal memory.
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You might see invlpg inside of flush_tlb_mm_range() show up in
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profiles, or you can use the trace_tlb_flush() tracepoints. to
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determine how long the flush operations are taking.
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Essentially, you are balancing the cycles you spend doing invlpg
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with the cycles that you spend refilling the TLB later.
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You can measure how expensive TLB refills are by using
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performance counters and 'perf stat', like this:
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perf stat -e
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cpu/event=0x8,umask=0x84,name=dtlb_load_misses_walk_duration/,
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cpu/event=0x8,umask=0x82,name=dtlb_load_misses_walk_completed/,
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cpu/event=0x49,umask=0x4,name=dtlb_store_misses_walk_duration/,
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cpu/event=0x49,umask=0x2,name=dtlb_store_misses_walk_completed/,
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cpu/event=0x85,umask=0x4,name=itlb_misses_walk_duration/,
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cpu/event=0x85,umask=0x2,name=itlb_misses_walk_completed/
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That works on an IvyBridge-era CPU (i5-3320M). Different CPUs
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may have differently-named counters, but they should at least
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be there in some form. You can use pmu-tools 'ocperf list'
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(https://github.com/andikleen/pmu-tools) to find the right
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counters for a given CPU.
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1. A footnote in Intel's SDM "4.10.4.2 Recommended Invalidation"
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says: "One execution of INVLPG is sufficient even for a page
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with size greater than 4 KBytes."
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