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00eb3630a9
Since commit b36581df7e ("spi: imx: Using existing properties for
chipselects") the device tree property 'fsl,spi-num-chipselects' is
unused and it is already marked as obsolete in device tree binding
documentation. Remove the property from the existing DTS files to
avoid its reoccurence on copying.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
324 lines
6.5 KiB
Plaintext
324 lines
6.5 KiB
Plaintext
/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "imx27-phytec-phycore-som.dtsi"
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/ {
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model = "Phytec pcm970";
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compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
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chosen {
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stdout-path = &uart1;
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};
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display0: LQ035Q7 {
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model = "Sharp-LQ035Q7";
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native-mode = <&timing0>;
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bits-per-pixel = <16>;
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fsl,pcr = <0xf00080c0>;
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display-timings {
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timing0: 240x320 {
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clock-frequency = <5500000>;
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hactive = <240>;
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vactive = <320>;
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hback-porch = <5>;
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hsync-len = <7>;
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hfront-porch = <16>;
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vback-porch = <7>;
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vsync-len = <1>;
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vfront-porch = <9>;
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pixelclk-active = <1>;
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hsync-active = <1>;
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vsync-active = <1>;
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de-active = <0>;
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};
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};
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};
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regulators {
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regulator@2 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_csien>;
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reg = <2>;
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regulator-name = "CSI_EN";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
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regulator-always-on;
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};
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};
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usbphy {
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usbphy2: usbphy@2 {
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compatible = "usb-nop-xceiv";
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reg = <2>;
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vcc-supply = <®_5v0>;
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clocks = <&clks IMX27_CLK_DUMMY>;
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clock-names = "main_clk";
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};
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};
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};
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&cspi1 {
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pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>;
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cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>,
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<&gpio4 27 GPIO_ACTIVE_LOW>;
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};
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&fb {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_imxfb1>;
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display = <&display0>;
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lcd-supply = <®_5v0>;
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fsl,dmacr = <0x00020010>;
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fsl,lscr1 = <0x00120300>;
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fsl,lpccr = <0x00a903ff>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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camgpio: pca9536@41 {
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compatible = "nxp,pca9536";
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reg = <0x41>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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&iomuxc {
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imx27_phycore_rdk {
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pinctrl_csien: csiengrp {
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fsl,pins = <
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MX27_PAD_USB_OC_B__GPIO2_24 0x0
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>;
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};
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pinctrl_cspi1cs1: cspi1cs1grp {
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fsl,pins = <
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MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
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>;
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};
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pinctrl_imxfb1: imxfbgrp {
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fsl,pins = <
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MX27_PAD_LD0__LD0 0x0
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MX27_PAD_LD1__LD1 0x0
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MX27_PAD_LD2__LD2 0x0
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MX27_PAD_LD3__LD3 0x0
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MX27_PAD_LD4__LD4 0x0
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MX27_PAD_LD5__LD5 0x0
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MX27_PAD_LD6__LD6 0x0
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MX27_PAD_LD7__LD7 0x0
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MX27_PAD_LD8__LD8 0x0
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MX27_PAD_LD9__LD9 0x0
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MX27_PAD_LD10__LD10 0x0
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MX27_PAD_LD11__LD11 0x0
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MX27_PAD_LD12__LD12 0x0
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MX27_PAD_LD13__LD13 0x0
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MX27_PAD_LD14__LD14 0x0
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MX27_PAD_LD15__LD15 0x0
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MX27_PAD_LD16__LD16 0x0
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MX27_PAD_LD17__LD17 0x0
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MX27_PAD_CLS__CLS 0x0
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MX27_PAD_CONTRAST__CONTRAST 0x0
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MX27_PAD_LSCLK__LSCLK 0x0
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MX27_PAD_OE_ACD__OE_ACD 0x0
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MX27_PAD_PS__PS 0x0
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MX27_PAD_REV__REV 0x0
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MX27_PAD_SPL_SPR__SPL_SPR 0x0
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MX27_PAD_HSYNC__HSYNC 0x0
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MX27_PAD_VSYNC__VSYNC 0x0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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/* Add pullup to DATA line */
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fsl,pins = <
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MX27_PAD_I2C_DATA__I2C_DATA 0x1
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MX27_PAD_I2C_CLK__I2C_CLK 0x0
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>;
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};
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pinctrl_owire1: owire1grp {
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fsl,pins = <
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MX27_PAD_RTCK__OWIRE 0x0
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>;
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};
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pinctrl_sdhc2: sdhc2grp {
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fsl,pins = <
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MX27_PAD_SD2_CLK__SD2_CLK 0x0
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MX27_PAD_SD2_CMD__SD2_CMD 0x0
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MX27_PAD_SD2_D0__SD2_D0 0x0
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MX27_PAD_SD2_D1__SD2_D1 0x0
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MX27_PAD_SD2_D2__SD2_D2 0x0
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MX27_PAD_SD2_D3__SD2_D3 0x0
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MX27_PAD_SSI3_FS__GPIO3_28 0x0 /* WP */
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MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX27_PAD_UART1_TXD__UART1_TXD 0x0
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MX27_PAD_UART1_RXD__UART1_RXD 0x0
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MX27_PAD_UART1_CTS__UART1_CTS 0x0
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MX27_PAD_UART1_RTS__UART1_RTS 0x0
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX27_PAD_UART2_TXD__UART2_TXD 0x0
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MX27_PAD_UART2_RXD__UART2_RXD 0x0
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MX27_PAD_UART2_CTS__UART2_CTS 0x0
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MX27_PAD_UART2_RTS__UART2_RTS 0x0
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>;
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};
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pinctrl_usbh2: usbh2grp {
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fsl,pins = <
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MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
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MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
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MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
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MX27_PAD_USBH2_STP__USBH2_STP 0x0
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MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
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MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
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MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
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MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
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MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
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MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
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MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
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MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
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>;
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};
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pinctrl_weim: weimgrp {
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fsl,pins = <
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MX27_PAD_CS4_B__CS4_B 0x0 /* CS4 */
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MX27_PAD_SD1_D1__GPIO5_19 0x0 /* CAN IRQ */
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>;
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};
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};
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};
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&owire {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_owire1>;
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status = "okay";
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};
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&pmicleds {
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ledr1: led@3 {
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reg = <3>;
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label = "system:red1:user";
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};
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ledg1: led@4 {
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reg = <4>;
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label = "system:green1:user";
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};
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ledb1: led@5 {
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reg = <5>;
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label = "system:blue1:user";
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};
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ledr2: led@6 {
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reg = <6>;
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label = "system:red2:user";
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};
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ledg2: led@7 {
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reg = <7>;
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label = "system:green2:user";
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};
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ledb2: led@8 {
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reg = <8>;
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label = "system:blue2:user";
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};
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ledr3: led@9 {
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reg = <9>;
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label = "system:red3:nand";
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linux,default-trigger = "nand-disk";
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};
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ledg3: led@10 {
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reg = <10>;
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label = "system:green3:live";
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linux,default-trigger = "heartbeat";
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};
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ledb3: led@11 {
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reg = <11>;
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label = "system:blue3:cpu";
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linux,default-trigger = "cpu0";
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};
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};
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&sdhci2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdhc2>;
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bus-width = <4>;
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cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
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wp-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
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vmmc-supply = <&vmmc1_reg>;
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status = "okay";
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};
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&uart1 {
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uart-has-rtscts;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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uart-has-rtscts;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbh2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbh2>;
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dr_mode = "host";
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phy_type = "ulpi";
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vbus-supply = <®_5v0>;
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fsl,usbphy = <&usbphy2>;
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disable-over-current;
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status = "okay";
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};
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&weim {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_weim>;
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can@4,0 {
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compatible = "nxp,sja1000";
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reg = <4 0x00000000 0x00000100>;
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interrupt-parent = <&gpio5>;
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interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
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nxp,external-clock-frequency = <16000000>;
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nxp,tx-output-config = <0x16>;
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nxp,no-comparator-bypass;
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fsl,weim-cs-timing = <0x0000dcf6 0x444a0301 0x44443302>;
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};
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};
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