linux/arch/riscv/kernel
Linus Torvalds e2ae634014 RISC-V Patches for the 5.11 Merge Window, Part 1
We have a handful of new kernel features for 5.11:
 
 * Support for the contiguous memory allocator.
 * Support for IRQ Time Accounting
 * Support for stack tracing
 * Support for strict /dev/mem
 * Support for kernel section protection
 
 I'm being a bit conservative on the cutoff for this round due to the
 timing, so this is all the new development I'm going to take for this
 cycle (even if some of it probably normally would have been OK).  There
 are, however, some fixes on the list that I will likely be sending along
 either later this week or early next week.
 
 There is one issue in here: one of my test configurations
 (PREEMPT{,_DEBUG}=y) fails to boot on QEMU 5.0.0 (from April) as of the
 .text.init alignment patch.  With any luck we'll sort out the issue, but
 given how many bugs get fixed all over the place and how unrelated those
 features seem my guess is that we're just running into something that's
 been lurking for a while and has already been fixed in the newer QEMU
 (though I wouldn't be surprised if it's one of these implicit
 assumptions we have in the boot flow).  If it was hardware I'd be
 strongly inclined to look more closely, but given that users can upgrade
 their simulators I'm less worried about it.
 
 There are two merge conflicts, both in build files.  They're both a bit
 clunky: arch/riscv/Kconfig is out of order (I have a script that's
 supposed to keep them in order, I'll fix it) and lib/Makefile is out of
 order (though GENERIC_LIB here doesn't mean quite what it does above).
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Merge tag 'riscv-for-linus-5.11-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V updates from Palmer Dabbelt:
 "We have a handful of new kernel features for 5.11:

   - Support for the contiguous memory allocator.

   - Support for IRQ Time Accounting

   - Support for stack tracing

   - Support for strict /dev/mem

   - Support for kernel section protection

  I'm being a bit conservative on the cutoff for this round due to the
  timing, so this is all the new development I'm going to take for this
  cycle (even if some of it probably normally would have been OK). There
  are, however, some fixes on the list that I will likely be sending
  along either later this week or early next week.

  There is one issue in here: one of my test configurations
  (PREEMPT{,_DEBUG}=y) fails to boot on QEMU 5.0.0 (from April) as of
  the .text.init alignment patch.

  With any luck we'll sort out the issue, but given how many bugs get
  fixed all over the place and how unrelated those features seem my
  guess is that we're just running into something that's been lurking
  for a while and has already been fixed in the newer QEMU (though I
  wouldn't be surprised if it's one of these implicit assumptions we
  have in the boot flow). If it was hardware I'd be strongly inclined to
  look more closely, but given that users can upgrade their simulators
  I'm less worried about it"

* tag 'riscv-for-linus-5.11-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  arm64: Use the generic devmem_is_allowed()
  arm: Use the generic devmem_is_allowed()
  RISC-V: Use the new generic devmem_is_allowed()
  lib: Add a generic version of devmem_is_allowed()
  riscv: Fixed kernel test robot warning
  riscv: kernel: Drop unused clean rule
  riscv: provide memmove implementation
  RISC-V: Move dynamic relocation section under __init
  RISC-V: Protect all kernel sections including init early
  RISC-V: Align the .init.text section
  RISC-V: Initialize SBI early
  riscv: Enable ARCH_STACKWALK
  riscv: Make stack walk callback consistent with generic code
  riscv: Cleanup stacktrace
  riscv: Add HAVE_IRQ_TIME_ACCOUNTING
  riscv: Enable CMA support
  riscv: Ignore Image.* and loader.bin
  riscv: Clean up boot dir
  riscv: Fix compressed Image formats build
  RISC-V: Add kernel image sections to the resource tree
2020-12-18 10:43:07 -08:00
..
vdso riscv: Explicitly specify the build id style in vDSO Makefile again 2020-11-25 09:44:14 -08:00
.gitignore .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
asm-offsets.c riscv: Fixed kernel test robot warning 2020-12-10 17:47:23 -08:00
cacheinfo.c riscv: Add cache information in AUX vector 2020-09-15 18:46:08 -07:00
cpu_ops_sbi.c RISC-V: Support cpu hotplug 2020-03-31 11:28:30 -07:00
cpu_ops_spinwait.c RISC-V: Add cpu_ops and modify default booting method 2020-03-31 11:25:56 -07:00
cpu_ops.c treewide: Convert macro and uses of __section(foo) to __section("foo") 2020-10-25 14:51:49 -07:00
cpu-hotplug.c RISC-V: Support cpu hotplug 2020-03-31 11:28:30 -07:00
cpu.c RISC-V: Rename and move plic_find_hart_id() to arch directory 2020-06-09 19:11:20 -07:00
cpufeature.c RISC-V: Add bitmap reprensenting ISA features common across CPUs 2020-05-04 14:08:59 -07:00
efi-header.S RISC-V: Add PE/COFF header for EFI stub 2020-10-02 14:31:16 -07:00
efi.c RISC-V: Add EFI runtime services 2020-10-02 14:31:28 -07:00
entry.S riscv: Cleanup unnecessary define in asm-offset.c 2020-07-30 11:37:44 -07:00
fpu.S riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
ftrace.c risc-v: kernel: ftrace: Fixes improper SPDX comment style 2020-11-04 13:28:20 -08:00
head.h RISC-V: Move DT mapping outof fixmap 2020-10-02 14:30:57 -07:00
head.S RISC-V Patches for the 5.11 Merge Window, Part 1 2020-12-18 10:43:07 -08:00
image-vars.h RISC-V: Add PE/COFF header for EFI stub 2020-10-02 14:31:16 -07:00
irq.c RISC-V: Remove do_IRQ() function 2020-06-09 19:11:24 -07:00
jump_label.c riscv: Add jump-label implementation 2020-07-30 11:37:43 -07:00
kgdb.c riscv: Fix "no previous prototype" compile warning in kgdb.c file 2020-07-09 20:09:30 -07:00
Makefile riscv: kernel: Drop unused clean rule 2020-12-10 17:42:34 -08:00
mcount-dyn.S riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support 2018-04-02 19:59:13 -07:00
mcount.S RISC-V: remove the unused return_to_handler export 2018-10-22 17:38:12 -07:00
module-sections.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
module.c riscv: Support R_RISCV_ADD64 and R_RISCV_SUB64 relocs 2020-07-30 11:37:41 -07:00
patch.c maccess: rename probe_kernel_{read,write} to copy_{from,to}_kernel_nofault 2020-06-17 10:57:41 -07:00
perf_callchain.c riscv: Make stack walk callback consistent with generic code 2020-11-20 18:53:38 -08:00
perf_event.c riscv: perf_event: Make some funciton static 2020-05-11 13:48:19 -07:00
perf_regs.c perf/arch: Remove perf_sample_data::regs_user_copy 2020-11-09 18:12:34 +01:00
process.c sched/idle: Fix arch_cpu_idle() vs tracing 2020-11-24 16:47:35 +01:00
ptrace.c riscv: switch to ->regset_get() 2020-07-27 14:31:10 -04:00
reset.c riscv: cleanup the default power off implementation 2019-11-13 13:22:52 -08:00
riscv_ksyms.c riscv: provide memmove implementation 2020-12-10 17:27:54 -08:00
sbi.c RISC-V: Add mechanism to provide custom IPI operations 2020-08-20 10:55:40 -07:00
setup.c RISC-V Patches for the 5.11 Merge Window, Part 1 2020-12-18 10:43:07 -08:00
signal.c riscv: add support for TIF_NOTIFY_SIGNAL 2020-12-12 09:17:38 -07:00
smp.c RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
smpboot.c RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
soc.c mm: introduce include/linux/pgtable.h 2020-06-09 09:39:13 -07:00
stacktrace.c riscv: Enable ARCH_STACKWALK 2020-11-25 16:03:59 -08:00
sys_riscv.c RISC-V: Don't allow write+exec only page mapping request in mmap 2020-06-18 17:28:53 -07:00
syscall_table.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
time.c riscv: use vDSO common flow to reduce the latency of the time-related functions 2020-06-10 19:47:16 -07:00
traps_misaligned.c riscv: Unaligned load/store handling for M_MODE 2020-04-03 10:45:33 -07:00
traps.c RISC-V: Setup exception vector early 2020-07-30 11:37:48 -07:00
vdso.c RISC-V Patches for the 5.8 Merge Window, Part 2 2020-06-11 12:55:20 -07:00
vmlinux.lds.S RISC-V: Move dynamic relocation section under __init 2020-11-25 16:05:29 -08:00