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5d1d67e361
Add spi support for mgcoge into the platform code and the dts file. Additionaly SPIDEV is switched on in the defconfig and the updates for the newer kernel version are committed. The SPI interface is used to drive the Maxim DS3106 clock chip. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Heiko Schocher <hs@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
265 lines
6.0 KiB
Plaintext
265 lines
6.0 KiB
Plaintext
/*
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* Device Tree for the MGCOGE plattform from keymile
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*
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* Copyright 2008 DENX Software Engineering GmbH
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* Heiko Schocher <hs@denx.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/dts-v1/;
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/ {
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model = "MGCOGE";
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compatible = "keymile,km82xx";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = ð0;
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serial0 = &smc2;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8247@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <16384>;
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i-cache-size = <16384>;
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timebase-frequency = <0>; /* Filled in by U-Boot */
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clock-frequency = <0>; /* Filled in by U-Boot */
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bus-frequency = <0>; /* Filled in by U-Boot */
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};
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};
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localbus@f0010100 {
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compatible = "fsl,mpc8247-localbus",
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"fsl,pq2-localbus",
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"simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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reg = <0xf0010100 0x40>;
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ranges = <0 0 0xfe000000 0x00400000
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1 0 0x30000000 0x00010000
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2 0 0x40000000 0x00010000
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5 0 0x50000000 0x04000000
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>;
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flash@0,0 {
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compatible = "cfi-flash";
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reg = <0 0x0 0x400000>;
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#address-cells = <1>;
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#size-cells = <1>;
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bank-width = <1>;
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device-width = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x00000 0xC0000>;
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};
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partition@1 {
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label = "env";
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reg = <0xC0000 0x20000>;
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};
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partition@2 {
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label = "envred";
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reg = <0xE0000 0x20000>;
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};
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partition@3 {
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label = "free";
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reg = <0x100000 0x300000>;
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};
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};
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flash@5,0 {
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compatible = "cfi-flash";
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reg = <5 0x00000000 0x02000000
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5 0x02000000 0x02000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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bank-width = <2>;
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partition@app { /* 64 MBytes */
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label = "ubi0";
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reg = <0x00000000 0x04000000>;
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};
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0>; /* Filled in by U-Boot */
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};
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soc@f0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus";
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ranges = <0x00000000 0xf0000000 0x00053000>;
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// Temporary until code stops depending on it.
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device_type = "soc";
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cpm@119c0 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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compatible = "fsl,mpc8247-cpm", "fsl,cpm2",
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"simple-bus";
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reg = <0x119c0 0x30>;
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ranges;
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muram {
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compatible = "fsl,cpm-muram";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0x10000>;
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data@0 {
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compatible = "fsl,cpm-muram-data";
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reg = <0x80 0x1f80 0x9800 0x800>;
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};
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};
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brg@119f0 {
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compatible = "fsl,mpc8247-brg",
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"fsl,cpm2-brg",
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"fsl,cpm-brg";
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reg = <0x119f0 0x10 0x115f0 0x10>;
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};
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/* Monitor port/SMC2 */
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smc2: serial@11a90 {
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device_type = "serial";
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compatible = "fsl,mpc8247-smc-uart",
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"fsl,cpm2-smc-uart";
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reg = <0x11a90 0x20 0x88fc 0x02>;
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interrupts = <5 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-brg = <2>;
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fsl,cpm-command = <0x21200000>;
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current-speed = <0>; /* Filled in by U-Boot */
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};
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eth0: ethernet@11a60 {
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device_type = "network";
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compatible = "fsl,mpc8247-scc-enet",
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"fsl,cpm2-scc-enet";
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reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>;
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local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
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interrupts = <43 8>;
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interrupt-parent = <&PIC>;
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linux,network-index = <0>;
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fsl,cpm-command = <0xce00000>;
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fixed-link = <0 0 10 0 0>;
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};
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i2c@11860 {
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compatible = "fsl,mpc8272-i2c",
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"fsl,cpm2-i2c";
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reg = <0x11860 0x20 0x8afc 0x2>;
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interrupts = <1 8>;
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interrupt-parent = <&PIC>;
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fsl,cpm-command = <0x29600000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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mdio@10d40 {
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compatible = "fsl,cpm2-mdio-bitbang";
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reg = <0x10d00 0x14>;
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#address-cells = <1>;
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#size-cells = <0>;
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fsl,mdio-pin = <12>;
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fsl,mdc-pin = <13>;
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phy0: ethernet-phy@0 {
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reg = <0x0>;
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};
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phy1: ethernet-phy@1 {
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reg = <0x1>;
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};
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};
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/* FCC1 management to switch */
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ethernet@11300 {
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device_type = "network";
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compatible = "fsl,cpm2-fcc-enet";
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reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
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local-mac-address = [ 00 01 02 03 04 07 ];
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interrupts = <32 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&phy0>;
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linux,network-index = <1>;
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fsl,cpm-command = <0x12000300>;
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};
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/* FCC2 to redundant core unit over backplane */
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ethernet@11320 {
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device_type = "network";
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compatible = "fsl,cpm2-fcc-enet";
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reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
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local-mac-address = [ 00 01 02 03 04 08 ];
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interrupts = <33 8>;
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interrupt-parent = <&PIC>;
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phy-handle = <&phy1>;
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linux,network-index = <2>;
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fsl,cpm-command = <0x16200300>;
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};
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usb@11b60 {
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compatible = "fsl,mpc8272-cpm-usb";
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mode = "peripheral";
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reg = <0x11b60 0x40 0x8b00 0x100>;
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interrupts = <11 8>;
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interrupt-parent = <&PIC>;
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usb-clock = <5>;
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};
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spi@11aa0 {
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cell-index = <0>;
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compatible = "fsl,spi", "fsl,cpm2-spi";
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reg = <0x11a80 0x40 0x89fc 0x2>;
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interrupts = <2 8>;
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interrupt-parent = <&PIC>;
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gpios = < &cpm2_pio_d 19 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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ds3106@1 {
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compatible = "gen,spidev";
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reg = <0>;
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spi-max-frequency = <8000000>;
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};
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};
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};
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cpm2_pio_d: gpio-controller@10d60 {
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#gpio-cells = <2>;
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compatible = "fsl,cpm2-pario-bank";
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reg = <0x10d60 0x14>;
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gpio-controller;
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};
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cpm2_pio_c: gpio-controller@10d40 {
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#gpio-cells = <2>;
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compatible = "fsl,cpm2-pario-bank";
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reg = <0x10d40 0x14>;
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gpio-controller;
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};
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PIC: interrupt-controller@10c00 {
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0x10c00 0x80>;
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compatible = "fsl,mpc8247-pic", "fsl,pq2-pic";
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};
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};
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};
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