linux/drivers/clk/meson
Neil Armstrong fac9a55b66 clk: meson-gxbb: Add MALI clocks
The Mali is clocked by two identical clock paths behind a glitch free mux
to safely change frequency while running.

The two "mali_0" and "mali_1" clocks are composed of a mux, divider and gate.
Expose these two clocks trees using generic clocks.
Finally the glitch free mux is added as "mali" clock.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1490177935-9646-3-git-send-email-narmstrong@baylibre.com
2017-04-04 12:05:12 -07:00
..
clk-cpu.c clk: meson8b: clean up cpu clocks 2016-06-22 18:02:35 -07:00
clk-mpll.c clk: meson: mpll: correct N2 maximum value 2017-03-27 12:30:38 -07:00
clk-pll.c clk: meson: fractional pll support 2016-06-22 18:05:47 -07:00
clkc.h clk: meson: mpll: add rw operation 2017-03-27 12:30:18 -07:00
gxbb-aoclk.c clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe() 2016-08-24 00:55:13 -07:00
gxbb.c clk: meson-gxbb: Add MALI clocks 2017-04-04 12:05:12 -07:00
gxbb.h clk: gxbb: fix CLKID_ETH defined twice 2017-01-27 10:56:57 -08:00
Kconfig clk: gxbb: add AmLogic GXBB clk controller driver 2016-06-22 18:07:31 -07:00
Makefile clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention 2016-09-01 17:31:44 -07:00
meson8b.c clk: meson8b: add the mplls clocks 0, 1 and 2 2017-03-27 12:30:27 -07:00
meson8b.h clk: meson8b: add the mplls clocks 0, 1 and 2 2017-03-27 12:30:27 -07:00